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Demodulation loop of automatic range-measuring system uses reference signal wave of locally generated pseudo-noise plus square wave of same period as the clock. Phase instabilities in IF amplifiers appear only as gain changes in the loop, and do not cause errors in range determination.
Various trellis-coded modulated phase shift keying (MPSK) modulation techniques for transmitting 4.8 kbps over a 5 kHz RF channel are considered. The tradeoffs between coherent versus differentially coherent types of demodulation, and interleaving are discussed as well as optimum trellis-codes designed for fading channels. Simulation results are presented.
A report discusses the technical background and design of the Navigator Global Positioning System (GPS) receiver -- . a radiation-hardened receiver intended for use aboard spacecraft. Navigator is capable of weak signal acquisition and tracking as well as much faster acquisition of strong or weak signals with no a priori knowledge or external aiding. Weak-signal acquisition and tracking enables GPS use in high Earth orbits (HEO), and fast acquisition allows for the receiver to remain without power until needed in any orbit. Signal acquisition and signal tracking are, respectively, the processes of finding and demodulating a signal. Acquisition is the more computationally difficult process. Previous GPS receivers employ the method of sequentially searching the two-dimensional signal parameter space (code phase and Doppler). Navigator exploits properties of the Fourier transform in a massively parallel search for the GPS signal. This method results in far faster acquisition times [in the lab, 12 GPS satellites have been acquired with no a priori knowledge in a Low-Earth-Orbit (LEO) scenario in less than one second]. Modeling has shown that Navigator will be capable of acquiring signals down to 25 dB-Hz, appropriate for HEO missions. Navigator is built using the radiation-hardened ColdFire microprocessor and housing the most computationally intense functions in dedicated field-programmable gate arrays. The high performance of the algorithm and of the receiver as a whole are made possible by optimizing computational efficiency and carefully weighing tradeoffs among the sampling rate, data format, and data-path bit width.
Architectures have been proposed for the design of frequency-domain least-mean-square complex equalizers that would be integral parts of parallel- processing digital receivers of multi-gigahertz radio signals and other quadrature-phase-shift-keying (QPSK) or 16-quadrature-amplitude-modulation (16-QAM) of data signals at rates of multiple gigabits per second. Equalizers as used here denotes receiver subsystems that compensate for distortions in the phase and frequency responses of the broad-band radio-frequency channels typically used to convey such signals. The proposed architectures are suitable for realization in very-large-scale integrated (VLSI) circuitry and, in particular, complementary metal oxide semiconductor (CMOS) application- specific integrated circuits (ASICs) operating at frequencies lower than modulation symbol rates. A digital receiver of the type to which the proposed architecture applies (see Figure 1) would include an analog-to-digital converter (A/D) operating at a rate, fs, of 4 samples per symbol period. To obtain the high speed necessary for sampling, the A/D and a 1:16 demultiplexer immediately following it would be constructed as GaAs integrated circuits. The parallel-processing circuitry downstream of the demultiplexer, including a demodulator followed by an equalizer, would operate at a rate of only fs/16 (in other words, at 1/4 of the symbol rate). The output from the equalizer would be four parallel streams of in-phase (I) and quadrature (Q) samples.
Previous estimates on the degradations due to a subcarrier loop assume a square-wave subcarrier. This article provides a closed-form expression for the degradations due to the subcarrier loop when a finite number of harmonics are used to demodulate the subcarrier, as in the case of the buffered telemetry demodulator. We compared the degradations using a square wave and using finite harmonics in the subcarrier demodulation and found that, for a low loop signal-to-noise ratio, using finite harmonics leads to a lower degradation. The analysis is under the assumption that the phase noise in the subcarrier (SC) loop has a Tikhonov distribution. This assumption is valid for first-order loops.
A high-rate digital receiver (HRDR) implemented as a peripheral component interface (PCI) board has been developed as a prototype of compact, general-purpose, inexpensive, potentially mass-producible data-acquisition interfaces between telemetry systems and personal computers. The installation of this board in a personal computer together with an analog preprocessor enables the computer to function as a versatile, highrate telemetry-data-acquisition and demodulator system. The prototype HRDR PCI board can handle data at rates as high as 600 megabits per second, in a variety of telemetry formats, transmitted by diverse phase-modulation schemes that include binary phase-shift keying and various forms of quadrature phaseshift keying. Costing less than $25,000 (as of year 2003), the prototype HRDR PCI board supplants multiple racks of older equipment that, when new, cost over $500,000. Just as the development of standard network-interface chips has contributed to the proliferation of networked computers, it is anticipated that the development of standard chips based on the HRDR could contribute to reductions in size and cost and increases in performance of telemetry systems.
The probe-to-orbiter data link for the Jovian mission uses a Manchester encoded BPSK waveform which is demodulated by the Galileo probe relay receiver. Signal acquisition and tracking consists of a sequential probability ratio signal search, frequency acquisition with a least-squares estimator, wide-band phase lock acquisition, and a self-regulating mode control. A discrete Fourier transform serves as the basic mechanism to generate the algorithms that provide this orderly transition to phase tracking. Acquisition and tracking is addressed in this paper with emphasis on key algorithms, rationale, and theoretical/measured performance.
This presentation presents the testing approach and initial laboratory test results of the Adaptive Optics (AO) Subassembly (AOS) for the Low-Cost Optical Terminal (LCOT), a low-cost and flexible optical communications ground terminal. Leveraging commercial components and subassemblies wherever possible, LCOT is being developed by the NASA Goddard Space Flight Center (GSFC) Advanced Communications Capabilities for Exploration and Science Systems (ACCESS) project. An economical ground terminal allows NASA to create a global optical terminal network and enables the expansion of direct-to-Earth (DTE) optical communications. Located at the Goddard Geophysical and Astronomical Observatory (GGAO), LCOT is in the development phase and will receive first light during initial testing beginning in 2023. This new optical terminal includes a 700 mm Ritchey-Chretien commercial telescope, able to track Low Earth Orbit (LEO) spacecraft, receive instruments specified from 1500 - 1600 nm, and an uplink transmit optical system. Demodulation of optical coherent modulation formats requires downlink signal coupling into single-mode fiber. Due to atmospheric turbulence, signals experience wavefront distortions creating speckle patterns larger than the fiber core and high jitter requiring precise beam steering. AO is necessary to correct atmospheric turbulence effects and allow efficient coupling of received signals. In 2020, GSFC contracted with General Atomics to provide the LCOT AO system. This system has been delivered to GSFC in September 2021 and has been tested in laboratory to evaluate performance. This paper describes the laboratory testing approach, turbulence phase plate design, test results, and the AO field testing plan when installed on the LCOT telescope.
The degradation in bit error rate performance due to imperfect subcarrier tracking by the Demodulation Synchronization Assembly (DSA) is investigated. Results apply to any type of digital loop and received signal dynamics. A type four loop causes the least amount of loss, because it tracks phase jerk with zero steady-state error. However, when frequency rate and frequency acceleration are as large as in the extended Magellan mission, it will be necessary to decrease the loop update time in order to minimize the losses.
This paper presents a method of noncoherent demodulation of the PSK signal for signal distortion analysis at the RF interface. The received RF signal is downconverted and noncoherently sampled for further off-line processing. Any mismatch in phase and frequency is then compensated for by the software using the estimation techniques to extract the baseband waveform, which is needed in measuring various signal parameters. In this way, various kinds of modulated signals can be treated uniformly, independent of modulation format, and additional distortions introduced by the receiver or the hardware measurement instruments can thus be eliminated. Quantization errors incurred by digital sampling and ensuing software manipulations are analyzed and related numerical results are presented also.
Sinusoidal jitter is produced by simply modulating a clock frequency sinusoidally with a given frequency and amplitude. But this can be expressed as phase jitter, frequency jitter, or cycle-to-cycle jitter, rms or peak, absolute units, or normalized to the base clock frequency. Jitter using other waveforms requires calculating and downloading these waveforms to an arbitrary waveform generator, and helping the user manage relationships among phase jitter crest factor, frequency jitter crest factor, and cycle-to-cycle jitter (CCJ) crest factor. Software was developed for managing these relationships, automatically configuring the generator, and saving test results documentation. Tighter management of clock jitter and jitter sensitivity is required by new codes that further extend the already high performance of space communication links, completely correcting symbol error rates higher than 10 percent, and therefore typically requiring demodulation and symbol synchronization hardware to operating at signal-to-noise ratios of less than one. To accomplish this, greater demands are also made on transmitter performance, and measurement techniques are needed to confirm performance. It was discovered early that sinusoidal jitter can be stepped on a grid such that one can connect points by constant phase jitter, constant frequency jitter, or constant cycle-cycle jitter. The tool automates adherence to a grid while also allowing adjustments off-grid. Also, the jitter can be set by the user on any dimension and the others are calculated. The calculations are all recorded, allowing the data to be rapidly plotted or re-plotted against different interpretations just by changing pointers to columns. A key advantage is taking data on a carefully controlled grid, which allowed a single data set to be post-analyzed many different ways. Another innovation was building a software tool to provide very tight coupling between the generator and the recorded data product, and the operator's worksheet. Together, these allowed the operator to sweep the jitter stimulus quickly along any of three dimensions and focus on the response of the system under test (response was jitter transfer ratio, or performance degradation to the symbol or codeword error rate). Additionally, managing multi-tone and noise waveforms automated a tedious manual process, and provided almost instantaneous decision- making control over test flow. The code was written in LabVIEW, and calls Agilent instrument drivers to write to the generator hardware.
The carrier tracking performance of the breadboard Costas Loop of the Multimegabit Telemetry Demodulator Detector System was tested with unbalanced quadriphase shift keying (UQPSK) signals. An S-band UQPSK modulator was built for the tests. The experimental results are very close to the theoretical rms phase error calculations. The test and analysis show that the rms phase error for UQPSK signals is less than 5 deg at the design point if the I-to-Q channel power ratio is larger than 6 dB.
A digitized synchronous demodulator is constructed entirely of digital components including timing logic, an accumulator, and means to digitally filter the digital output signal. Indirectly, it accepts, at its input, periodic analog signals which are converted to digital signals by traditional analog-to-digital conversion techniques. Broadly, the input digital signals are summed to one of two registers within an accumulator, based on the phase of the input signal and medicated by timing logic. At the end of a predetermined number of cycles of the inputted periodic signals, the contents of the register that accumulated samples from the negative half cycle is subtracted from the accumulated samples from the positive half cycle. The resulting difference is an accurate measurement of the narrow band amplitude of the periodic input signal during the measurement period. This measurement will not include error sources encountered in prior art synchronous demodulators using analog techniques such as offsets, charge injection errors, temperature drift, switching transients, settling time, analog to digital converter missing code, and linearity errors.
Future generation space communications systems feature significantly higher data rates and relatively smaller frequency spectrum allocations than systems currently deployed. This requires the application of bandwidth- and power-efficient signal transmission techniques. There are a number of approaches to implementing such techniques, including analog, digital, mixed-signal, single-channel, or multichannel systems. In general, the digital implementations offer more advantages; however, a fully digital implementation is very difficult because of the very high clock speeds required. Multichannel techniques are used to reduce the sampling rate. One such technique, multicarrier modulation, divides the data into a number of low-rate channels that are stacked in frequency. Orthogonal frequency division multiplexing (OFDM), a form of multicarrier modulation, is being proposed for numerous systems, including mobile wireless and digital subscriber link communication systems. In response to this challenge, NASA Glenn Research Center's Communication Technology Division has developed an OFDM digital modem (modulator and demodulator) with an aggregate information throughput of 622 Mbps. The basic OFDM waveform is constructed by dividing an incoming data stream into four channels, each using either 16- ary quadrature amplitude modulation (16-QAM) or 8-phase shift keying (8-PSK). An efficient implementation for an OFDM architecture is being achieved using the combination of a discrete Fourier transform (DFT) at the transmitter to digitally stack the individual carriers, inverse DFT at the receiver to perform the frequency translations, and a polyphase filter to facilitate the pulse shaping.
A novel technique for simultaneously detecting data and estimating the parameters of a received carrier signal phase modulated by unknown data and experiencing very high Doppler, Doppler rate, etc. is discussed. Such a situation arises, for example, in the case of Global Positioning Systems (DPS) where the signal parameters are directly related to the position, velocity and acceleration of the GPS receiver. The proposed scheme is based upon first estimating the received signal local (data dependent) parameters over two consecutive bit periods, followed by the detection of a possible jump in these parameters. The presence of a detected jump signifies a data transition which is then removed from the received signal. This effectively demodulated signal is then processed to provide the estimates of global (data independent) parameters of the signal related to the position, velocity, etc. of the receiver. One of the key features of the proposed algorithm is the introduction of two different schemes which can provide an improvement of up to 3 dB over the conventional implementation of Kalman filter as applied to phase and frequency estimation, under low to medium signal-to-noise ratio conditions.
A unique digital multi-rate demodulator (MRD) architecture is presented for onboard satellite communications processing. The multi-rate feature enables the same demodulator hardware to process either one wideband channel (WBC), or process up to thirty-two independent narrowband channels (NBC) that are time division multiplexed (TDM). The MRD can process many quadrature modulation format such as offset quadrature phase shift keying (OQPSK). Possible applications include voice and data transmission for commercial or military users.
The need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either Binary Phase Shift Keying (BPSK) or Quadrature Phase Shift Keying (QPSK) modulation is discussed. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. The design trade-offs in each portion of the modulator and demodulator subsystem are outlined.
Digital real-time modem processes octuple differential-phase-shift-keyed trellis-coded modulation. Intended for use in communicating data at rate up to 4.8 kb/s in land-mobile satellite channel (Rician fading) of 5-kHz bandwidth at carrier frequency of 1 to 2 GHz. Modulator and demodulator contain digital signal processors performing modem functions. Design flexible in that functions altered via software. Modem successfully tested and evaluated in both laboratory and field experiments, including recent full-scale satellite experiment. In all cases, modem performed within 1 dB of theory. Other communication systems benefitting from this type of modem include land mobile (without satellites), paging, digitized voice, and frequency-modulation subcarrier data broadcasting.