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At least 217 records · Page 12

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗

SiC Optically Modulated Field-Effect Transistor

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification of the photon-detection signal. A family of operating curves characterizing the OFET can be generated in a series of measurements performed at different intensities of incident ultraviolet light.

Tabib-Azar, Massood↗

Active Oxidation of SiC

The high temperature oxidation of silicon carbide occurs in either a passive or active mode, depending on temperature and oxygen potential. Passive oxidation forms a protective oxide film which limits attack of the SiC:SiC(s) + 3/2 O2(g) = SiO2(s) + CO(g.) Active oxidation forms a volatile oxide and leads to extensive attack of the SiC: SiC(s) + O2(g) = SiO(g) + CO(g). The transition points and rates of active oxidation are a major issue. Previous studies are reviewed and the leading theories of passive/active transitions summarized. Comparisons are made to the active/passive transitions in pure Si, which are relatively well-understood. Critical questions remain about the difference between the active-to-passive transition and passive-to-active transition. For Si, Wagner [2] points out that the active-to-passive transition is governed by the criterion for a stable Si/SiO2 equilibria and the passive-to-active transition is governed by the decomposition of the SiO2 film. This suggests a significant oxygen potential difference between these two transitions and our experiments confirm this. For Si, the initial stages of active oxidation are characterized by the formation of SiO(g) and further oxidation to SiO2(s) as micron-sized rods, with a distinctive morphology. SiC shows significant differences. The active-to-passive and the passive-to-active transitions are close. The SiO2 rods only appear as the passive film breaks down. These differences are explained in terms of the reactions at the SiC/SiO2 interface. In order to understand the breakdown of the passive film, pre-oxidation experiments are conducted. These involve forming dense protective scales of 0.5, 1, and 2 microns and then subjecting the samples with these scales to a known active oxidation environment. Microstructural studies show that SiC/SiO2 interfacial reactions lead to a breakdown of the scale with a distinct morphology.

Jacobson, Nathan S.↗

SiC-Based Miniature High-Temperature Cantilever Anemometer

The figure depicts a miniature cantilever-type anemometer that has been developed as a prototype of compact, relatively nonintrusive anemometers that can function at temperatures up to 600 C and that can be expected to be commercially mass-producible at low cost. The design of this anemometer, and especially the packaging aspect of the design, is intended to enable measurement of turbulence in the high-temperature, high-vibration environment of a turbine engine or in any similar environment. The main structural components of the anemometer include a single-crystal SiC cantilever and two polycrystalline SiC clamping plates, all made from chemical-vapor-deposited silicon carbide. Fabrication of these components from the same basic material eliminates thermal-expansion mismatch, which has introduced spurious thermomechanical stresses in cantilever-type anemometers of prior design. The clamping plates are heavily oxidized to improve electrical insulation at high temperature. A cavity that serves as a receptacle for the clamped end of the cantilever is etched into one end of one clamping plate. Trenches that collectively constitute a socket for a multipin electrical plug (for connection to external electronic circuitry) are etched into the opposite end of this clamping plate. Metal strips for electrical contact are deposited on one face of the other clamping plate. Piezoresistive single-crystal SiC thin-film strain gauges are etched in the n-type SiC epilayer in a Wheatstone-bridge configuration. Metal contact pads on the cantilever that extend into the clamping-receptacle area, are obtained by deposition and patterning using standard semiconductor photolithography and etching methods. The cantilever and the two clamping plates are assembled into a sandwich structure that is then clamped in a stainless-steel housing. The Wheatstone- bridge carrying SiC cantilever with the metal contact pads on the piezoresistors is slid into the receptacle in the bottom clamping plate. The top clamping plate is brought into contact with the bottom plate so that the narrow section of the metal strips on the top clamp plate aligns with the metal contact pads on the cantilever. When the parts are clamped together, the metal strips provide electrical connections between the Wheatstone-bridge contact points and the sides the trenches that constitute the socket for the multipin electrical plug. Hence, to connect the Wheatstone bridge to external circuitry for processing of the anemometer readout, one need only insert the plug in the socket. In operation, the cantilever end of the stainless-steel housing is mounted flush with an engine wall and the unclamped portion of the cantilever is exposed into the flow. The cantilever is deflected in direct proportion to the force induced by component of flow parallel to the engine wall and perpendicular to the broad exposed face of the cantilever. The maximum strain on the cantilever occurs at the clamped edge and is measured by the piezoresistors, which are located there. The corresponding changes in resistance manifest themselves in the output of the Wheatstone bridge.

Okojie, Robert S.↗

Structural Characterization of Lateral-grown 6H-SiC am-plane Seed Crystals by Hot Wall CVD Epitaxy

The performance of commercially available silicon carbide (SiC) power devices is limited due to inherently high density of screw dislocations (SD), which are necessary for maintaining polytype during boule growth and commercially viable growth rates. The NASA Glenn Research Center (GRC) has recently proposed a new bulk growth process based on axial fiber growth (parallel to the c-axis) followed by lateral expansion (perpendicular to the c-axis) for producing multi-faceted m-plane SiC boules that can potentially produce wafers with as few as one SD per wafer. In order to implement this novel growth technique, the lateral homoepitaxial growth expansion of a SiC fiber without introducing a significant number of additional defects is critical. Lateral expansion is being investigated by hot wall chemical vapor deposition (HWCVD) growth of 6H-SiC am-plane seed crystals (0.8mm x 0.5mm x 15mm) designed to replicate axially grown SiC single crystal fibers. The post-growth crystals exhibit hexagonal morphology with approximately 1500 m (1.5 mm) of total lateral expansion. Preliminary analysis by synchrotron white beam x-ray topography (SWBXT) confirms that the growth was homoepitaxial, matching the polytype of the respective underlying region of the seed crystal. Axial and transverse sections from the as grown crystal samples were characterized in detail by a combination of SWBXT, transmission electron microscopy (TEM) and Raman spectroscopy to map defect types and distribution. X-ray diffraction analysis indicates the seed crystal contained stacking disorders and this appears to have been reproduced in the lateral growth sections. Analysis of the relative intensity for folded transverse acoustic (FTA) and optical (FTO) modes on the Raman spectra indicate the existence of stacking faults. Further, the density of stacking faults is higher in the seed than in the grown crystal. Bundles of dislocations are observed propagating from the seed in m-axis lateral directions. Contrast extinction analysis of these dislocation lines reveals they are edge type basal plane dislocations that track the growth direction. Polytype phase transition and stacking faults were observed by high-resolution TEM (HRTEM), in agreement with SWBXT and Raman scattering.

Single Crystal↗

Development of SiC Large Tapered Crystal Growth

Majority of very large potential benefits of wide band gap semiconductor power electronics have NOT been realized due in large part to high cost and high defect density of commercial wafers. Despite 20 years of development, present SiC wafer growth approach is yet to deliver majority of SiC's inherent performance and cost benefits to power systems. Commercial SiC power devices are significantly de-rated in order to function reliably due to the adverse effects of SiC crystal dislocation defects (thousands per sq cm) in the SiC wafer.

Neudeck, Phil↗

Step Free Surface Heteroepitaxy of 3C-SiC Layers on Patterned 4H/6H-SiC Mesas and Cantilevers

The off-axis approach to SiC epitaxial growth has not prevented many substrate crystal defects from propagating into SiC epilayers, and does not permit the realization of SiC heteropolytype devices. This paper reviews recent advancements in SiC epitaxial growth that begin to overcome the above shortcomings for arrays of device-sized mesas patterned into on-axis 4H/6HSiC wafers. These on-axis mesa growth techniques have produced 4H/6H-SiC homoepilayers and 3C-SiC heteroepilayers with substantially lower dislocation densities. The results should enable improved homojunction and heterojunction silicon carbide prototype devices.

Neudeck, P. G.↗

Characterization of 4H-SiC Low Gain Avalanche Detectors (LGADs)

4H-SiC Low Gain Avalanche Detectors (LGADs) have been fabricated and characterized. The devices employ a circular mesa design with low-resistivity contacts and an SiO 2 passivation layer. The I–V and C–V characteristics of the 4H-SiC LGADs are compared with complementary 4H-SiC PiN diodes to confirm a high breakdown voltage and low leakage current. Both LGADs and PiN diodes were irradiated with alpha particles from a $^{210}_{84}$Po source. The charge collected by each device was compared, and it was observed that low-gain charge carrier multiplication is achieved in the 4H-SiC LGAD.

43 PARTICLE ACCELERATORS↗

High temperature oxidation behaviors of bulk SiC with low partial pressures of air and water vapor in argon

Oxidation behaviors of bulk SiC at 1000–1400 °C in Ar-20 vol% H 2 O-10 vol% air were investigated. The thickness of the passivation oxide layer showed a parabolic increase with time. Dense and uniform layers formed below 1200 °C, whereas pores and cracks were observed at higher temperatures. An analytical model was proposed to estimate the oxide layer growth and SiC mass loss rate. The SiC layer should be effective in retaining the fission products after oxidation by excessive water and air. This work is the first detailed study of SiC layer oxidation during loss of coolant accidents (LOCA) for HTGRs.

36 MATERIALS SCIENCE↗

Compatibility of SiC with ODS FeCrAl in flowing Pb-Li at 600° - 700°C

To establish the maximum operating temperature for the dual coolant lead lithium (DCLL) blanket concept, thermal convection loop (TCL) experiments were conducted for 1000 h with a peak temperature of 700 °C to determine compatibility with commercial eutectic Pb~17at.%Li. Two TCLs were fabricated from alloy APMT (FeCrAlMo) and the baseline TCL experiment contained only APMT specimens. The second TCL experiment exposed more fusion relevant CVD SiC and ODS Fe-10Cr-6Al specimens in the hot and cold legs. In the second experiment, the mass losses were much larger for the ODS FeCrAl specimens and most of the CVD SiC specimens experienced a mass gain as SiC reacted to form an Fe- and Cr-rich carbide reaction product. Dissolved Fe and Cr reacted with the SiC and removing Fe and Cr from the liquid appeared to increase ODS FeCrAl dissolution. Such a dissimilar material interaction appears consistent with thermodynamic calculations. Significant attack at the top of the hot leg in both experiments suggests that the Pb-Li compatibility of FeCrAl alloys is inadequate at 700 °C in a flowing environment and the maximum PbLi temperature is < 675 °C.

36 MATERIALS SCIENCE↗

Investigation of the structure and chemical nature of Pd fission product agglomerations in irradiated TRISO particle SiC

Tristructural-isotropic (TRISO)-coated fuel particles are used in high-temperature gas-cooled nuclear reactors. Although the polycrystalline 3C-SiC layer acts as the main barrier to fission product release, post-irradiation examinations have shown that certain metallic fission products are found outside of the TRISO coated particle, with no observable micro-cracks or other mechanical failure feature. In this study, an atomic resolution transmission electron microscopy investigation of a SiC layer of a neutron irradiated (19.38% fissions per initial metal atom average burnup; 1072°C time-averaged temperature) TRISO-coated particle from the first advanced gas reactor experiment at Idaho National Laboratory containing mainly Pd and U was conducted. The fission product Pd was found to be present at dislocation cores associated with twins, stacking faults, and their intersections. The Pd present at the dislocation cores were bonded to Si, suggesting that the diffusion of Pd along the SiC dislocation cores involves the formation of Pd-Si bonds. Evidence of single atom grain boundary migration was also found. Fission product agglomerations at grain boundaries most likely consist of a random solid solution containing Si-FP, Si-C, and C-C type bonding arrangements. No difference in the Si- or C-bonding environment is found for the unoccupied grain boundary adjacent to a fission product agglomeration compared to the bulk SiC.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Effects of sample bias on adhesion of magnetron sputtered Cr coatings on SiC

Swelling of SiC at 300 C due to in-service neutron irradiation causes tensile residual stresses in coatings which are expected to adversely affect the performance of coated SiC composite fuel cladding for light water reactors. Matching the coating swelling with the substrate, a solution common for thermal expansion, is not practical in the case of neutron irradiation. Biasing samples during magnetron sputtering deposition induces compressive residual stress which may counteract this. In this study, chromium coatings were deposited on SiC by DC magnetron sputtering with no external heating at bias voltages of –50V, –75V, and –100V. The effects of the bias voltage on morphology, residual stress, microstrain, texture, and adhesion are shown. The low deposition temperature resulted in the coating microstructure evolution following an energetic particle bombardment dominated trend. Additionally, at the two lower bias voltages knock-on implantation dominated increasing the residual stress and microstrain while at the highest bias voltage, thermal spike migration allowed for defect relaxation. When the knock-on induced compressive residual stress exceeded 0.8 GPa microcrack formation in the SiC substrate decreased coating adhesion. While no microcracks formed at the lowest bias voltage, insufficient atomic mobility during coating growth lead to voids forming in the coating. A balance is needed to form void-free coatings that have high compressive residual stress.

36 MATERIALS SCIENCE↗

Impact of proton irradiation on 4H-SiC Low Gain Avalanche Detectors (LGADs)

Silicon carbide (SiC) particle detectors have the potential to provide time resolutions and robust performance in extreme environments which exceed that of silicon detectors. In this work 4H-SiC low gain avalanche detectors (LGADs) and complementary PiN diodes were irradiated with 2.5 GeV protons at fluences up to 3.33 × 10 14 p/cm 2 . The electrostatic performance of both irradiated and non-irradiated devices was evaluated using I-V and C-V measurements. Moreover, charge collection measurements using α particles were also conducted. SiC LGADs displayed a loss in rectification, high ON-state resistances >10 10 Ω-cm 2 , and the complete removal of gain when exposed to the highest proton fluence. Additionally, the reductions in capacitance and OFF-state current pointed to compensation of the gain layer as a gain reducing mechanism. The introduction of radiation-induced defects also hinders carrier acceleration, which reduces impact ionization and further gain reduction. LGADs exposed to a fluence of 1 × 10 14 p/cm 2 experienced a partial recovery in gain (originally having a value of ∼ 2) with a value of ∼ 1.65 when applying a bias of 500 V. Charge trapping was also seen in the reduction of charge collection efficiency (CCE) to ∼ 65% for the PiN diode. However, despite the reduction in device performance, the demonstration of a measurable signal after irradiation points to the potential of SiC LGAD detectors for future high energy physics applications.

43 PARTICLE ACCELERATORS↗

Ultra-Fast 4H-SiC LGAD With Etched Termination and Field Plate

The design, fabrication, and demonstration of a novel Silicon Carbide Low Gain Avalanche Detector (4HSiC LGAD), exhibiting an ultra-fast time response and excellent time resolution, are reported. Here, the use of field plates is proposed to suppress the high electric field caused by the negative bevel-etched angle in 4H-SiC LGADs based on TCAD simulations. Experimental measurements confirm that the field plate significantly increases the breakdown voltage of the 4H-SiC LGADs. Gain and time resolution are measured by using the ultraviolet transient current technique (UV-TCT) showing that 4H-SiC LGADs possess excellent timing performance, with a time resolution better than 35 ps for the injected laser signal with single minimum ionizing particle (MIP) charges generation at room temperature. Additionally, the gain suppression effect in a 4H-SiC LGAD is observed for the first time.

43 PARTICLE ACCELERATORS↗

A Comparison of Ion Implantation at Room Temperature and Heated Ion Implantation on the Body Diode Degradation of Commercial 3.3 kV 4H-SiC Power MOSFETs

It has been demonstrated that basal plane dislocations (BPDs)-induced stacking faults (SFs) cause body diode degradation in commercial 4H-SiC power MOSFETs, especially with higher voltage ratings. BPDs originate from 4H-SiC boule, epi growth, and ion implantation. Considering the lower cost of ion implantation at room temperature (RT), this work investigates the potential of RT ion implantation replacing heated (HT) ion implantation by comparing the influence of both ion implantations on the body diode degradation of commercial 3.3 kV 4H-SiC power MOSFETs. We demonstrate with long-term (up to 1000 hours) forward current stress that RT implantation can keep the body diode degradation of 3.3 kV 4H-SiC power MOSFETs within the specification limits compared with HT implantation.

4H-SiC↗

Ultra High Temperature (UHT) SiC Fiber (Phase 2)

Silicon-carbide fiber-reinforced silicon-carbide ceramic matrix composites (SiCSiC CMC) are emerginglightweight re-usable structural materials not only for hot section components in gas turbine engines, but also for controlsurfaces and leading edges of reusable hypersonic vehicles as well as for nuclear propulsion and reactor components. Ithas been shown that when these CMC are employed in engine hot-section components, the higher the upper usetemperature (UUT) of the SiC fiber, the more performance benefits are accrued, such as higher operating temperatures,reduced component cooling air, reduced fuel consumption, and reduced emissions. The first generation of SiCSiC CMC with a temperature capability of 2200-2400F are on the verge of being introduced into the hot-section components ofcommercial and military gas turbine engines.Today the SiC fiber type currently recognized as the worlds best in terms ofthermo-mechanical performance is the Sylramic-iBN fiber. This fiber was previously developed by the PI at NASA GRC using patented processes to improve the high-cost commercial Sylramic fiber, which in turn was derived from anotherlow-cost low-performance commercial fiber. Although the Sylramic-iBN fiber shows state-of-the art creep and rupture resistance for use temperatures above 2550oF, NASA has shown by fundamental creep studies and model developmentthat its microstructure and creep resistance could theoretically be significantly improved to produce an Ultra HighTemperature (UHT) SiC fiber.This Phase II Seedling Fund effort has been focused on the key objective of effectively repeating the similar processes used for producing the Sylramic-iBN fiber using a design of experiments approach to first understand the cause of the less than optimum Sylramic-iBN microstructure and then attempting to develop processconditions that eliminate or minimize these key microstructural issues. In so doing, it is predicted that that theseadvanced process could result in an UHT SiC fiber with 20 times more creep resistance than the Sylramic-iBN fiber,which in turn would allow SiCSiC CMC to operate up to 2700oF and above, thereby further enhancing the performancebenefits of SiCSiC components in aero-propulsion engines. It was also envisioned that the fiber processes developedduring Phase II efforts would not only reduce production costs for the UHT fiber by using low-cost precursor fibers andcombined processes, but also allow the UHT fibers to be directly produced in preforms of the precursor fibers, possibly atthe facilities of the CMC fabricator.

SiC Ceramic Fiber↗

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.

4H-SiC nJFET↗

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.

4H-SiC nJFET↗