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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

Evolutionary lunar transportation family

The development of an evolutionary lunar transportation family (LTF) that can accommodate evolving human exploration goals is discussed. An evolutionary system is aimed at minimizing program costs while preserving programmatic versatility. Technical requirements that affect the design strategy for LTF include aerobraking technology and packaging constraints; mixed, unsymmetrical payload manifests; crew and payload exchange operations; crew and cargo off-loading on the lunar surface; and cryogenic lunar transfer and storage. It is concluded that the LTF is capable of meeting exploration goals, which include the provision for a significant early manned lunar surface science and exploration capability, the avoidance or reduction of some major operational and infrastructure requirements, and the incorporation of common vehicle designs and existing/near-term technology.

Capps, Stephen↗
NASA NTRS2010

Advanced Flip Chips in Extreme Temperature Environments

The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate material and the silicon die or chip, and also the underfill materials. Advanced packaging interconnects technology such as flip-chip interconnect test boards have been subjected to various extreme temperature ranges that cover military specifications and extreme Mars and asteroid environments. The eventual goal of each process step and the entire process is to produce components with 100 percent interconnect and satisfy the reliability requirements. Underfill materials, in general, may possibly meet demanding end use requirements such as low warpage, low stress, fine pitch, high reliability, and high adhesion.

Ramesham, Rajeshuni↗
NASA NTRS2005

Reliability Assessment of Advanced Flip-clip Interconnect Electronic Package Assemblies under Extreme Cold Temperatures (-190 and -120 C)

Flip-chip interconnect electronic package boards have been assembled, underfilled, non-destructively evaluated and subsequently subjected to extreme temperature thermal cycling to assess the reliability of this advanced packaging interconnect technology for future deep space, long-term, extreme temperature missions. In this very preliminary study, the employed temperature range covers military specifications (-55 C to 100 C), extreme cold Martian (-120 C to 115 C) and asteroid Nereus (-180 C to 25 C) environments. The resistance of daisy-chained, flip-chip interconnects were measured at room temperature and at various intervals as a function of extreme temperature thermal cycling. Electrical resistance measurements are reported and the tests to date have not shown significant change in resistance as a function of extreme temperature thermal cycling. However, the change in interconnect resistance becomes more noticeable with increasing number of thermal cycles. Further research work has been carried out to understand the reliability of flip-chip interconnect packages under extreme temperature applications (-190 C to 85 C) via continuously monitoring the daisy chain resistance. Adaptation of suitable diagnostic techniques to identify the failure mechanisms is in progress. This presentation will describe the experimental test results of flip-chip testing under extreme temperatures.

thermal cycling↗
DOE OSTI2022

Co-Design of Marine Energy Converters for Autonomous Underwater Vehicle Docking and Recharging - Software and Data

Software and testing data from the OH Hinsdale Wave lab for DOE-funded project on Co-Design of Marine Energy Converters for Autonomous Underwater Vehicle Docking and Recharging. This project will perform foundational research and testing to accelerate the sector-wide development and deployment of marine energy converters to provide Power-At-Sea. Specifically, we seek to overcome known challenges and knowledge gaps for the successful co-design of coupled Wave Energy Converter (WEC)-Autonomous Underwater Vehicles (AUV) systems; systems designed and tested for WEC array system health and environmental monitoring applications. This project brings together an experienced, multi-institution, and multi-disciplinary team to focus on the co-design of marine energy (ME) technologies and AUV docking systems, including multi-body hydrodynamic modeling, active control, autonomy, and hardware interfaces necessary to enable new WEC-focused understanding, and allow for robust and ubiquitous AUV docking and recharging in real-world conditions.

16 TIDAL AND WAVE POWER↗
DOE OSTI2021

Design and dispatch optimization of packaged ice storage systems within a connected community

The traditional implementation of cool thermal energy storage (CTES) must be reimagined within the context of a dynamic grid and smart buildings operating as connected communities. As most buildings do not operate central chillers or connect to district cooling loops, this necessitates a broader use of packaged CTES. Our objective is to begin answering the question of how such packaged CTES should be implemented within a connected community. We do so by presenting a simulation–optimization workflow employing building energy modeling software and a mixed-integer linear program to design and dispatch a packaged CTES technology to achieve minimum total annual cost. We demonstrate this methodology on a seven-building case study using current utility rates and find that total annual cooling energy costs can be reduced by 17.8% compared to baseline, after accounting for the cost of storage. We perform three parametric sensitivity studies to evaluate modeling assumptions and obtain the prioritization of storage procurement as a function of annualized life-cycle cost of storage. We find that a community optimization approach provides significantly different results than individual building optimizations and provides greater savings compared to baseline.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
NASA NTRS1994

Design and implementation of two two-week Teacher Enhancement Institutes

During this summer, I have been part of a four team effort that planned and executed two two-week Teacher Enhancement Institutes (TEI) for 40 K-8 teachers from this area. The TEI was designed to enhance teachers' background in aeronautics and technology so that they would be better equipped to encourage and to train students in the mathematics, science, and technology fields. The teachers were given a stipend and three graduate credits from Christopher Newport University for their participation in this program. The four ASEE fellows worked together to develop objectives and a schedule of activities for each two-week session based on the program outline given in the grants that were funding this effort. We divided the responsibilities in coordinating and implementing each part of the TEI based on the specific strengths and background of each ASEE fellow. My specific responsibilities were: (1) to develop the course syllabus and generally handle all matters involved with the graduate course; (2) coordinate the follow-up sessions; and (3) design and manage half of the technology sessions that we had scheduled (approximately 30% of the TEI was devoted to technology). Because the first two responsibilities were primarily administrative in nature, I will address only the last. The technology sessions were divided into computer-only and other technologies (e.g., television and digital technology including scanning, digital photography and CD-ROM). I had responsibility for the computer-only technology sessions. The emphasis of these sessions was on use of the Internet specifically to locate and use educational resources. To maximize learning, these sessions were hands-on with two teachers at each computer. Each teacher received instruction in, and actually used, the most popular tools available on the Internet: email (they were given temporary accounts at NASA LaRC), anonymous ftp and archie, gopher and veronica, mosaic, and telnet. Teachers participated in hands-on workshops to learn about these programs, but were also given time during the two-week session to explore on their own and to find resources on the Net that specifically met their needs. In order to ensure that Internet access continues after their return to the classroom, aIl teachers who did not have them also applied for Learning Link accounts (from WHRO, the local public television station) and Virginia Pen accounts (from the Department of Education of Virginia), both of which allow textbased access to Internet. In addition to getting exposure to and practice with Internet tools, teachers were aIso given a hands-on seminar (and also given practice time) on ClarisWorks, an integrated word processing, spreadsheet, database, and paint package. The technology sessions (and TEI as a whole) were enthusiastically received by both new and more experienced teachers as extremely helpful in improving their ability to use technology in developing lesson pIans.

Lambert, Lynn↗
NASA NTRS1981

General description of nestable column structural and assembly technology

The superior packaging characteristics of nestable column structural elements make this concept attractive for application to missions space shuttle missions requiring large and/or high stiffness, or complex structures. Photographs depict investigations pursued relative to defining structural and assembly technology using these structural elements. The neutral buoyancy facility assembly simulation tests and the large space structure mobile work station are featured.

Bush, H. G.↗
NASA NTRS2008

Reliability of PWB Microvias for High Density Package Assembly

High density PWB (printed wiring board) with microvia technology is required for implementation of high density and high I/O area array packages (AAP). COTS (commercial off-the-shelf) AAP packaging technologies in high reliability versions with 1.27 mm pitch are now being considered for use in a number of NASA systems including Space Shuttle and Mars Rovers. NASA functional system designs are requiring more and more dense AAP packages and board space, which makes board microvia technology very attractive for effectively routing a large number of package inputs/outputs. However, the reliability of the fine feature microvias including via in pads is unknown for space applications. Understanding process and QA (quality assurance) indicators for reliability are important for low risk insertion of these newly available packages and PWBs. This paper presents literature search as well as test results for a high density board subjected to various thermal cycle and reflow profiles representative of tin-lead and lead-free solder reflow. Microvias sizes ranged from two to six mil with and without filling. Daisy chain microvias monitored during the test and PWBs were cross-sectioned to determine failure and locations. Optical and SEM photographs as well as resistance changes during cycling and Tg/Td (glass transition/decomposition temperature) characterisations are presented.

fill via↗
DOE OSTI2020

Extreme Compression for Large Scale Data Store

For the last 5 years Accelogic pioneered and perfected a radically new theory of numerical computing codenamed “Compressive Computing”, which has an extremely profound impact on real-world computer science [1]. At the core of this new theory is the discovery of one of its fundamental theorems which states that, under very general conditions, the vast majority (typically between 70% and 80%) of the bits used in modern large-scale numerical computations are absolutely irrelevant for the accuracy of the end result. This theory of Compressive Computing provides mechanisms able to identify (with high intelligence and surgical accuracy) the number of bits (i.e., the precision) that can be used to represent numbers without affecting the substance of the end results, as they are computed and vary in real time. The bottom line outcome would be to provide a state-of-the-art compression algorithm that surpasses those currently available in the ROOT framework, with the purpose of enabling substantial economic and operational gains (including speedup) for High Energy and Nuclear Physics data storage/analysis. In our initial studies, a factor of nearly x4 (3.9) compression was achieved with RHIC/STAR data where ROOT compression managed only x1.4.In this contribution, we will present our concepts of “functionally lossless compression”, have a glance at examples and achievements in other communities, present the results and outcome of our current, ongoing R&D, as well as present a high-level view of our plan to move forward with a ROOT implementation that would deliver a basic solution readily integrated into HENP applications. As a collaboration of experimental scientists, private industry, and the ROOT Team, our aim is to capitalize on the substantial success delivered by the initial effort and produce a robust technology properly packaged as an open-source tool that could be used by virtually every experiment around the world as means for improving data management and accessibility.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2023

Progress toward Accelogic compression in ROOT

For the last 7 years, Accelogic pioneered and perfected a radically new theory of numerical computing codenamed “Compressive Computing”, which has an extremely profound impact on real-world computer science [1]. At the core of this new theory is the discovery of one of its fundamental theorems which states that, under very general conditions, the vast majority (typically between 70% and 80%) of the bits used in modern large-scale numerical computations are absolutely irrelevant for the accuracy of the end result. This theory of Compressive Computing provides mechanisms able to identify (with high intelligence and surgical accuracy) the number of bits (i.e., the precision) that can be used to represent numbers without affecting the substance of the end results, as they are computed and vary in real time. The bottom-line outcome will be to provide state-of-the-art compression algorithms --and accompanying software libraries-- able to surpass the performance of the compression engines currently available in the ROOT [7] framework. The resulting technology has the capability to enable substantial economic and operational gains (including speedup) for High Energy and Nuclear Physics data storage/analysis. In our initial studies, a factor of nearly x4 (3.9) compression was achieved with RHIC/STAR data where ROOT compression managed only x1.4 [6].As a collaboration of experimental scientists, private industry, and the ROOT Team, our aim is to capitalize on the substantial success delivered by the initial effort and produce a robust technology properly packaged as an open-source tool that could be used by virtually every experiment around the world as means for improving data management and accessibility.In this contribution, we will present our efforts integrating our concepts of “functionally lossless compression” within the ROOT framework implementation, with the purpose of producing a basic solution readily integrated into HENP applications. We will also present our progress applying this compression through realistic examples of analysis from both the STAR and CMS experiments.

Canal, Ph.↗
DOE OSTI2023

MASK4 Test Campaign for Sandia WaveBot Device

This data and report details the findings from a wave tank test focused on production of useful work of a wave energy converter (WEC) device. The experimental system and test were specifically designed to validate models for power transmission throughout the WEC system. Additionally, the validity of co-design informed changes to the power take-off (PTO) were assessed and shown to provide the expected improvements in system performance. These data describe the "MASK4" wave tank test of the Sandia WaveBot device. The WaveBot device has been tested a number of times in different permutations at the US Navy's Maneuvering and Sea Keeping (MASK) basin. Each test in this series is referred to as MASK1, MASK2, etc. The WaveBot device was first tested in one degree of freedom (heave) in 2016. This MASK1 test focused primarily on system identification and modeling. After MASK1, major modifications were performed to improve the overall real-time control and measurement system, improve the heave drive train, and add surge and pitch degrees of freedom. The second set of testing, which was broken up in to two stages: MASK2A and MASK2B, focused on bench testing and closed-loop control performance as well as nonlinear modeling. MASK3 then focused on multi-input, multi-output modeling and control for maximization of electrical power. The attached report presents the results from MASK4, which focuses on detailed modeling of the power conversion chain and validation co-design principles by way of the introduction of a magnetic spring. The test log, report, and data from the MASK4 test of the WaveBot augmented with a tunable magnetic spring. Processing codes can be found at the Github link below.

16 TIDAL AND WAVE POWER↗
DOE OSTI2025

Low-Power, Load-Balancing Whole Home Electrification Solution: Cooperative Research and Development (Final Report)

Testing was conducted at the Systems Performance Laboratory in NREL’s Energy Systems Integration Facility to test the performance of 120V wall-mounted heat pumps, 120V heat pump water heaters (HPWH), Electric Vehicle Supply Equipment (EVSE), and other plug-in loads, using NeoCharge Smart Splitters and whole home energy software as appropriate. Four different simulated occupancy scenarios were used to evaluate the package of technology and controls.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
NASA NTRS1974

Design guidelines for advanced LSI microcircuit packaging using thick film multilayer technology

Ceramic multilayer circuitry results from the sequential build-up of two or more layers of pre-determined conductive interconnections separated by dielectric layers and fired at an elevated temperature to form a solidly fused structure. The resultant ceramic interconnect matrix is used as a base to mount active and passive devices and provide the necessary electrical interconnection to accomplish the desired electrical circuit. Many methods are known for developing multilevel conductor mechanisms such as multilayer printed circuits, welded wire matrices, flexible copper tape conductors, and thin and thick-film ceramic multilayers. Each method can be considered as a specialized field with each possessing its own particular set of benefits and problems. This design guide restricts itself to the art of design, fabrication and assembly of ceramic multilayer circuitry and the reliability of the end product.

Peckinpaugh, C. J.↗
NASA NTRS1976

Use of calibration maneuvers for improved performance of strapdown attitude reference systems

Conventional strapdown configurations require precise knowledge of the orientation of the gyro input axes as well as a moderately large, fast computer to provide inertial attitude. This paper presents the mechanization and discusses the operation and performance of an omnidirectional, strapdown pointing control system called All Sky Pointer which does not require precise gyro alignment or a sophisticated computer. Errors caused by gyro-optical sensor misalignment, gyro-integrator bias, and scale factor error are compensated for by the use of calibration maneuvers. Control and computation are provided by an electronics package utilizing technology similar to that found in hand-held calculators. Simulation results indicate that sub arc-minute pointing performance is possible and pointing errors are reduced by as much as an order of magnitude compared with uncompensated systems.

Lorell, K. R.↗
NASA NTRS1977

Active control of potential of the geosynchronous satellites ATS-5 and ATS-6

The ATS-6 geosynchronous satellite carries two cesium ion thrusters as part of the technology experiment package. Their effectiveness in controlling the spacecraft potential was shown during normal operation of the thrusters. Auroral particle detectors were used to estimate spacecraft potential, amount of cesium propellant backflow to the spacecraft, and electron signature of the thruster. Operation of the thruster clamps the spacecraft to about -10 v in the presence of a wide range of ambient particle flux. Some positive ions from the thruster are returned to the spacecraft during this period. The plasma bridge neutralizer of the thruster is also effective in controlling the spacecraft potential. Laboratory simulation tests of the ATS-5 ion thruster thermionic emitter neutralizer showed that negative differential charging on the spacecraft surface probably prevents the emitter from completely discharging the spacecraft in flight.

Goldstein, R.↗
NASA NTRS1983

A 20-GHz IMPATT diode development

The development of 20 GHz, double drift GaAs IMPATT diodes is described. Advances made in material growth, diodes fabrication technology and packaging, and circuit design and diode testing are documented.

Masse, D.↗
NASA NTRS1994

The MAMMOTH project

On the surface MAMMOTH is a high performance 5.25-inch half-high 8mm helical scan tape drive that records a native 20 Gigabytes of data on Advanced Metal Evaporated media at a sustained throughput of 3 Megabyte per second over a high speed SCSI interface, that is scheduled for production in the second half of 1995. But it's much more than that. Inside its custom designed sheet metal enclosure lies one of the greatest technical achievements of its kind. Exabyte's strategic direction is to increase throughput and capacity while continuing to improve drive, data and media reliability to its products. MAMMOTH adheres to that direction and the description of its technical advances is described in this paper. MAMMOTH can be broken down into four main functional assemblies: high-performance integrated digital electronics, high-reliability tape transport mechanism, high-performance scanner, and advanced metal evaporated media. All this technology is packaged into a standard 5.25-inch half-high form factor that dissipates only 15 watts.

Gerchar, Tim↗
NASA NTRS1995

Advanced flight computer. Special study

This report documents a special study to define a 32-bit radiation hardened, SEU tolerant flight computer architecture, and to investigate current or near-term technologies and development efforts that contribute to the Advanced Flight Computer (AFC) design and development. An AFC processing node architecture is defined. Each node may consist of a multi-chip processor as needed. The modular, building block approach uses VLSI technology and packaging methods that demonstrate a feasible AFC module in 1998 that meets that AFC goals. The defined architecture and approach demonstrate a clear low-risk, low-cost path to the 1998 production goal, with intermediate prototypes in 1996.

Coo, Dennis↗