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At least 217 records · Page 12

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DOE OSTI2021

Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions

Addressing the increasing demand for high- efficiency and high-power-density converters, the flying-capacitor multilevel converter has shown itself as a promising topology. A key advantage of this topology is the reduced voltage rating of the switches, though also makes it vulnerable to device failure during short-circuit conditions. Despite large interest in fault-tolerant operation of these converters, alongside detailed descriptions of flying capacitor balancing, little research has focused on the converter short-circuit fault analysis, which may cause a switch failure if not properly designed for. Therefore, this work presents a comprehensive model describing the large- signal short-circuit switching behavior of a general N -level flying- capacitor multilevel converter. Highly simplified models used to predict the evolution of the switch current and voltage stress during the fault are proposed, targeted at practicing engineers for conservative design guidelines. These models are used to determine the critical time for remedial action of the converter before reaching some predefined maximum conditions. A 2-to-10- level fully-configurable flying-capacitor multilevel converter and a fault circuit hardware prototype are used to experimentally perform different short-circuit tests that show a good match to the measured behavior.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2022

QUEST: systematically approximating Quantum circuits for higher output fidelity

We present QUEST, a procedure to systematically generate approximations for quantum circuits to reduce their CNOT gate count. Our approach employs circuit partitioning for scalability with procedures to 1) reduce circuit length using approximate synthesis, 2) improve fidelity by running circuits that represent key samples in the approximation space, and 3) reason about approximation upper bound. Our evaluation results indicate that our approach of "dissimilar"approximations provides close fidelity to the original circuit. Overall, the results indicate that QUEST can reduce CNOT gate count by 30-80% on ideal systems and decrease the impact of noise on existing and near-future quantum systems.

Patel, Tirthak↗

DOE OSTI2024

Realistic Cost to Execute Practical Quantum Circuits using Direct Clifford+T Lattice Surgery Compilation

We report a resource estimation pipeline that explicitly compiles quantum circuits expressed using the Clifford+T gate set into a surface code lattice surgery instruction set. The cadence of magic state requests from the compiled circuit enables the optimization of magic state distillation and storage requirements in a post-hoc analysis. To compile logical circuits into lattice surgery operations, we build upon the open-source Lattice Surgery Compiler. The revised compiler operates in two stages: the first translates logical gates into an abstract, layout-independent instruction set; the second compiles these into local lattice surgery instructions that are allocated to hardware tiles according to a specified resource layout. The second stage retains logical parallelism while avoiding resource contention in the fault-tolerant layer, aiding realism. Additionally, users can specify dedicated tiles at which magic states are replenished, enabling resource costs from the logical computation to be considered independently from magic state distillation and storage. We demonstrate the applicability of our pipeline to large practical quantum circuits by providing resource estimates for the ground state estimation of molecules. Finally, we find that variable magic state consumption rates in real circuits can cause the resource costs of magic state storage to dominate unless production is varied to suit.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2023

Measurement-induced entanglement phase transitions in variational quantum circuits

Variational quantum algorithms (VQAs), which classically optimize a parametrized quantum circuit to solve a computational task, promise to advance our understanding of quantum many-body systems and improve machine learning algorithms using near-term quantum computers. Prominent challenges associated with this family of quantum-classical hybrid algorithms are the control of quantum entanglement and quantum gradients linked to their classical optimization. Known as the barren plateau phenomenon, these quantum gradients may rapidly vanish in the presence of volume-law entanglement growth, which poses a serious obstacle to the practical utility of VQAs. Inspired by recent studies of measurement-induced entanglement transition in random circuits, we investigate the entanglement transition in variational quantum circuits endowed with intermediate projective measurements. Considering the Hamiltonian Variational Ansatz (HVA) for the XXZ model and the Hardware Efficient Ansatz (HEA), we observe a measurement-induced entanglement transition from volume-law to area-law with increasing measurement rate. Moreover, we provide evidence that the transition belongs to the same universality class of random unitary circuits. Importantly, the transition coincides with a “landscape transition” from severe to mild/no barren plateaus in the classical optimization. Our work may provide an avenue for improving the trainability of quantum circuits by incorporating intermediate measurement protocols in currently available quantum hardware.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2020

Broadband Characterization and Circuit Model Development of Transmission-Scale Transformers

This report describes broadband measurements of transmission-scale transformers typical in the electric power grid. This work was performed as part of the EMP Resilient Grid LDRD project at Sandia National Laboratories to generate circuit models that can be used for high-altitude electromagnetic pulse (HEMP) coupling simulations and response predictions. The objective of the work was to obtain characterization data of substation yard equipment across a frequency range relevant to HEMP. Vector network analyzer measurements up to 100 MHz were performed on two power transformers at ABB-Hitachi and a single ITEC potential transformer. Custom cable breakouts were designed to interface with the transformer terminals and provide ground connections to the chassis at the base of the transformer bushings. The three-phase terminals of the power transformers were measured as a common mode impedance using a parallel resistive splitter, and the single-phase terminals of the potential transformer were measured directly. A vector fitting algorithm was used to empirically fit circuit models to the resulting two-port networks and input impedances of the measured objects. Simplified circuit representations of the input impedances were also generated to assess the degree of precision needed for high-altitude electromagnetic pulse response predictions, which were performed in Sandia's XYCE circuit simulator platform. HEMP coupling simulations using the transformer models showed significant reduction in the voltage peak and broadening in the pulse width seen at the power transformer compared to the traveling wave voltage. This indicated the importance of the load condition when defining the coupled insult in an electric power substation. Simplified circuit models showed a similar voltage at the transformer with a smoothed waveform. The presence of potential transformers in the simulation did not significantly change the simulated voltage at the power transformer. Single-port input impedance models were also developed to define load conditions when transfer characteristics were not necessary.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2022

Damage Detection and Electrical Performance Impact of Flat-Flexible Circuits

Flat-flexible circuits or ‘flex circuits’ have varied applications in electronics and in explosive detonation systems. They pose advantages over conventional coaxial cables in their ability to fit into small mechanical envelopes and routings. A typical flex circuit is composed of a laminated assembly of multiple layers of conductor and dielectric materials. Copper, because of its high electrical conductivity, is one of the primary materials used in flex circuit conductors. The conductor must maintain structural integrity and electrical continuity when the flexible circuit is bent during processing or to fit an application envelope. Under some strain conditions a cable may have degraded electrical performance even though visible damage may not be evident. Dislocation density can increase by mechanisms such as dislocation forest hardening, where gliding dislocations in primary slip planes get pinned at obstacles and form Frank-Read sources. Dislocation density increases within the conductor layers may impact electrical resistivity but would not necessarily result in visible mechanical failure. In some detonation applications, such as for building implosion for demolition, the time for signal transmission and voltage used for firing detonators can be critical. If the resistance in a single flex cable within a building demolition array is too high, the resultant demolition shape may be asymmetric, leading to unplanned damage to nearby structures and potential hazards to public safety. This study will apply non-destructive evaluation techniques to evaluate the detectability of damage accumulation in flat, flexible copper-conductor cables and discuss potential implications to their practical use.

42 ENGINEERING↗

DOE OSTI2022

AI-enhanced Codesign for Next-Generation Neuromorphic Circuits and Systems

This report details work that was completed to address the Fiscal Year 2022 Advanced Science and Technology (AS&T) Laboratory Directed Research and Development (LDRD) call for “AI-enhanced Co-Design of Next Generation Microelectronics.” This project required concurrent contributions from the fields of 1) materials science, 2) devices and circuits, 3) physics of computing, and 4) algorithms and system architectures. During this project, we developed AI-enhanced circuit design methods that relied on reinforcement learning and evolutionary algorithms. The AI-enhanced design methods were tested on neuromorphic circuit design problems that have real-world applications related to Sandia’s mission needs. The developed methods enable the design of circuits, including circuits that are built from emerging devices, and they were also extended to enable novel device discovery. We expect that these AI-enhanced design methods will accelerate progress towards developing next-generation, high-performance neuromorphic computing systems.

42 ENGINEERING↗

DOE OSTI2024

Qutrit Circuits and Algebraic Relations: A Pathway to Efficient Spin-1 Hamiltonian Simulation

Quantum information processing has witnessed significant advancements through the application of qubit- based techniques within universal gate sets. Recently, exploration beyond the qubit paradigm to d-dimensional quantum units or qudits has opened new avenues for improving computational efficiency. This paper delves into the qudit-based approach, particularly addressing the challenges presented in the high-fidelity implementation of qudit-based circuits due to increased complexity. As an innovative approach towards enhancing qudit circuit fidelity, we explore algebraic relations, such as the Yang-Baxter-like turnover equation, which may enable circuit compression and optimization. The paper introduces the turnover relation for the three-qutrit time propagator and its potential use in reducing circuit depth. We further investigate whether this relation can be generalized for higher-dimensional quantum circuits, including a focused study on the one-dimensional spin-1 Heisenberg model. Our paper outlines both rigorous and numerically efficient approaches to potentially achieve this generalization, providing a foundation for further explorations in the field of qudit-based quantum computing.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

DOE OSTI2024

Assessing Inverter-Based Resources Modeling Gaps in Commonly Used Short-Circuit Programs

Future bulk power systems are expected to operate with a high penetration of inverter-based resources (IBR). This is anticipated to fundamentally change the system’s short-circuit behaviors and demand a change in existing transmission line protection settings or schemes. Phasor-domain short circuit programs (e.g., ASPEN, CAPE, and CYME) remain the mainstream tools for developing protection settings. However, the system protection community has shared concerns about the accuracy of IBR models in short-circuit programs. This report compares the performance of existing generic IBR models in short-circuit programs with detailed electro-magnetic transient (EMT) models provided by several different IBR manufacturers in PSCAD, to quantify the short-circuit program’s IBR model accuracy, assess their ability to replicate individual IBR controls such as negative sequence current injections, and identify specific gaps in the existing generic phasor-domain IBR models that are currently available.

42 ENGINEERING↗

DOE OSTI2021

Clifford Circuit Optimization with Templates and Symbolic Pauli Gates

The Clifford group is a finite subgroup of the unitary group generated by the Hadamard, the CNOT, and the Phase gates. This group plays a prominent role in quantum error correction, randomized benchmarking protocols, and the study of entanglement. Here we consider the problem of finding a short quantum circuit implementing a given Clifford group element. Our methods aim to minimize the entangling gate count assuming all-to-all qubit connectivity. First, we consider circuit optimization based on template matching and design Clifford-specific templates that leverage the ability to factor out Pauli and SWAP gates. Second, we introduce a symbolic peephole optimization method. It works by projecting the full circuit onto a small subset of qubits and optimally recompiling the projected subcircuit via dynamic programming. CNOT gates coupling the chosen subset of qubits with the remaining qubits are expressed using symbolic Pauli gates. Software implementation of these methods finds circuits that are only 0.2% away from optimal for 6 qubits and reduces the two-qubit gate count in circuits with up to 64 qubits by 64.7% on average, compared with the Aaronson-Gottesman canonical form.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2023

Simultaneous estimation of multiple eigenvalues with short-depth quantum circuit on early fault-tolerant quantum computers

We introduce a multi-modal, multi-level quantum complex exponential least squares (MM-QCELS) method to simultaneously estimate multiple eigenvalues of a quantum Hamiltonian on early fault-tolerant quantum computers. Our theoretical analysis demonstrates that the algorithm exhibits Heisenberg-limited scaling in terms of circuit depth and total cost. Notably, the proposed quantum circuit utilizes just one ancilla qubit, and with appropriate initial state conditions, it achieves significantly shorter circuit depths compared to circuits based on quantum phase estimation (QPE). Numerical results suggest that compared to QPE, the circuit depth can be reduced by around two orders of magnitude under several settings for estimating ground-state and excited-state energies of certain quantum systems.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2024

Random Circuits in the Black Hole Interior

In this paper, we present a quantitative holographic relation between a microscopic measure of randomness and the geometric length of the wormhole in the black hole interior. To this end, we perturb an AdS black hole with Brownian semiclassical sources, implementing the continuous version of a random quantum circuit for the black hole. We use the random circuit to prepare ensembles of states of the black hole whose semiclassical duals contain Einstein-Rosen (ER) caterpillars: long cylindrical wormholes with large numbers of matter inhomogeneities, of linearly growing length with the circuit time. In this setup, we show semiclassically that the ensemble of ER caterpillars of average length $k\ell_Δ$ and matter correlation scale $\ell_Δ$ forms an approximate quantum state $k$-design of the black hole. At exponentially long circuit times, the ensemble of ER caterpillars becomes polynomial-copy indistinguishable from a collection of random states of the black hole. We comment on the implications of these results for holographic circuit complexity and for the holographic description of the black hole interior.

FOS: Physical sciences↗

NASA NTRS1970

Solid state remote circuit selector switch

Remote switching circuit utilizes voltage logic to switch on desired circuit. Circuit controls rotating multi-range pressure transducers in jet engine testing and can be used in coded remote circuit activator where sequence of switching has to occur in defined length of time to prevent false or undesired circuit activation.

Peterson, V. S.↗

NASA NTRS1970

Man-machine interactive system simplifies computer-aided circuit design

Langley interactive computerized circuit analysis capability /LICCA/ enables designer to draw electronic circuit diagrams on cathode ray tube screen. This information is submitted as input to user-selected circuit analysis program. LICCA accommodates binary logic circuits and circuits with discrete components, and monitors operator's instructions to detect errors.

Bavuso, S. J.↗

NASA NTRS1971

Radiation damage in MOS integrated circuits, Part 1

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

Danchenko, V.↗

NASA NTRS1976

Modular design of high frequency circuits

Method of circuit development separates electrical functions into noninterdependent parts, uses standard, commercially available circuit elements, and establishes unified circuit-packaging arrangement. Packaging scheme is cost-effective, does not compromise electrical circuit performance from video to UHF frequencies, and leaves circuits accessible for modification and adjustment.

Zimmer, J. T.↗

NASA NTRS1977

A nickel-cadmium battery reconditioning circuit

The circuit presented is simple and small enough to be included in a typical battery charge/power control assembly, yet provides the advantage of a complete ground-type battery reconditioning discharge. Test results on the circuit when used to recondition two 24 cell, 20 A-h nickel-cadmium batteries are given. These results show that a battery reconditioned with this circuit returns to greater than 90 percent of its original capacity (greater than nameplate capacity) and follows a typical new battery degradation curve even after over 20,000 simulated orbital cycles for a 4 year period. Applications of the circuit are considered along with recommendations relative to its use. Its application in low voltage (22 to 36 Vdc) power systems and in high voltage (100 to 150 Vdc) power systems is discussed. The implications are that the high voltage systems have a greater need for battery reconditioning than their low voltage counterparts, and that using these circuit techniques, the expected life of a battery in low Earth orbit can be up to 5 years.

Lanier, R.↗

NASA NTRS1979

Method for analyzing radiation sensitivity of integrated circuits

A method for analyzing the radiation sensitivity of an integrated circuit is described to determine the components. The application of a narrow radiation beam to portions of the circuit is considered. The circuit is operated under normal bias conditions during the application of radiation in a dosage that is likely to cause malfunction of at least some transistors, while the circuit is monitored for failure of the irradiated transistor. When a radiation sensitive transistor is found, then the radiation beam is further narrowed and, using a fresh integrated circuit, a very narrow beam is applied to different parts of the transistor, such as its junctions, to locate the points of greatest sensitivity.

Gauthier, M. K.↗