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At least 217 records · Page 12

All sources NASA NTRS DOE OSTI

NASA NTRS2010

Electrically Variable Resistive Memory Devices

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Liu, Shangqing↗

NASA NTRS2013

Inferring Soil Moisture Memory from Streamflow Observations Using a Simple Water Balance Model

Soil moisture is known for its integrative behavior and resulting memory characteristics. Soil moisture anomalies can persist for weeks or even months into the future, making initial soil moisture a potentially important contributor to skill in weather forecasting. A major difficulty when investigating soil moisture and its memory using observations is the sparse availability of long-term measurements and their limited spatial representativeness. In contrast, there is an abundance of long-term streamflow measurements for catchments of various sizes across the world. We investigate in this study whether such streamflow measurements can be used to infer and characterize soil moisture memory in respective catchments. Our approach uses a simple water balance model in which evapotranspiration and runoff ratios are expressed as simple functions of soil moisture; optimized functions for the model are determined using streamflow observations, and the optimized model in turn provides information on soil moisture memory on the catchment scale. The validity of the approach is demonstrated with data from three heavily monitored catchments. The approach is then applied to streamflow data in several small catchments across Switzerland to obtain a spatially distributed description of soil moisture memory and to show how memory varies, for example, with altitude and topography.

Soil Moisture↗

NASA NTRS2008

Disturb testing in flash memories

Non-volatile memory technology as defined by NAND architecture flash memory continues to lead the process scaling and device shrinking efforts of the entire integrated circuit industry. 45- nm technology nodes are now producing commercial 32Gb devices. These latest 32Gb devices are pioneering new charge trapping memory cell technologies using metal gates and high-k dielectric materials. These cells are called TANOS and consist of tantalum-nitride, aluminum oxide (high k material), nitride, oxide, and silicon. Such high-density memories continue to revolutionize commercial electronics in terms of new high-speed data architectures and significant reductions in overall power and weight consumption. In stark contrast, nearly all science-based interplanetary and earth-orbiting NASA spacecraft are still designing in and around mid-1980s-level non-volatile technology with 1Mb Electrically Erasable Read-Only Memory (EEPROM) devices. NASA has typically shunned the use of modern flash devices because of radiation and reliability concerns due to the commercial-offthe– shelf (COTS) nature of the NAND flash technology. Given the significant potential increases in overall system capability these modern flash devices could bring to NASA missions, it is important to continue to investigate these devices. This report will investigate certain portions of the reliability performance of NAND flash devices, specifically the disturb properties. Understanding the possible limitations such new non-volatile memory technology presents to NASA is the goal of this report.

Freie, Michael↗

NASA NTRS2018

A Novel 3D DRAM Memory Cube Architecture for Space Applications

The first mainstream products in 3D IC design are memory devices where multiple memory tiers are horizontally integrated to offer manifold improvements compared with their 2D counterparts. Unfortunately, none of these existing 3D memory cubes are ready for harsh space environments. This paper presents a new memory cube architecture for space, based on vertical integration of Commercial Off-The-Shelf (COTS), 3D stacked, DRAM memory devices with a custom Radiation-Hardened-By-Design (RHBD) controller offering high memory capacity, robust reliability and low latency.Validation and evaluation of the ASIC controller will be conducted prior to tape-out on a custom FPGA-based emulator platform integrating the 3D-stack.

Yang-Scharlotta, Jean↗

DOE OSTI2019

Cache coherence for processing in memory

A cache coherence bridge protocol provides an interface between a cache coherence protocol of a host processor and a cache coherence protocol of a processor-in-memory, thereby decoupling coherence mechanisms of the host processor and the processor-in-memory. The cache coherence bridge protocol requires limited change to existing host processor cache coherence protocols. The cache coherence bridge protocol may be used to facilitate interoperability between host processors and processor-in-memory devices designed by different vendors and both the host processors and processor-in-memory devices may implement coherence techniques among computing units within each processor. The cache coherence bridge protocol may support different granularity of cache coherence permissions than those used by cache coherence protocols of a host processor and/or a processor-in-memory. The cache coherence bridge protocol uses a shadow directory that maintains status information indicating an aggregate view of copies of data cached in a system external to a processor-in-memory containing that data.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2020

Memory access system

A method and system for accessing a memory for a data processing system. The method comprises sending a read request for a plurality of locations in the memory to read the plurality of locations in parallel based on an upper bound for reading the memory. The upper bound for a number of locations is based on a group of constraints for the memory. The method receives a summed value of a plurality of memory values in the plurality of locations in the memory.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

Bit error protection in cache memories

A computing device having a cache memory that is configured in a write-back mode is described. A cache controller in the cache memory acquires, from a record of bit errors that are present in each of a plurality of portions of the cache memory, a number of bit errors in a portion of the cache memory. The cache controller detects a coherency state of data stored in the portion of the cache memory. Based on the coherency state and the number of bit errors, the cache controller selects an error protection from among a plurality of error protections. The cache controller uses the selected error protection to protect the data stored in the portion of the cache memory from errors.

Kalamatianos, John↗

DOE OSTI2022

Ballistic reversible superconducting memory element

A reversible memory element is provided. The reversible memory element comprises a reversible memory cell comprising a Josephson junction and a passive inductor. A ballistic interconnect is connected to the reversible memory cell by a bidirectional input/output port. A polarized input fluxon propagating along the ballistic interconnect exchanges polarity with a stationary stored fluxon in the reversible memory cell in response to the input fluxon reflecting off the reversible memory cell.

Frank, Michael P.↗

DOE OSTI2022

Shape memory polymers

New shape memory polymer compositions, methods for synthesizing new shape memory polymers, and apparatus comprising an actuator and a shape memory polymer wherein the shape memory polymer comprises at least a portion of the actuator. A shape memory polymer comprising a polymer composition which physically forms a network structure wherein the polymer composition has shape-memory behavior and can be formed into a permanent primary shape, re-formed into a stable secondary shape, and controllably actuated to recover the permanent primary shape. Polymers have optimal aliphatic network structures due to minimization of dangling chains by using monomers that are symmetrical and that have matching amine and hydroxl groups providing polymers and polymer foams with clarity, tight (narrow temperature range) single transitions, and high shape recovery and recovery force that are especially useful for implanting in the human body.

59 BASIC BIOLOGICAL SCIENCES↗

DOE OSTI2023

Shape memory polymers

Wilson, Thomas S.↗

DOE OSTI2025

DEVELOPMENT OF INEXPENSIVE HIGH TEMPERATURE NITI-BASED SHAPE MEMORY ALLOYS FOR POWDER BED ADDITIVE MANUFACTURING

NiTi and NiTi-based Shape Memory Alloys (SMA) exhibit a reversible solid-state phase transformation from martensite to austenite driven by thermal energy. High temperature (Mf>100°C) SMAs are martensite at room temperature and can be fabricated into solid-state actuators that return to a pre-programmed shape against a designed load after heating to transformation threshold. Reactive as-fabricated additively manufactured parts (4-D printing) is the current state of the art in manufacturing of SMAs but requires compositions compliant to rapid solidification. Existing actuator designs are developed from commercially available, highly investigated material compositions. However, existing high temperature high performance (high actuation strain, low thermal hysteresis) shape memory alloys contain significant (>10% at.) portions of high-cost Platinum Group Metals (PGMs). It is of significant scientific interest to investigate material compositions that are peer performing or superior to PGMs whose constituent elements represent a significant cost savings. Shape memory alloy properties vary significantly with small (0.1% at.) compositional changes making robust investigative sample sets very large. Computational material design can be deployed to shrink the compositional space of possible alloy combinations and reduce the experimental load in material discovery. Investigating shape memory effect (SME) and validating process additive process parameters for a single novel composition is cost intensive in both time and consumed materials. Additionally, sub-optimal processing, oxygen, or solidification rate sensitivity could render additively manufacturing specimens without micro, macro cracks, or significant chemical variance impossible. Unfortunately, such failure susceptibility cannot be simulated. Therefore, a research pathway to validate novel shape memory alloy compositions for powder bed fusion additive manufacturing without the need for powdered feedstock is also proposed. This research investigates novel high temperature shape memory alloys for actuators without platinum group alloying elements to discover one that could be commercially viable as an additive manufacturing feedstock.

Sundermann, Tayler↗

DOE OSTI2022

Optically connected memory for disaggregated data centers

Recent advances in integrated photonics enable the implementation of reconfigurable, high-bandwidth, and low energy-per-bit interconnects in next-generation data centers. We propose and evaluate an Optically Connected Memory (OCM) architecture that disaggregates the main memory from the computation nodes in data centers. OCM is based on micro-ring resonators (MRRs), and it does not require any modification to the DRAM memory modules. We calculate energy consumption from real photonic devices and integrate them into a system simulator to evaluate performance. Here, our results show that (1) OCM is capable of interconnecting four DDR4 memory channels to a computing node using two fibers with 1.02 pJ energy-per-bit consumption and (2) OCM performs up to 5.5× faster than a disaggregated memory with 40G PCIe NIC connectors to computing nodes.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2022

Metall: A persistent memory allocator for data-centric analytics

Data analytics applications transform raw input data into analytics-specific data structures before performing analytics. Unfortunately, such data ingestion steps are often more expensive than analytics. In addition, various types of NVRAM devices are already used in many HPC systems today. Such devices will be useful for storing and reusing data structures beyond a single process life cycle. We developed Metall, a persistent memory allocator built on top of the memory-mapped file mechanism. Metall enables applications to transparently allocate custom C++ data structures into various types of persistent memories. Metall incorporates a concise and high-performance memory management algorithm inspired by Supermalloc and the rich C++ interface developed by Boost.Interprocess library. On a dynamic graph construction workload, Metall achieved up to 11.7x and 48.3x performance improvements over Boost.Interprocess and memkind (PMEM kind), respectively. We also demonstrate Metall’s high adaptability by integrating Metall into a graph processing framework, GraphBLAS Template Library. Here this study’s outcomes indicate that Metall will be a strong tool for accelerating future large-scale data analytics by allowing applications to leverage persistent memory efficiently.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2023

COLLABORATIVE DEVELOPMENT PROJECTS - PHOTONIC MEMORY CONTROLLER MODULE (P-MCM)

As computational density for high-performance computing and big-data services continues to scale, performance scalability of next generation computing systems is becoming increasingly constrained by limitations in memory access, power dissipation and chip packaging. The processor-memory communication bottleneck, a major challenge in current multicore processors due to limited pin-out and power budget, presents a detrimental scaling barrier to data-intensive computing. A consortium team of small businesses and leading researchers that includes experts from photonics processor-memory architecture, III/V photonic laser design/fabrication, silicon photonics design/fabrication, photonics packaging and assembly, and FPGA-based high-performance memory controller IP development – to collaboratively develop a commercialization path for a Photonic Memory Controller Module (P-MCM).

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

In situ Parallel Training of Analog Neural Network Using Electrochemical Random-Access Memory

In-memory computing based on non-volatile resistive memory can significantly improve the energy efficiency of artificial neural networks. However, accurate in situ training has been challenging due to the nonlinear and stochastic switching of the resistive memory elements. One promising analog memory is the electrochemical random-access memory (ECRAM), also known as the redox transistor. Its low write currents and linear switching properties across hundreds of analog states enable accurate and massively parallel updates of a full crossbar array, which yield rapid and energy-efficient training. While simulations predict that ECRAM based neural networks achieve high training accuracy at significantly higher energy efficiency than digital implementations, these predictions have not been experimentally achieved. In this work, we train a 3 × 3 array of ECRAM devices that learns to discriminate several elementary logic gates (AND, OR, NAND). We record the evolution of the network’s synaptic weights during parallel in situ (on-line) training, with outer product updates. Due to linear and reproducible device switching characteristics, our crossbar simulations not only accurately simulate the epochs to convergence, but also quantitatively capture the evolution of weights in individual devices. The implementation of the first in situ parallel training together with strong agreement with simulation results provides a significant advance toward developing ECRAM into larger crossbar arrays for artificial neural network accelerators, which could enable orders of magnitude improvements in energy efficiency of deep neural networks.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2025

Interactions Enhance Ramp Reversal Memory in Locally Phase Separated Materials

The ramp-reversal memory (RRM) effect in metal–insulator transition metal oxides (TMOs), a non-volatile resistance change induced by repeated temperature cycling, has attracted considerable interest in neuromorphic computing and non-volatile memory devices. Our previous defect motion model successfully explained RRM in vanadium dioxide (VO 2 ), capturing observed critical temperature shifts and memory accumulation throughout the sample. However, this approach lacked interactions between metallic and insulating domains. Here, we extend our model by combining a correlated Random Field Ising Model with defect diffusion-segregation, enabling accurate hysteresis modeling while predicting the relationship between RRM and domain interactions. Our simulations demonstrate that the maximum RRM occurs when the turnaround temperature approaches the inflection point. This peak in RRM vs. turnaround temperature is consistent with prior transport measurements, as well as our own optical measurements reported here. Significantly, we find that increasing nearest-neighbor interactions enhances the maximum memory effect, thus providing a clear mechanism for optimizing RRM performance. Since our model employs minimal assumptions, we predict that RRM should be a widespread phenomenon in materials exhibiting patterned phase coexistence of electronic domains. This work not only advances fundamental understanding of memory behavior in TMOs but also establishes a much-needed theoretical framework for optimizing device applications.

36 MATERIALS SCIENCE↗

DOE OSTI2023

Distributed out-of-memory NMF on CPU/GPU architectures

We propose an efficient distributed out-of-memory implementation of the non-negative matrix factorization (NMF) algorithm for heterogeneous high-performance-computing systems. The proposed implementation is based on prior work on NMFk, which can perform automatic model selection and extract latent variables and patterns from data. In this work, we extend NMFk by adding support for dense and sparse matrix operation on multi-node, multi-GPU systems. The resulting algorithm is optimized for out-of-memory problems where the memory required to factorize a given matrix is greater than the available GPU memory. Memory complexity is reduced by batching/tiling strategies, and sparse and dense matrix operations are significantly accelerated with GPU cores (or tensor cores when available). Input/output latency associated with batch copies between host and device is hidden using CUDA streams to overlap data transfers and compute asynchronously, and latency associated with collective communications (both intra-node and inter-node) is reduced using optimized NVIDIA Collective Communication Library (NCCL) based communicators. Benchmark results show significant improvement, from 32X to 76x speedup, with the new implementation using GPUs over the CPU-based NMFk. Good weak scaling was demonstrated on up to 4096 multi-GPU cluster nodes with approximately 25,000 GPUs when decomposing a dense 340 Terabyte-size matrix and an 11 Exabyte-size sparse matrix of density 10 -6 .

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2026

Genetic variations and their interaction with thirdhand smoke exposure on anxiety and memory in Collaborative Cross mice

Thirdhand smoke (THS) is linked to adverse health effects, but the effect of genetic variations on behavioral outcomes is poorly understood. To investigate this, we assessed anxiety- and memory-related behaviors in 820 mice from 21 strains of the genetically diverse Collaborative Cross (CC) mouse that were exposed to THS from 4 through 10 weeks of age. Anxiety was evaluated with a light/dark box assay with a previously established risk score system. Females were generally more sensitive: THS reduced anxiety risk in strains CC013, CC019, and CC051, but increased risk in CC036 and CC061, while males showed no significant effects. Memory was tested using passive avoidance: impairments were observed in both sexes in CC016 and CC019, with sex-dependent effects in CC002 and CC051. A genome-wide association study identified 2,347 SNPs associated with anxiety and 1,568 SNPs with memory, with 32 and 85 SNPs, respectively, interacting with THS exposure. Enrichment analyses revealed distinct biological processes underlying susceptibility, including axonogenesis, synapse organization, cognition, and learning and memory. KEGG pathway analysis identified distinct genetic pathways, including GTPase binding and GTPase regulatory activity, that act as critical molecular switches in the brain that regulate synaptic plasticity, dendritic spine structure, and neuronal signaling, directly influencing anxiety-like behaviors and memory formation. These findings show that THS exposure affects neurobehavioral outcomes in a sex- and genotype-dependent manner, highlighting critical gene-environment interactions and providing a foundation for mechanistic insights into THS neurotoxicity

Anxiety↗