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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1988

The design and implementation of the Technical Facilities Controller (TFC) for the Goldstone deep space communications complex

The Technical Facilities Controller is a microprocessor-based energy management system that is to be implemented in the Deep Space Network facilities. This system is used in conjunction with facilities equipment at each of the complexes in the operation and maintenance of air-conditioning equipment, power generation equipment, power distribution equipment, and other primary facilities equipment. The implementation of the Technical Facilities Controller was completed at the Goldstone Deep Space Communications Complex and is now operational. The installation completed at the Goldstone Complex is described and the utilization of the Technical Facilities Controller is evaluated. The findings will be used in the decision to implement a similar system at the overseas complexes at Canberra, Australia, and Madrid, Spain.

Killian, D. A.↗
NASA NTRS2001

Imaging Electron Spectrometer (IES) Electron Preprocessor (EPP) Design

The Aerospace Corporation developed the Electron PreProcessor (EPP) to support the Imaging Electron Spectrometer (IES) that is part of the RAPID experiment on the ESA/NASA CLUSTER mission. The purpose of the EPP is to collect raw data from the IES and perform processing and data compression on it before transferring it to the RAPID microprocessor system for formatting and transmission to the CLUSTER satellite data system. The report provides a short history of the RAPID and CLUSTER programs and describes the EPP design. Four EPP units were fabricated, tested, and delivered for the original CLUSTER program. These were destroyed during a launch failure. Four more EPP units were delivered for the CLUSTER II program. These were successfully launched and are operating nominally on orbit.

Fennell, J. F.↗
NASA NTRS1992

Formal design specification of a Processor Interface Unit

This report describes work to formally specify the requirements and design of a processor interface unit (PIU), a single-chip subsystem providing memory-interface bus-interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. The need for high-quality design assurance in such applications is an undisputed fact, given the disastrous consequences that even a single design flaw can produce. Thus, the further development and application of formal methods to fault-tolerant systems is of critical importance as these systems see increasing use in modern society.

Fura, David A.↗
NASA NTRS1982

Demonstration Advanced Avionics System (DAAS)

The feasibility of developing an integrated avionics system suitable for general aviation was determined. A design of reliable integrated avionics which provides expanded functional capability that significantly enhances the utility and safety of general aviation at a cost commensurate with the general aviation market was developed. The use of a data bus, microprocessors, electronic displays and data entry devices, and improved function capabilities were emphasized. An avionics system capable of evaluating the most critical and promising elements of an integrated system was designed, built and flight tested in a twin engine general aviation aircraft.

Source record↗
NASA NTRS1978

NASA NR hydrogen maser

The Johns Hopkins University, Applied Physics Laboratory, under contract to NASA/Goddard Space Flight Center, is engineering a new generation of field operable hydrogen masers (NR) based on prior NASA NP and NX designs. These units incorporate improvements in magnetic shielding, lower noise electronics, better thermal control and have a microprocessor for operation, monitoring and diagnostic functions. They are ruggedly built for transportability and ease of service anywhere in the world.

Rueger, L. J.↗
NASA NTRS1981

Feasibility study of a microprocessor based oculometer system

The elimination of redundancy in data to maximize processing speed and minimize storage requirements were objectives in a feasibility study of a microprocessor based oculometer system that would be portable in size and flexible in use. The appropriate architectural design of the signal processor, improved optics, and the reduction of size, weight, and power to the system were investigated. A flow chart is presented showing the strategy of the design. The simulation for developing microroutines for the high speed algorithmic processor subsystem is discussed as well as the Karhunen-Loeve transform technique for data compression.

Varanasi, M. R.↗
NASA NTRS1982

Aircraft interrogation and display system: A ground support equipment for digital flight systems

A microprocessor-based general purpose ground support equipment for electronic systems was developed. The hardware and software are designed to permit diverse applications in support of aircraft flight systems and simulation facilities. The implementation of the hardware, the structure of the software, describes the application of the system to an ongoing research aircraft project are described.

Glover, R. D.↗
NASA NTRS1984

Hardware for a real-time multiprocessor simulator

The hardware for a real time multiprocessor simulator (RTMPS) developed at the NASA Lewis Research Center is described. The RTMPS is a multiple microprocessor system used to investigate the application of parallel processing concepts to real time simulation. It is designed to provide flexible data exchange paths between processors by using off the shelf microcomputer boards and minimal customized interfacing. A dedicated operator interface allows easy setup of the simulator and quick interpreting of simulation data. Simulations for the RTMPS are coded in a NASA designed real time multiprocessor language (RTMPL). This language is high level and geared to the multiprocessor environment. A real time multiprocessor operating system (RTMPOS) has also been developed that provides a user friendly operator interface. The RTMPS and supporting software are currently operational and are being evaluated at Lewis. The results of this evaluation will be used to specify the design of an optimized parallel processing system for real time simulation of dynamic systems.

Blech, R. A.↗
NASA NTRS1990

Electromechanical actuation for thrust vector control applications

The advanced launch system (ALS), is a launch vehicle that is designed to be cost-effective, highly reliable, and operationally efficient with a goal of reducing the cost per pound to orbit. An electromechanical actuation (EMA) system is being developed as an attractive alternative to the hydraulic systems. The controller will integrate 20 kHz resonant link power management and distribution (PMAD) technology and pulse population modulation (PPM) techniques to implement field-oriented vector control (FOVC) of a new advanced induction motor. The driver and the FOVC will be microprocessor controlled. For increased system reliability, a built-in test (BITE) capability will be included. This involves introducing testability into the design of a system such that testing is calibrated and exercised during the design, manufacturing, maintenance, and prelaunch activities. An actuator will be integrated with the motor controller for performance testing of the EMA thrust vector control (TVC) system. The EMA system and work proposed for the future are discussed.

Roth, Mary Ellen↗
NASA NTRS1989

A real time, FEM based optimal control algorithm and its implementation using parallel processing hardware (transistors) in a microprocessor environment

There is an evident need to discover a means of establishing reliable, implementable controls for systems that are plagued by nonlinear and, or uncertain, model dynamics. The development of a generic controller design tool for tough-to-control systems is reported. The method utilizes a moving grid, time infinite element based solution of the necessary conditions that describe an optimal controller for a system. The technique produces a discrete feedback controller. Real time laboratory experiments are now being conducted to demonstrate the viability of the method. The algorithm that results is being implemented in a microprocessor environment. Critical computational tasks are accomplished using a low cost, on-board, multiprocessor (INMOS T800 Transputers) and parallel processing. Progress to date validates the methodology presented. Applications of the technique to the control of highly flexible robotic appendages are suggested.

Patten, William Neff↗
NASA NTRS1982

In situ measurements of thunderstorm electrical properties

An airplane sensor to measure the charge, size and two dimensional shape of precipitation particles and large cloud particles was developed. The basic design of the instrument includes: the transducers and analog electronics, the analog to digital conversion electronics and a microprocessor based system to run the electronics and load the digital data onto magnetic tape. Prototype instrumentation for the proposed lightning mapper satellite was tested by flying it in a U-2 aircraft over severe storms in Oklahoma. Flight data are compared to data from ground based instruments.

Marshall, T. C.↗
NASA NTRS1984

The PDS-VAX intelligent plate scanning system of Trieste Astronomical Observatory

An intelligent subsystem for interfacing a PDS1010A digital microdensitometer to a DEC DR11W DMA 16 bit UNIBUS port in DEC VAX VMS environment was tested. The subsystem employs two MOTOROLA M68000 microprocessors with 128 KB data memory. The PDS primitives and the user defined high level scanning functions and preprocessing modules are loaded from the host computer into two 8 KB RAM memories in the microprocessors using a dedicated PDS control language. The subsystem is planned to employ a nonstandard photomultiplier electronics. Two design schemes were tested: (1) based on three amplifiers of gain 10 cascaded and multiplexed to a 12 bit AD converter, and (2) based on a single amplifier of gain 100 and two 14 bit AD converters.

Pucillo, M.↗
NASA NTRS1984

Future interactive data systems

The information and control requirements of the investigator-users of future free-flying, platform-based, or Space Station-based scientific experiments are assessed, and the implications of these requirements for the design of the information systems are discussed. The principal requirements include near-real-time interaction with the payload, distributed or remote payload command and control, rapid access to quick-look data, flexibility of payload command sequences, on-demand uplink-downlink availability, system transparency, and modular design to facilitate replacement of system components. Current developments in systems architecture such as increased use of onboard microprocessors to select and preprocess data and transmit autonomous streams directly to the user, standardization of interfaces, and the NASA Tracking and Data Relay Satellite System are characterized, and block diagrams of present and future systems are provided.

Bracken, P. A.↗
NASA NTRS1989

RCTS: A flexible environment for sensor integration and control of robot systems; the distributed processing approach

Most robot systems lack a suitable hardware and software environment for the efficient research of new control and sensing schemes. Typically, engineers and researchers need to be experts in control, sensing, programming, communication and robotics in order to implement, integrate and test new ideas in a robot system. In order to reduce this time, the Robot Controller Test Station (RCTS) has been developed. It uses a modular hardware and software architecture allowing easy physical and functional reconfiguration of a robot. This is accomplished by emphasizing four major design goals: flexibility, portability, ease of use, and ease of modification. An enhanced distributed processing version of RCTS is described. It features an expanded and more flexible communication system design. Distributed processing results in the availability of more local computing power and retains the low cost of microprocessors. A large number of possible communication, control and sensing schemes can therefore be easily introduced and tested, using the same basic software structure.

Allard, R.↗
NASA NTRS1993

High performance flight computer developed for deep space applications

The development of an advanced space flight computer for real time embedded deep space applications which embodies the lessons learned on Galileo and modern computer technology is described. The requirements are listed and the design implementation that meets those requirements is described. The development of SPACE-16 (Spaceborne Advanced Computing Engine) (where 16 designates the databus width) was initiated to support the MM2 (Marine Mark 2) project. The computer is based on a radiation hardened emulation of a modern 32 bit microprocessor and its family of support devices including a high performance floating point accelerator. Additional custom devices which include a coprocessor to improve input/output capabilities, a memory interface chip, and an additional support chip that provide management of all fault tolerant features, are described. Detailed supporting analyses and rationale which justifies specific design and architectural decisions are provided. The six chip types were designed and fabricated. Testing and evaluation of a brass/board was initiated.

Bunker, Robert L.↗
NASA NTRS1996

SEDSAT-1 Technology Development

The Students for the Exploration and Development of Space Satellite (SEDSAT-1) is an ambitious project to design, build, and fly a generally-accessible low-cost satellite which will 1) act as a technology demonstration to verify the suitability of novel optical, battery, microprocessor, and memory hardware for space flight environments, (2) to advance the understanding of tether dynamics and environmental science through the development of advanced imaging experiments, (3) to act as a communication link for radio amateurs, and (4) to provide graduate and undergraduate students with a unique multi-disciplinary experience in designing complex real-world hardware/software. This report highlights the progress made on this project during the time period from January 2, 1996 to June 1, 1996 at the end of which time the SEASIS 0.7 version software was completed and integrated on the SEASIS breadboard, a functional prototype of the Panoramic Annual Lenses (PAL) camera was developed, the preferred image compression technique was selected, the layout of the SEASIS board was begun, porting of the SCOS operating system to the command data system (CDS) board was begun, a new design for a tether release mechanism was developed, safety circuitry to inhibit tether cutting was developed and prototyped, material was prepared to support a comprehensive safety review of the project which was held at Johnson Space Center (JSC) (which was personally attended by one of the Principal Investigators), and prototype ground software was developed.

Maier, Mark W.↗
NASA NTRS2019

Standardizing Microprocessor and GPU Radiation Test Approaches

Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.

GPU↗
NASA NTRS1996

Design and implementation of scalable tape archiver

In order to reduce costs, computer manufacturers try to use commodity parts as much as possible. Mainframes using proprietary processors are being replaced by high performance RISC microprocessor-based workstations, which are further being replaced by the commodity microprocessor used in personal computers. Highly reliable disks for mainframes are also being replaced by disk arrays, which are complexes of disk drives. In this paper we try to clarify the feasibility of a large scale tertiary storage system composed of 8-mm tape archivers utilizing robotics. In the near future, the 8-mm tape archiver will be widely used and become a commodity part, since recent rapid growth of multimedia applications requires much larger storage than disk drives can provide. We designed a scalable tape archiver which connects as many 8-mm tape archivers (element archivers) as possible. In the scalable archiver, robotics can exchange a cassette tape between two adjacent element archivers mechanically. Thus, we can build a large scalable archiver inexpensively. In addition, a sophisticated migration mechanism distributes frequently accessed tapes (hot tapes) evenly among all of the element archivers, which improves the throughput considerably. Even with the failures of some tape drives, the system dynamically redistributes hot tapes to the other element archivers which have live tape drives. Several kinds of specially tailored huge archivers are on the market, however, the 8-mm tape scalable archiver could replace them. To maintain high performance in spite of high access locality when a large number of archivers are attached to the scalable archiver, it is necessary to scatter frequently accessed cassettes among the element archivers and to use the tape drives efficiently. For this purpose, we introduce two cassette migration algorithms, foreground migration and background migration. Background migration transfers cassettes between element archivers to redistribute frequently accessed cassettes, thus balancing the load of each archiver. Background migration occurs the robotics are idle. Both migration algorithms are based on access frequency and space utility of each element archiver. To normalize these parameters according to the number of drives in each element archiver, it is possible to maintain high performance even if some tape drives fail. We found that the foreground migration is efficient at reducing access response time. Beside the foreground migration, the background migration makes it possible to track the transition of spatial access locality quickly.

Nemoto, Toshihiro↗