Results for “printed circuits” — Page 12

NASA NTRS1986

Coating Circuit Boards With Silicone

Techniques appropriate to boards containing CMOS circuits detailed. Document presents procedure for applying thin conformal coating to such electronic assemblies as printed-circuit boards and wire-wrapped boards. Coating is from 1 to 7 mils (25 to 178 micrometers) thick and composed of room-temperature-vulcanizing (RTV) silicone. Specifies materials, equipment, spraying method, and quality requirements. Takes into account special needs of circuits made with complementary metal-oxide/semiconductor (CMOS) devices on circuit boards. Special attention given to preventing damage by electrostatic discharge, to which CMOS circuits especially sensitive.

Gaudiano, S.↗

NASA NTRS2010

RF Device for Acquiring Images of the Human Body

A safe, non-invasive method for forming images through clothing of large groups of people, in order to search for concealed weapons either made of metal or not, has been developed. A millimeter wavelength scanner designed in a unique, ring-shaped configuration can obtain a full 360 image of the body with a resolution of less than a millimeter in only a few seconds. Millimeter waves readily penetrate normal clothing, but are highly reflected by the human body and concealed objects. Millimeter wave signals are nonionizing and are harmless to human tissues when used at low power levels. The imager (see figure) consists of a thin base that supports a small-diameter vertical post about 7 ft (=2.13 m) tall. Attached to the post is a square-shaped ring 2 in. (=5 cm) wide and 3 ft (=91 cm) on a side. The ring is oriented horizontally, and is supported halfway along one side by a connection to a linear bearing on the vertical post. A planar RF circuit board is mounted to the inside of each side of the ring. Each circuit board contains an array of 30 receivers, one transmitter, and digitization electronics. Each array element has a printed-circuit patch antenna coupled to a pair of mixers by a 90 coupler. The mixers receive a reference local oscillator signal to a subharmonic of the transmitter frequency. A single local oscillator line feeds all 30 receivers on the board. The resulting MHz IF signals are amplified and carried to the edge of the board where they are demodulated and digitized. The transmitted signal is derived from the local oscillator at a frequency offset determined by a crystal oscillator. One antenna centrally located on each side of the square ring provides the source illumination power. The total transmitted power is less than 100 mW, resulting in an exposure level that is completely safe to humans. The output signals from all four circuit boards are fed via serial connection to a data processing computer. The computer processes the approximately 1-MB data set into a three-dimensional image in a matter of seconds. The innovation is to configure the receiver array in a ring topology surrounding the scanned object. The ring is then scanned vertically to cover the necessary two-dimensional surface. This fabrication of the ring is made possible by using planar antenna and circuit technology. A planar circuit board serves as a medium for both antennas and signal processing components. Using this technique, parts counts are kept low, and the cost per element is a small fraction of a waveguide-based system.

Gaier, Todd C.↗

DOE OSTI2025

Tuning the Selectivity of Carboxylic Acid–Based Eutectic Solvents for the Dissolution and Electrochemical Separation of Metal Oxides

Extracting metals from natural resources and recovering from waste materials with less-hazardous solvents is essential for sustainable technological advancements. The commonly employed method utilizes harsh chemicals for metal dissolution and the ensuing separation. Here, in this study, we examined the potential of eutectic solvents (types III and IV) as alternative media for the selective dissolution of metals and metal oxides and their subsequent electrochemical separation. Notably, type III eutectics composed of betaine:acetic acid and triazole:lactic acid exhibited excellent solubility for cobalt oxide (24.1 g·L –1 ) and copper oxide (30.5 g·L –1 ), respectively. In comparison, the type IV eutectic mixture of Ca(NO 3 ) 2 ·4H 2 O:acetic acid demonstrated the highest conductivity and lowest viscosity with solubility for both copper oxide (6.1 g·L –1 ) and metallic copper (5.4 g·L –1 from a used electronic circuit). Using a Ca(NO 3 ) 2 ·4H 2 O:acetic acid mixture, copper was selectively dissolved from a waste printed circuit board and subsequently electrodeposited onto a nickel electrode. These findings highlight the tunability of DESs for the selective recovery of metals from electronic waste, offering a promising approach for sustainable metal recycling and resource recovery.

electrodeposition↗

NASA NTRS1968

Input gate circuit converted for use as linear amplifier

Commercially available integrated circuit that is marketed as a digital computer input gate circuit was converted to a linear amplifier in a microphone circuit that has high input impedance, low output impedance, low cost, and is small enough to fit on a standard printed circuit card.

Harper, T. P.↗

NASA NTRS1975

Battery peak charge voltage monitor for dual air density satellite

A battery peak charge voltage monitor was developed for use on the dual air density satellite (DADS). This device retains a reading of the maximum voltage reached by the spacecraft battery during periods of charging, and makes it available during periods of data transmission. The monitor is connected across the battery and operates solely from the battery; it is powered continuously with quiescent input current of only 3 milliamperes. Standard integrated circuits and a thin-film resistor network are utilized. The monitor occupies approximately 40 square centimeters of a printed-circuit board within a larger electronic package.

Shull, T. A.↗

NASA NTRS2013

Impedance Discontinuity Reduction Between High-Speed Differential Connectors and PCB Interfaces

High-speed serial communication (i.e., Gigabit Ethernet) requires differential transmission and controlled impedances. Impedance control is essential throughout cabling, connector, and circuit board construction. An impedance discontinuity arises at the interface of a high-speed quadrax and twinax connectors and the attached printed circuit board (PCB). This discontinuity usually is lower impedance since the relative dielectric constant of the board is higher (i.e., polyimide approx. = 4) than the connector (Teflon approx. = 2.25). The discontinuity can be observed in transmit or receive eye diagrams, and can reduce the effective link margin of serial data networks. High-speed serial data network transmission improvements can be made at the connector-to-board interfaces as well as improving differential via hole impedances. The impedance discontinuity was improved by 10 percent by drilling a 20-mil (approx. = 0.5-mm) hole in between the pin of a differential connector spaced 55 mils (approx. = 1.4 mm) apart as it is attached to the PCB. The effective dielectric constant of the board can be lowered by drilling holes into the board material between the differential lines in a quadrax or twinax connector attachment points. The differential impedance is inversely proportional to the square root of the relative dielectric constant. This increases the differential impedance and thus reduces the above described impedance discontinuity. The differential via hole impedance can also be increased in the same manner. This technique can be extended to multiple smaller drilled holes as well as tapered holes (i.e., big in the middle followed by smaller ones diagonally).

Navidi, Sal↗

NASA NTRS1991

Phase-lock-loop application for fiber optic receiver

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.

Ruggles, Stephen L.↗

NASA NTRS1999

Electronically conducting polymers with silver grains

The present invention provides electronically conducting polymer films formed from photosensitive formulations of pyrrole and an electron acceptor that have been selectively exposed to UV light, laser light, or electron beams. The formulations may include photoinitiators, flexibilizers, solvents and the like. These solutions can be used in applications including printed circuit boards and through-hole plating and enable direct metallization processes on non-conducting substrates. After forming the conductive polymer patterns, a printed wiring board can be formed by sensitizing the polymer with palladium and electrolytically depositing copper.

Murphy, Oliver J.↗

NASA NTRS2001

Method of forming electronically conducting polymers on conducting and nonconducting substrates

The present invention provides electronically conducting polymer films formed from photosensitive formulations of pyrrole and an electron acceptor that have been selectively exposed to UV light, laser light, or electron beams. The formulations may include photoinitiators, flexibilizers, solvents and the like. These solutions can be used in applications including printed circuit boards and through-hole plating and enable direct metallization processes on non-conducting substrates. After forming the conductive polymer patterns, a printed wiring board can be formed by sensitizing the polymer with palladium and electrolytically depositing copper.

Murphy, Oliver J.↗

NASA NTRS2019

Characterization of Low-Temperature, Co-Fired Ceramic-Manufactured Electrostatic Thruster-Closeout Report

The goal of the project was to evaluate prototypes of an experimental thruster developed by the University of Arkansas (UA), Fayetteville, AR. The design under evaluation is a radio frequency (RF) electrostatic thruster that was fabricated using the low-temperature, co-fired ceramic (LTCC) materials and fabrication process. This materials system is analogous to printed circuit board (PCB) technology with the most significant difference being that the laminate is replaced by a ceramic material and the copper layer is replaced by printed sinterable silver paste. LTCC designs are baked after fabrication and assembled to realize an entirely monolithic structure with internal conductors, vias, and cavities. In this process, the LTCC electrostatic thruster (LTCC-ET) that is the subject of the present work becomes a monolithic ceramic thruster capable of withstanding temperatures in excess of 500 ºC. The UA and NASA Marshall Space Flight Center (MSFC) jointly performed prototype testing on the LTCC-ET under a NASA Cooperative Agreement Notice (CAN) award. The LTCC-ET was tested at MSFC in May 2018 over a 1-week period. There were two goals for the test program: (1) Testing to determine the operating parameters required to create plasma ignition in the test articles. This was explored by setting a propellant flowrate and increasing RF power until plasma ignition was observed. Testing was conducted with both argon and krypton. (2) Investigate the thrust and specific impulse (Isp) performance of the thruster as a function of propellant flowrate and grid voltage. This goal was not met during the project as technical challenges in maintaining stable plasma ignition arose due to stress and heating of the RF power feed. In summary, a prototype thruster design (consisting of three packaged units) was fabricated by UA and tested for the first time under vacuum conditions at MSFC to experimentally determine basic performance metrics and functionality. It was found that the design was not sufficiently optimized or robust enough in its initial iteration to support a significant test campaign or characterization program. It was concluded that the propellant outlet channels must be reduced in size with the flowpaths adjusted to increase propellant residence time in the thruster, and that the RF connector must be replaced with a version capable of handling higher power throughput and heating. However, even in its unoptimized form, a plasma could be produced in the LTCCET, demonstrating the efficacy of the design approach. The design is especially compelling due to its low cost to manufacture and, more importantly, its scalability of size and power throughput. Low cost and scalability are also important in that additional functionalities, such as thrust vectoring and plume charge neutralization, can be integrated into future designs with minimal additional cost. This project has matured the LTCC-ET development Technology Readiness Level (TRL) from 1 to 2. The low-cost RF plasma source portion of the LTCC device was matured from TRL 2 to 4 through the demonstration of RF plasma ignition under vacuum conditions.

Huang, P.-H. A.↗

NASA NTRS1979

Circuit-lead trimming template

Template for use in trimming leads on production wiring boards is low-cost means for eliminating rejections for short leads and improving lead-strength uniformity. Template is simply unclad piece of printed-circuit board material that is drilled using same drill control tape used in making original production board. Revisions in component layout of board can therefore be made simultaneously in template.

Ofarrell, K.↗

DOE OSTI2024

High Precision, High Frequency Printed Antennas

An emerging trend in advanced manufacturing is printed electronics and sensors. The ability to print customized electronics and sensors integrated into functional packages is a growing need within a variety of growing markets such as smart manufacturing, internet of things (IoT), and the small satellite industry. Both Oak Ridge National Laboratory (ORNL) and the MITRE Corporation have seedling research efforts evaluating the potential for future printed electronic systems. High frequency, wide-bandwidth phased array antennas (i.e. >45 GHz) open the door to new applications. However, such sensors require currently prohibitively small feature sizes for commercial 3D printing technologies along with increasing challenges with connecting the driving electronics to such features. An additional finding with related advanced manufacturing challenges is the rapid production of 3D additive connectors for integration with commercial printed circuit boards (PCBs), primarily for advanced in-circuit inspection techniques. This work is developing additive manufacturing processes for producing connected and conductive fine scale 3D features. The primary focus was on aerosol-jet printing (AJP), which has a small minimum resolution (<50 µm) but is traditionally printed flat with small height/width aspect ratios <<1, and developing controls to enable fully 3D, high aspect ratio, and unsupported features. In Phase 1 of this effort, baselines of process performance were characterized, and test coupons produced for both ultra-high frequency antennas and microstructures to support reverse engineering of PCBs. In Phase 2, these efforts will be extended for system demonstration of ultra-high frequency antenna arrays, as well as reverse engineering circuitry for dense PCBs.

42 ENGINEERING↗

NASA NTRS1983

RF front end interface and AGC modification

Preliminary results indicate that the new front end automatic gain control (AGC) combination perform satisfactorily. Side by side bench tests with Trimble 10A and Texas Instruments 9900 LORAN-C receivers have proven that the proper time differences are being obtained. Further optimization of the AGC circuit will occur as software to track all of the stations in a LORAN-C chain is developed. The AGC circuit was designed to sample up to six separate LORAN-C stations. Along with expanded station tracking software, a more sophisticated search routine is also under development. A printed circuit board for the AGC is planned and will be enclosed with the RF front end in a sealed enclosure to reduce interference from the other digital circuits of the microcomputer.

Yost, S. R.↗

NASA NTRS2012

Printable Spacecraft: Flexible Electronic Platforms for NASA Missions

Atmospheric confetti. Inchworm crawlers. Blankets of ground penetrating radar. These are some of the unique mission concepts which could be enabled by a printable spacecraft. Printed electronics technology offers enormous potential to transform the way NASA builds spacecraft. A printed spacecraft's low mass, volume and cost offer dramatic potential impacts to many missions. Network missions could increase from a few discrete measurements to tens of thousands of platforms improving areal density and system reliability. Printed platforms could be added to any prime mission as a low-cost, minimum resource secondary payload to augment the science return. For a small fraction of the mass and cost of a traditional lander, a Europa flagship mission might carry experimental printed surface platforms. An Enceladus Explorer could carry feather-light printed platforms to release into volcanic plumes to measure composition and impact energies. The ability to print circuits directly onto a variety of surfaces, opens the possibility of multi-functional structures and membranes such as "smart" solar sails and balloons. The inherent flexibility of a printed platform allows for in-situ re-configurability for aerodynamic control or mobility. Engineering telemetry of wheel/soil interactions are possible with a conformal printed sensor tape fit around a rover wheel. Environmental time history within a sample return canister could be recorded with a printed sensor array that fits flush to the interior of the canister. Phase One of the NIAC task entitled "Printable Spacecraft" investigated the viability of printed electronics technologies for creating multi-functional spacecraft platforms. Mission concepts and architectures that could be enhanced or enabled with this technology were explored. This final report captures the results and conclusions of the Phase One study. First, the report presents the approach taken in conducting the study and a mapping of results against the proposed Phase One objectives. Then an overview of the general field of printed electronics is provided, including manufacturing approaches, commercial drivers, and the current state of integrated systems. The bulk of the report contains the results and findings of Phase One organized into four sections: a survey of components required for a printable spacecraft, technology roadmaps considerations, science mission and engineering applications, and potential risks and challenges of the technology.

Spacecraft↗

NASA NTRS2005

Printed Antennas Made Reconfigurable by Use of MEMS Switches

A class of reconfigurable microwave antennas now undergoing development comprise fairly conventional printed-circuit feed elements and radiating patches integrated with novel switches containing actuators of the microelectromechanical systems (MEMS) type. In comparison with solid-state electronic control devices incorporated into some prior printed microwave antennas, the MEMS-based switches in these antennas impose lower insertion losses and consume less power. Because the radio-frequency responses of the MEMS switches are more nearly linear, they introduce less signal distortion. In addition, construction and operation are simplified because only a single DC bias line is needed to control each MEMS actuator.

Simons, Rainee N.↗

NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Electric aircrafts↗

NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Multifunctional↗

DOE OSTI2024

Power Layout Design of a GaN HEMTs-Based High-Power High-Efficiency Three-Level ANPC Inverter for 800 V DC Bus System

Multiple commutation paths exist for switching devices in a three-level active neutral point clamped (3L-ANPC) inverter operation based on the selected switching state and current direction. In addition, the capacitive coupling path of the nonswitching device is a key design aspect for enabling high voltage and high current operation of gallium nitride (GaN) switches in 3L-ANPC topology. A comprehensive study of the switching transient events of inner, outer, and clamping devices of 3L-ANPC is presented in this article. The commutation mechanisms for worst-case transient voltage overshoots (TVOs) are identified. A simplified equivalent circuit model is presented to determine the design criteria for the power layout structure's parasitic inductances. A power layout strategy satisfying the design criteria is then proposed using an insulated metal substrate power printed circuit board (PCB) to enable efficient high-power operation. The proposed design minimizes the commutation and capacitive coupling path inductances to 6 nH and 11.5 nH, respectively. This enables the fast switching operation of GaN HEMTs at 800 V dc, 36 A with a low TVO of 31% verified through experimental three-level double pulse test results. Experimental evaluation of a three-phase 3L-ANPC hardware prototype based on the proposed power layout shows 99% efficiency at 800 V, 9.5 kVA and 50 kHz switching frequency. The proposed design achieves a low case-to-ambient thermal resistance of 2.3 °C/W.

42 ENGINEERING↗