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At least 217 records · Page 12

All sources NASA NTRS DOE OSTI

NASA NTRS2011

Digital Interface Board to Control Phase and Amplitude of Four Channels

An increasing number of parts are designed with digital control interfaces, including phase shifters and variable attenuators. When designing an antenna array in which each antenna has independent amplitude and phase control, the number of digital control lines that must be set simultaneously can grow very large. Use of a parallel interface would require separate line drivers, more parts, and thus additional failure points. A convenient form of control where single-phase shifters or attenuators could be set or the whole set could be programmed with an update rate of 100 Hz is needed to solve this problem. A digital interface board with a field-programmable gate array (FPGA) can simultaneously control an essentially arbitrary number of digital control lines with a serial command interface requiring only three wires. A small set of short, high-level commands provides a simple programming interface for an external controller. Parity bits are used to validate the control commands. Output timing is controlled within the FPGA to allow for rapid update rates of the phase shifters and attenuators. This technology has been used to set and monitor eight 5-bit control signals via a serial UART (universal asynchronous receiver/transmitter) interface. The digital interface board controls the phase and amplitude of the signals for each element in the array. A host computer running Agilent VEE sends commands via serial UART connection to a Xilinx VirtexII FPGA. The commands are decoded, and either outputs are set or telemetry data is sent back to the host computer describing the status and the current phase and amplitude settings. This technology is an integral part of a closed-loop system in which the angle of arrival of an X-band uplink signal is detected and the appropriate phase shifts are applied to the Ka-band downlink signal to electronically steer the array back in the direction of the uplink signal. It will also be used in the non-beam-steering case to compensate for phase shift variations through power amplifiers. The digital interface board can be used to set four 5-bit phase shifters and four 5-bit attenuators and monitor their current settings. Additionally, it is useful outside of the closed-loop system for beamsteering alone. When the VEE program is started, it prompts the user to initialize variables (to zero) or skip initialization. After that, the program enters into a continuous loop waiting for the telemetry period to elapse or a button to be pushed. A telemetry request is sent when the telemetry period is elapsed (every five seconds). Pushing one of the set or reset buttons will send the appropriate command. When a command is sent, the interface status is returned, and the user will be notified by a pop-up window if any error has occurred. The program runs until the End Program button is depressed.

Smith, Amy E.↗

NASA NTRS2012

Gigabit Ethernet Asynchronous Clock Compensation FIFO

Clock compensation for Gigabit Ethernet is necessary because the clock recovered from the 1.25 Gb/s serial data stream has the potential to be 200 ppm slower or faster than the system clock. The serial data is converted to 10-bit parallel data at a 125 MHz rate on a clock recovered from the serial data stream. This recovered data needs to be processed by a system clock that is also running at a nominal rate of 125 MHz, but not synchronous to the recovered clock. To cross clock domains, an asynchronous FIFO (first-in-first-out) is used, with the write pointer (wprt) in the recovered clock domain and the read pointer (rptr) in the system clock domain. Because the clocks are generated from separate sources, there is potential for FIFO overflow or underflow. Clock compensation in Gigabit Ethernet is possible by taking advantage of the protocol data stream features. There are two distinct data streams that occur in Gigabit Ethernet where identical data is transmitted for a period of time. The first is configuration, which happens during auto-negotiation. The second is idle, which occurs at the end of auto-negotiation and between every packet. The identical data in the FIFO can be repeated by decrementing the read pointer, thus compensating for a FIFO that is draining too fast. The identical data in the FIFO can also be skipped by incrementing the read pointer, which compensates for a FIFO draining too slowly. The unique and novel features of this FIFO are that it works in both the idle stream and the configuration streams. The increment or decrement of the read pointer is different in the idle and compensation streams to preserve disparity. Another unique feature is that the read pointer to write pointer difference range changes between compensation and idle to minimize FIFO latency during packet transmission.

Duhachek, Jeff↗

NASA NTRS2012

Downsampling Photodetector Array with Windowing

In a photon counting detector array, each pixel in the array produces an electrical pulse when an incident photon on that pixel is detected. Detection and demodulation of an optical communication signal that modulated the intensity of the optical signal requires counting the number of photon arrivals over a given interval. As the size of photon counting photodetector arrays increases, parallel processing of all the pixels exceeds the resources available in current application-specific integrated circuit (ASIC) and gate array (GA) technology; the desire for a high fill factor in avalanche photodiode (APD) detector arrays also precludes this. Through the use of downsampling and windowing portions of the detector array, the processing is distributed between the ASIC and GA. This allows demodulation of the optical communication signal incident on a large photon counting detector array, as well as providing architecture amenable to algorithmic changes. The detector array readout ASIC functions as a parallel-to-serial converter, serializing the photodetector array output for subsequent processing. Additional downsampling functionality for each pixel is added to this ASIC. Due to the large number of pixels in the array, the readout time of the entire photodetector is greater than the time between photon arrivals; therefore, a downsampling pre-processing step is done in order to increase the time allowed for the readout to occur. Each pixel drives a small counter that is incremented at every detected photon arrival or, equivalently, the charge in a storage capacitor is incremented. At the end of a user-configurable counting period (calculated independently from the ASIC), the counters are sampled and cleared. This downsampled photon count information is then sent one counter word at a time to the GA. For a large array, processing even the downsampled pixel counts exceeds the capabilities of the GA. Windowing of the array, whereby several subsets of pixels are designated for processing, is used to further reduce the computational requirements. The grouping of the designated pixel frame as the photon count information is sent one word at a time to the GA, the aggregation of the pixels in a window can be achieved by selecting only the designated pixel counts from the serial stream of photon counts, thereby obviating the need to store the entire frame of pixel count in the gate array. The pixel count se quence from each window can then be processed, forming lower-rate pixel statistics for each window. By having this processing occur in the GA rather than in the ASIC, future changes to the processing algorithm can be readily implemented. The high-bandwidth requirements of a photon counting array combined with the properties of the optical modulation being detected by the array present a unique problem that has not been addressed by current CCD or CMOS sensor array solutions.

Patawaran, Ferze D.↗

NASA NTRS2013

Impedance Discontinuity Reduction Between High-Speed Differential Connectors and PCB Interfaces

High-speed serial communication (i.e., Gigabit Ethernet) requires differential transmission and controlled impedances. Impedance control is essential throughout cabling, connector, and circuit board construction. An impedance discontinuity arises at the interface of a high-speed quadrax and twinax connectors and the attached printed circuit board (PCB). This discontinuity usually is lower impedance since the relative dielectric constant of the board is higher (i.e., polyimide approx. = 4) than the connector (Teflon approx. = 2.25). The discontinuity can be observed in transmit or receive eye diagrams, and can reduce the effective link margin of serial data networks. High-speed serial data network transmission improvements can be made at the connector-to-board interfaces as well as improving differential via hole impedances. The impedance discontinuity was improved by 10 percent by drilling a 20-mil (approx. = 0.5-mm) hole in between the pin of a differential connector spaced 55 mils (approx. = 1.4 mm) apart as it is attached to the PCB. The effective dielectric constant of the board can be lowered by drilling holes into the board material between the differential lines in a quadrax or twinax connector attachment points. The differential impedance is inversely proportional to the square root of the relative dielectric constant. This increases the differential impedance and thus reduces the above described impedance discontinuity. The differential via hole impedance can also be increased in the same manner. This technique can be extended to multiple smaller drilled holes as well as tapered holes (i.e., big in the middle followed by smaller ones diagonally).

Navidi, Sal↗

NASA NTRS2018

Parallel Monotonic Basin Hopping for Low Thrust Trajectory Optimization

Monotonic Basin Hopping has been shown to be an effective method of solving low thrust trajectory optimization problems. This paper outlines an extension to the common serial implementation by parallelizing it over any number of available compute cores. The Parallel Monotonic Basin Hopping algorithm described herein is shown to be an effective way to more quickly locate feasible solutions, and improve locally optimal solutions in an automated way without requiring a feasible initial guess. The increased speed achieved through parallelization enables the algorithm to be applied to more complex problems that would otherwise be impractical for a serial implementation. Low thrust cislunar transfers and a hybrid Mars example case demonstrate the effectiveness of the algorithm. Finally, a preliminary scaling study quantifies the expected decrease in solve time compared to a serial implementation.,

McCarty, Steven L.↗

NASA NTRS2018

Parallel Monotonic Basin Hopping for Low Thrust Trajectory Optimization

McCarty, Steven L.↗

DOE OSTI2026

Detector alignment for X-ray crystallography using Millepede-II

I describe a method for accurately refining the geometrical parameters of segmented X-ray area detectors on the basis of serial crystallography data, using 'Millepede' – an algorithm created for a very similar problem in high-energy physics. The Millepede method for serial crystallography builds on the approach of Brewster et al. [Acta Cryst. (2018), D74, 877–894], in which the detector parameters are refined simultaneously with the parameters for each individual crystal. This accounts for the mutual dependency between the parameters and thereby avoids the bias and slow convergence problems that have afflicted older approaches in which the deviations between observed and calculated Bragg peak positions were taken directly as the updates for the detector panel positions. The Millepede method uses the special structure of the least-squares normal equations to reduce them to a much smaller form that can be solved very quickly, even compared with the sparse matrix methods used previously. This makes it practical to refine the detector geometry frequently and thereby maintain accurate calibration without specialized alignment campaigns. Tilts of detector panels out of the plane can be reliably refined, as can the overall distance of the detector in the beam direction. With a simulated test case, the new method produced panel shifts within 7% of the correct values with only one iteration, and produced almost exactly correct shifts after a second iteration. A simulated out-of-plane panel rotation was correctly determined to within 0.001°. Applied to experimental data from an X-ray free-electron laser, the method increased the indexable fraction of frames from 30% to 91% in a single iteration, and to 96% after two further iterations. Computing the geometry updates on the basis of 2060 crystals took only 0.819 s on desktop computing hardware, including the time taken to read the required data from disk. The scaling was found to be very close to linear for up to 100 980 sets of crystal parameters, which took only 78.2 s to process under the same conditions. The method has been applied as part of a real-time feedback system at a synchrotron radiation beamline, in which an out-of-plane detector tilt of 0.04° was detected and corrected. Possible further applications are also described here.

Millepede-II↗

DOE OSTI2025

Field validation of dynamic mechanical torque measurements using fiber-optic strain sensors for geared wind turbines

Abstract Accurate knowledge of the mechanical loads of wind turbine gearboxes has become essential in modern, highly loaded gearbox designs, as maintaining or even improving gearbox reliability with increasing torque density demands is proving to be challenging. Unfortunately, the traditional method of measuring dynamic mechanical torque using strain gauges placed on the outer surface of a rotating shaft and transmitting the resulting signal is unsuitable for serial deployment due to technical and economic constraints. An alternative method based on fiber-optic strain sensors placed on the stationary outer surface of the gearbox ring gear has been proposed. Like shaft torsion, the radial deformation of the ring gear is proportionate to the rotor torque. Placing the sensors on a stationary component is a cost-effective alternative for serial implementation because the need for complex and expensive data transfer via wireless transmission or a slip ring is eliminated. In this paper, we present the results of an extensive field experiment conducted to evaluate the torque measurement accuracy of this novel sensing solution installed on the gearbox of a Gamesa G97 2-MW wind turbine at the National Renewable Energy Laboratory’s Flatirons Campus. Torque measurements derived from fiber-optic strain sensors placed on the ring gear of the planetary stage are compared to conventional torque measurements from strain gauges placed on the main shaft. Two different torque estimation data processing methods were evaluated, with the method based on operational deflection shapes providing the most accurate results with an average normalized root mean square error below 0.7% for a load revolution distribution analysis. The effect of operating conditions on the torque estimate was also investigated, and the third planet-passing operational deflection shape was found to be the least sensitive to nontorque load-related effects. The fiber-optic strain sensors’ successful operation during the complete test campaign has demonstrated a robust and accurate solution for fleet-wide enhanced gearbox remaining useful life estimation.

17 WIND ENERGY↗

DOE OSTI2025

gRASPA

GPU Monte Carlo Simulation Code with a taste of RASPA We present enhancements in Monte Carlo simulation speed and functionality within an open-source code, gRASPA, which uses graphical processing units (GPUs) to achieve significant performance improvements compared to serial, CPU implementations of Monte Carlo. The code supports a wide range of Monte Carlo simulations, including canonical ensemble (NVT), grand canonical, NVT Gibbs, Widom test particle insertions, and continuous-fractional component Monte Carlo. Implementation of grand canonical transition matrix Monte Carlo (GC-TMMC) and a novel feature to allow different moves for the different components of metal-organic framework (MOF) structures exemplify the capabilities of gRASPA for precise free energy calculations and enhanced adsorption studies, respectively. The introduction of a High-Throughput Computing (HTC) mode permits many Monte Carlo simulations on a single GPU device for accelerated materials discovery. The code can incorporate machine learning (ML) potentials. The open-source nature of gRASPA promotes reproducibility and openness in science, and users may add features to the code and optimize it for their own purposes. The code is written in CUDA/C++ and SYCL/C++ to support different GPU vendors. The gRASPA code is publicly available at https://github.com/snurr-group/gRASPA.

Li, Zhao [Purdue/Northwestern/Notre Dame Universit↗

DOE OSTI2024

Multi-amplifier Sensing Charge-coupled Devices for Next Generation Spectroscopy

We present characterization results and performance of a prototype Multiple-Amplifier Sensing (MAS) silicon charge-coupled device (CCD) sensor with 16 channels potentially suitable for faint object astronomical spectroscopy and low-signal, photon-limited imaging. The MAS CCD is designed to reach sub-electron readout noise by repeatedly measuring charge through a line of amplifiers during the serial transfer shifts. Using synchronized readout electronics based on the Dark Energy Spectroscopic Instrument CCD controller, we report a read noise of 1.03 e$^{−}$ rms pix$^{−1}$ at a speed of 26 μs pix$^{−1}$ with a single-sample readout scheme where charge in a pixel is measured only once for each output stage. At these operating parameters, we find the amplifier-to-amplifier charge transfer efficiency (ACTE) to be >0.9995 at low counts for all amplifiers but one for which the ACTE is 0.997. This charge transfer efficiency falls above 50,000 electrons for the read-noise optimized voltage configuration we chose for the serial clocks and gates. The amplifier linearity across a broad dynamic range from ∼300 to 35,000 e$^{−}$ was also measured to be ±2.5%. We describe key operating parameters to optimize on these characteristics and describe the specific applications for which the MAS CCD may be a suitable detector candidate.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2026

Towards time-resolved MicroED grid preparation using mix-and-inject gas dynamic virtual nozzles

Recent progress in gas dynamic virtual nozzle (GDVN) technologies in combination with high-brilliance synchrotron and X-ray free-electron lasers (XFELs) has allowed the visualization of protein dynamics in crystallo by mixing macromolecular protein crystals with a substrate using tunable mixing times on the order of milliseconds to seconds prior to serial X-ray diffraction data collection. This has become the method of choice for high-resolution structure determination of intermediate states. However, such experiments require large counts of crystals of proper sizes for high-resolution data collection, and premium beam times for screening efforts. Cryogenic microcrystal electron diffraction (MicroED) represents a complementary technique that may be a more accessible avenue for time-resolved nanocrystallography compared with serial X-ray diffraction experiments. MicroED can produce full diffraction datasets from just a few submicrometre-thick crystals, and the approach is more readily accessible, requiring standard cryogenic transmission electron microscopy (TEM) equipment available at many universities and institutes. Cryogenic MicroED, like other forms of cryo-EM, begins with rapidly freezing biological material on electron microscopy grids. In the case of MicroED, micro- to nano-crystals (<500 nm thick) are deposited onto electron microscopy grids and plunge-frozen for subsequent electron diffraction data collection. Here, we have incorporated GDVN technology developed originally for XFEL experiments into the freezing process as a first step towards time-resolved studies. We describe the limited deposition efficiency of the model MicroED protein proteinase K on TEM grids using GDVNs, preceding sample vitrification and successful MicroED data collection. We discuss both the initial results from such experiments and the methodological challenges in developing this approach into a reliable workflow for millisecond-to-second time-resolved structural studies of macromolecules. Our results promise a strategy to deposit crystals on grids using GDVNs and determine high-resolution structures by MicroED, constituting a first step towards development of time-resolved MicroED experiments.

MicroED↗

DOE OSTI2026

Versatile High-Gain Low-Noise Readout ASIC for Silicon Microstrip Tracking Detectors

This work presents Turpial, a custom-designed low- power front-end readout ASIC for microstrip silicon sensors. Implemented in 130 nm CMOS technology, the chip integrates 64 identical readout channels, each including a configurable charge-sensitive amplifier, a bipolar pulse shaper, a 32-sample 50 Msps analog memory, and a 12-bit RC-hybrid SAR ADC operating at 1 Msps. To satisfy the target power budget of 5 mW per channel, the architecture employs a time-decoupled readout scheme in which fast transient signals are first captured in the analog memory and subsequently digitized at a lower rate. Turpial supports a wide dynamic range from 1 kℎ+ to 1 Mℎ+ while maintaining low noise performance, targeting an equivalent noise charge (ENC) below 200 𝑒−including the sensor, and providing a maximum gain of 1500 mV/fC. A digital block manages slow control, data acquisition, and data serialization through dual CML 300 Mb/s serializers. In addition, an on-chip reference circuit, based on a sub-1 V bandgap reference and an integrated LDO regulator, eliminates the need for external reference circuitry. Experimental results demonstrate that both the individual building blocks and the fully integrated ASIC meet the design specifications.

Hernandez, Hugo [Stanford University] (ORCID:00000↗

DOE OSTI2026

Efficient Probabilistic Visualization of Local Divergence of 2D Vector Fields with Independent Gaussian Uncertainty

This work focuses on visualizing uncertainty of local divergence of two-dimensional vector fields. Divergence is one of the fundamental attributes of fluid flows, as it can help domain scientists analyze potential positions of sources (positive divergence) and sinks (negative divergence) in the flow. However, uncertainty inherent in vector field data can lead to erroneous divergence computations, adversely impacting downstream analysis. While Monte Carlo (MC) sampling is a classical approach for estimating divergence uncertainty, it suffers from slow convergence and poor scalability with increasing data size and sample counts. Thus, we present a two-fold contribution that tackles the challenges of slow convergence and limited scalability of the MC approach. (1) We derive a closed-form approach for highly efficient and accurate uncertainty visualization of local divergence, assuming independently Gaussian-distributed vector uncertainties. (2) We further integrate our approach into Viskores, a platform-portable parallel library, to accelerate uncertainty visualization. In our results, we demonstrate significantly enhanced efficiency and accuracy of our serial analytical (speed-up up to 1946×) and parallel Viskores (speed-up up to 19698×) algorithms over the classical serial MC approach. We also demonstrate qualitative improvements of our probabilistic divergence visualizations over traditional mean-field visualization, which disregards uncertainty. We validate the accuracy and efficiency of our methods on wind forecast and ocean simulation datasets.

Ouermi, Timbwaoga [University of Utah]↗

DOE OSTI2024

Readout optimization of multi-amplifier sensing charge-coupled devices for single-quantum measurement

The non-destructive readout capability of the Skipper Charge Coupled Device (CCD) has been demonstrated to reduce the noise limitation of conventional silicon devices to levels that allow single-photon or single-electron counting. The noise reduction is achieved by taking multiple measurements of the charge in each pixel. These multiple measurements come at the cost of extra readout time, which has been a limitation for the broader adoption of this technology in particle physics, quantum imaging, and astronomy applications. This work presents recent results of a novel sensor architecture that uses multiple non-destructive floating-gate amplifiers in series to achieve sub-electron readout noise in a thick, fully-depleted silicon detector to overcome the readout time overhead of the Skipper-CCD. This sensor is called the Multiple-Amplifier Sensing Charge-Coupled Device (MAS-CCD) can perform multiple independent charge measurements with each amplifier, and the measurements from multiple amplifiers can be combined to further reduce the readout noise. We will show results obtained for sensors with 8 and 16 amplifiers per readout stage in new readout operations modes to optimize its readout speed. The noise reduction capability of the new techniques will be demonstrated in terms of its ability to reduce the noise by combining the information from the different amplifiers, and to resolve signals in the order of a single photon per pixel. The first readout operation explored here avoids the extra readout time needed in the MAS-CCD to read a line of the sensor associated with the extra extent of the serial register. The second technique explore the capability of the MAS-CCD device to perform a region of interest readout increasing the number of multiple samples per amplifier in a targeted region of the active area of the device.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

DOE OSTI2025

TorchBraid: High-Performance Layer-Parallel Training of Deep Neural Networks with MPI and GPU Acceleration

TorchBraid is a high-performance implementation of layer-parallel training for deep neural networks (DNNs) supporting MPI-based parallelism and GPU acceleration. Layer-parallel training has been developed to overcome the serialization inherent in forward and backward propagation of DNNs that limits utilization of computational resources in the strong scaling limit. To achieve this, TorchBraid integrates the PyTorch neural network framework with the state-of-the-art XBraid time-parallel library. Furthermore, this article presents the use and performance of TorchBraid, in addition to solutions for overcoming the algorithmic challenges inherent in combining automatic differentiation with layer-parallel. Results are presented with and without GPU acceleration for the Tiny ImageNet and MNIST image classification data sets, as well as recurrent neural networks. Overall, TorchBraid enables fast training of DNNs, both in a strong and weak scaling context. In addition to the TorchBraid software, several new advances in applying layer-parallel algorithms are detailed. Integration of layer-parallel with data-parallel algorithms is presented for the first time, showing the computational advantages of the combination. Standard deep learning techniques, like batch-normalization, are developed for layer-parallel training. Finally, a new approach combining layer-parallel with spatial coarsening in order to accelerate training for 3D image classification shows roughly a 10× speedup over serial execution.

Layer-parallel↗

DOE OSTI2026

FAIRLinked: Data FAIRification Tools for Materials Data Science

FAIRLinked is a software package created to support the FAIRification of materials science data, ensuring proper alignment with FAIR principles: Findable, Accessible, Interoperable, and Reusable. It is built to be compatible with MDS-Onto, an ontology designed to capture the semantics of various types of materials data, enabling integration and sharing across different research workflows. The package is subdivided into three subpackages: InterfaceMDS, RDFTableConversion, and QBWorkflow. The first subpackage, InterfaceMDS allows users to search for terms using either string search or various filters, explore different domains and subdomains, and add terms to MDS-Onto. RDFTableConversion is used for serialization and deserialization of data from CSV into JSONLDs and vice versa in a way that captures the semantics of the data using MDS-Onto. Lastly, QBWorkflow is a serialization and deserialization workflow that incorporates RDF Data Cube vocabulary, useful for working with multidimensional datasets. By offering these packages, FAIRLinked lowers the barrier of creating FAIR, machine-actionable data for researchers in the materials science community.

FAIR↗

DOE OSTI2024

Xyce™ Parallel Electronic Simulator Users' Guide (V.7.9)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

DOE OSTI2025

Xyce™ Parallel Electronic Simulator Users’ Guide, Version 7.10

97 MATHEMATICS AND COMPUTING↗