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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12

First-principles investigation of the resistive switching energetics in monolayer MoS 2 : insights into metal diffusion and adsorption

A deeper understanding of resistive switching (RS) in 2D materials is essential for advancing neuromorphic computing. The Dissociation-Diffusion-Adsorption (DDA) model offers a useful framework for probing RS mechanisms in non-volatile memory (NVM) and in-memory computing. We have employed first-principles density functional theory (DFT) to explore dissociation, diffusion, and adsorption phenomena within the DDA model, focusing on the interactions between exemplary metal atoms (Au, Ag, Cu) and monolayer MoS 2 . Nudged elastic band (NEB) calculations evaluated diffusion barriers in pristine and sulfur-vacancy MoS 2 . Charged systems were modeled to assess the impact of applied bias on migration pathways. We also examined metal dissociation from bulk electrodes and adsorption at S vacancies. Ag/MoS 2 shows the lowest dissociation barrier (~0.034 eV), while Au and Cu exhibit similar values (~0.32 eV). These insights highlight Ag as a promising candidate for low-energy RS applications and provide guidance for optimizing switching efficiency in 2D memory devices.

Atomistic models↗

An Open Source Perovskite Solar Cell Curve Tracer

When developing systems for perovskite solar cells (PSCs), it is important to have a testing platform that closely resembles your deployed systems. While developing a 1 U CubeSat, the Big Red Sat-1 at the University of Nebraska-Lincoln, we found a lack of passive curve tracing instrumentation, which we needed for our mission. To that end, we developed a benchtop passive curve tracer that leverages the Ossila Solar Simulator as an AM1.5 light source. This device utilizes a ladder of switched resistors and a precision voltage and current measurement to achieve the curve tracing. It also integrates a common-anode multiplexer to switch through multipixel PSCs. Finally, the solar cell holder is separate from the main measurement system, so various substrates sizes and pixel counts can be supported. This system is tested using various PSCs. It has been open sourced to enable reuse in future systems that may benefit from the lower power consumption and flight heritage.

14 SOLAR ENERGY↗

Component Modeling, Co-Optimization, and Trade-Space Evaluation (FY2021 Annual Progress Report)

This project is intended to support the development of new traction drive systems that meet the targets of 100 kW/L for power electronics and 50 kW/L for electric machines with reliable operation to 300,000 miles. To meet these goals, new designs must be identified that make use of state-of-the-art and next-generation electronic materials and design methods. Designs must exploit synergies between components, for example converters designed for high-frequency switching using wide band gap devices and ceramic capacitors. This project includes: (1) a survey of available technologies; (2) the development of design tools that consider the converter volume and performance; (3) exercising the design software to evaluate performance gaps and predict the impact of certain technologies and design approaches, i.e. GaN semiconductors, ceramic capacitors, and select topologies; and (4) building and testing hardware prototypes to validate models and concepts. Early instantiations of the design tools enable co-optimization of the power module and passive elements and provide some design guidance; later instantiations will enable the co-optimization of inverter and machine. Prototype testing begins with evaluation of simpler conversion topologies (i.e. the half-bridge boost converter) and progresses with fabrication of prototype inverter drives.

33 ADVANCED PROPULSION SYSTEMS↗

High-throughput phase-field simulations and machine learning of resistive switching in resistive random-access memory

Metal oxide-based Resistive Random-Access Memory (RRAM) exhibits multiple resistance states, arising from the activation/deactivation of a conductive filament (CF) inside a switching layer. Understanding CF formation kinetics is critical to achieving optimal functionality of RRAM. Here a phase-field model is developed, based on materials properties determined by ab initio calculations, to investigate the role of electrical bias, heat transport and defect-induced Vegard strain in the resistive switching behavior, using MO 2- x systems such as HfO 2- x as a prototypical model system. It successfully captures the CF formation and resultant bipolar resistive switching characteristics. High-throughput simulations are performed for RRAMs with different material parameters to establish a dataset, based on which a compressed-sensing machine learning is conducted to derive interpretable analytical models for device performance (current on/off ratio and switching time) metrics in terms of key material parameters (electrical and thermal conductivities, Vegard strain coefficients). These analytical models reveal that optimal performance (i.e., high current on/off ratio and low switching time) can be achieved in materials with a low Lorenz number, a fundamental material constant. This work provides a fundamental understanding to the resistive switching in RRAM and demonstrates a computational data-driven methodology of materials selection for improved RRAM performance, which can also be applied to other electro-thermo-mechanical systems.

36 MATERIALS SCIENCE↗

A Control Scheme to Mitigate the Dead-Time Effects in a Wireless Power Transfer System

In practice, a dead-time is always provided between the complementary switching instances of the inverter phase-leg devices. At higher operating frequencies, the dead-time issues in wireless power transfer (WPT) systems become critical, especially as the power level increases. In certain operating conditions, the dead-time effect in wireless power transfer system affects the switching characteristics. Consequently, the switching losses in the power semiconductor devices increase and also impact the efficiency of the overall system. In this paper, a simple control scheme is proposed to eliminate the dead-time effect (or voltage polarity reversal) in the WPT inverter. The proposed control scheme monitors the inverter output voltage, and the switching frequency is auto-tuned to eliminate the undesired switching instances in the inverter voltage. The proposed control scheme is validated using the closed-loop simulations in PLECS, and the experimental results on a 5.6 kW WPT prototype are also presented. After eliminating the voltage-polarity-reversal at the inverter output, the inverter losses were reduced by ~40%, and the overall system losses were reduced by ~17%.

Kavimandan, Utkarsh↗

Origin of large variations of current on/off ratio and switching voltage in atomically thin memristors: an exascale ab initio transport study

Nonvolatile resistive switching in two-dimensional monolayers opens a new avenue for high-density memory/computing devices. However, questions remain as to why the current on/off ratio and switching voltage vary significantly among different devices. Here, we simulate electronic transport of large systems consisting of a h-BN monolayer sandwiched by gold electrodes, enabled by an implementation of the nonequilibrium Green’s function method in the exascale density functional theory (DFT) code: Real-space MultiGrid. Systematic calculations reveal that the wide range of on/off ratios is due to variations in interface distances between the electrode and h-BN that significantly modulate their wavefunction overlap. In addition, DFT calculations demonstrate that the energy barrier of a gold atom dissociating from the electrode to h-BN increases dramatically with the interface distance, thereby explaining the strong dependence of the switching voltage on distance. Our work demonstrates the significance of interface distance in governing the current on/off ratio and switching voltage.

Electronic devices↗

Electric Drive Technologies Consortium (EDTC)/ Cost competitive, high-Performance, highly Reliable (CPR) Power Devices on 4H-SiC (Final Report)

4H-Silicon carbide (4H-SiC) is a wide bandgap semiconductor that offers superior material properties over silicon, including higher critical electric field, thermal conductivity, and electron saturation velocity. These advantages make 4H-SiC highly attractive for high-voltage, high-efficiency power electronics. However, realizing the full potential of SiC requires device technologies that are not only high-performing but also manufacturable and reliable under real-world operating conditions. This report summarizes the outcomes of a five-year R&D effort funded by the U.S. Department of Energy (DOE) under the Electric Drive Technologies Consortium (EDTC), focused on developing cost-competitive, high-performance, and highly reliable (CPR) power devices on 4H-SiC substrates. The program targeted scalable and manufacturable 1.2 kV-class SiC MOSFETs optimized for next-generation electric vehicles, renewable energy systems, and industrial power conversion. The project delivered transformative advancements in SiC power device performance and ruggedness. Particularly, Specific on-resistance (R on,sp ) was reduced by up to 37%, from ~4.0 m$\Omega \cdot$cm 2 in earlier designs to an industry-leading 2.40 m$\Omega \cdot$cm 2 , driven by optimized doping, refined JFET widths, and layout engineering. Breakdown voltages (BV) exceeded 1600 V, marking improvement over legacy baselines, and demonstrating the robustness of newly implemented junction profiles and edge terminations. Short-circuit withstand time (SCWT) saw a remarkable 4$\times$ increase, from ~2 $\mu$s to over 8 $\mu$s, achieved through the successful deployment of deep P-well structures (~1.8–2.0 $\mu$m) via channeling implantation. This innovative process breakthrough enabled precise junction formation without MeV-class implantation tools, reduced leakage under high field stress, and allowed even the shortest-channel devices (down to 0.3 $\mu$m) to achieve both high BV and excellent ruggedness—breaking the traditional trade-off between conduction efficiency and blocking capability. Several novel architectures pushed the performance envelope further. JBSFETs—featuring embedded Schottky portions—eliminated bipolar degradation and drastically reduced third-quadrant leakage, while Ladder MOSFETs introduced a clever orthogonal conduction path that achieved a 15.4% reduction in R on,sp over standard linear designs. Switching performance reached new benchmarks: short-channel devices showed a 31% reduction in total switching energy compared to 0.5 $\mu$m counterparts, while maintaining manageable gate drive requirements. Layout-optimized structures not only improved transconductance but also accelerated switching transitions, pointing to real-world benefits in converter-level efficiency. The devices also passed rigorous reliability validation. Stress-tested across TDDB, HTGB, HTRB, HVP, and burn-in, the devices screened under 30 V/10 hr and 43 V/1 s protocols consistently exhibited tighter lifetime distributions and long-term oxide robustness. These screening techniques proved effective in identifying latent defects and ensuring deployment-grade reliability. Meanwhile, advanced 3D TCAD simulations revealed and resolved electric field hotspots—particularly in HEXFET corners—where fields exceeding 4.8 MV/cm were mitigated through geometry-aware layout corrections. Overall, the results of this project demonstrate a manufacturable and scalable SiC power device platform that addresses key DOE performance targets for efficient, robust, and reliable 1.2kV 4H-SiC Power Devices. The developed technologies represent a meaningful step forward in the commercial readiness of high-voltage SiC solutions and provide a strong foundation for continued advancement in wide bandgap power electronics.

42 ENGINEERING↗

Resistive switching properties of monolayer h-BN atomristors with different electrodes

Resistive switching properties based on molecular beam epitaxy-grown monolayer hexagonal boron nitride (h-BN) atomristors are studied by using metal insulator metal configurations with different electrode materials. Au/monolayer h-BN/Ni devices demonstrate a forming-free bipolar resistive switching (BRS) behavior, a good endurance with up to 97 cycles at a high compliance current of 100 mA, an average on/off ratio of 10 3 , and a low set/reset voltage variability. Metal/monolayer h-BN/graphite/Co devices exhibit self-compliant current BRS characteristics. Both metal/h-BN/Ni and metal/h-BN/graphite/Co devices show the coexistence of BRS, unipolar resistive switching (URS), and nonvolatile threshold switching (TH) modes. The formation of conductive filaments is attributed to the diffusion and trapping of metal ions on the defect sites driven by the electric field, while the rupture is driven by the electric field in BRS and by Joule heating in URS and TH modes.

74 ATOMIC AND MOLECULAR PHYSICS↗

Tracking oxygen vacancy migration in memristor devices using operando hard X-ray photoelectron spectroscopy

Fabrication of ultrathin (sub-2 nm) oxide semiconductor memristors poses the fundamental challenge of achieving oxide growth with atomic precision in terms of electronic structure and defect formation. Recently, ultrathin memristors consisting of bilayers of mixed Al 2 O 3 and MgO atomic layers were fabricated using an in vacuo atomic layer deposition process. This approach offers a unique platform for precise atomic control of oxygen vacancies in the device in which the vacancies are introduced by placing MgO atomic layers between pristine Al 2 O 3 layers. In this work, we present a systematic operando Hard X-ray PhotoElectron Spectroscopy (HAXPES) study of the switching of such memristors, combined with complementary current-voltage and capacitance-voltage (C-V) measurements. We used a memristor stack of Al 2 O 3 /MgO atomic layers, with the MgO-containing oxide deposited on the bottom Al metal electrode and a pure Al 2 O 3 layer below the top Pd electrode. HAXPES analysis shows a substantial change in the chemical shift of the Aluminum oxide when switching between the ”OFF” and ”ON” states indicative of a redistribution of oxygen vacancies in the device active layer. Interestingly, subsequent switching to the OFF state shows hysteretic behavior indicating the retention of some oxygen vacancies in the top Al 2 O 3 layer. This vacancy retention can be correlated with the stochastic behavior of the switching voltage observed in these devices. C–V measurements show a clear frequency-dependent response in the OFF state, consistent with enhanced polarization and vacancy trapping at low frequencies.

47 OTHER INSTRUMENTATION↗

Ultraefficient resistance switching between charge ordered phases in 1 T -TaS 2 with a single picosecond electrical pulse

Progress in high-performance computing demands significant advances in memory technology. Among novel memory technologies that promise efficient device operation on a sub-ns timescale, resistance switching between charge ordered phases of 1T-TaS 2 has shown to be potentially useful for development of high-speed, energy efficient nonvolatile memory devices. Measurement of the electrical operation of such devices in the picosecond regime is technically challenging and hitherto still largely unexplored. Here, we use an optoelectronic “laboratory-on-a-chip” experiment for measurement of ultrafast memory switching, enabling accurate measurement of electrical switching parameters with 100 fs temporal resolution. Photoexcitation and electro-optic sampling on a (Cd,Mn)Te substrate are used to generate and, subsequently, measure electrical pulse propagation with intra-band excitation and sub-gap probing, respectively. We demonstrate high contrast nonvolatile resistance switching from high to low resistance states of a 1T-TaS 2 device using single sub-2ps electrical pulses. Using detailed modeling, we find that the switching energy density per unit area is exceptionally small, E A =9.4 fJ/μm 2 . Finally, the speed and energy efficiency of an electronic “write” process place the 1T-TaS 2 devices into a category of their own among new generation nonvolatile memory devices.

42 ENGINEERING↗

Progress toward picosecond on-chip magnetic memory

Here, we offer a perspective on the prospects of ultrafast spintronics and opto-magnetism as a pathway to high-performance, energy-efficient, and non-volatile embedded memory in digital integrated circuit applications. Conventional spintronic devices, such as spin-transfer-torque magnetic-resistive random-access memory (STT-MRAM) and spin–orbit torque MRAM, are promising due to their non-volatility, energy-efficiency, and high endurance. STT-MRAMs are now entering into the commercial market; however, they are limited in write speed to the nanosecond timescale. Improvement in the write speed of spintronic devices can significantly increase their usefulness as viable alternatives to the existing CMOS-based devices. In this article, we discuss recent studies that advance the field of ultrafast spintronics and opto-magnetism. An optimized ferromagnet–ferrimagnet exchange-coupled magnetic stack, which can serve as the free layer of a magnetic tunnel junction (MTJ), can be optically switched in as fast as ~3 ps. Integration of ultrafast magnetic switching of a similar stack into an MTJ device has enabled electrical readout of the switched state using a relatively larger tunneling magnetoresistance ratio. Purely electronic ultrafast spin–orbit torque induced switching of a ferromagnet has been demonstrated using ~6 ps long charge current pulses. We conclude our Perspective by discussing some of the challenges that remain to be addressed to accelerate ultrafast spintronics technologies toward practical implementation in high-performance digital information processing systems.

42 ENGINEERING↗

A Compact 50kW High Power Density, Hybrid 3-Level Paralleled T-type Inverter for More Electric Aircraft Applications

The demand for high performing, lightweight, reliable inverters, increased the scope of wide bandgap and high-switching frequency based solutions. To achieve such high efficiency inverters, it is vital to focus on the system level design considerations to maximize the benefits of these advanced technologies. This paper presents an improved design based on considerations to further reap the benefits of choosing the right inverter topology; increased capabilities through paralleling devices, with reduced total number of switches; and designing a planarized inverter with PCB based busbar. Appropriate thermal analysis and heatsink design has aided in increased system power density along with the overall efficiency. Demonstration of a 50kW 3-phase 3-level paralleled T-type SiC inverter operating at 40kHz switching frequency for aircraft applications is shown to evaluate the benefits of proposed design methodology. Here, the prototype achieves a high power density of 11kW/L.

42 ENGINEERING↗

( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.

42 ENGINEERING↗

Development of a reliable Potting process for Photoconductive Semiconductor Switches (PCSS)

Electrical potting is an important process to protect semiconductor devices from damaging external elements (mechanical stress, moisture, high voltage, etc.) and provides structural support for delicate devices for electrical connectivity to a larger platform. This internship will focus on the development of a universal potting jig for photoconductive semiconductor switches (PCSS). The goal is to design a reliable compression jig that is cross compatible with various PCSS designs that allow for easy potting of devices with a high dielectric breakdown strength material. The challenge with the current potting jig is that the design is only compatible with one style of PCSS and applies uneven pressure that can lead to leakage of potting material. Our approach is to move from a design that applies pressure by binder clip to utilizing a micrometer based compressing jig for a reliable packaging process that can pot a variety of devices without having to have a unique compressing jig for each of style of PCSS. Possible roadblocks with the new design include epoxy leakage into the optical path and misalignment of the electrode – metal contact bond.

42 ENGINEERING↗

Ultrafast high-endurance memory based on sliding ferroelectrics

The persistence of voltage-switchable collective electronic phenomena down to the atomic scale has extensive implications for area- and energy-efficient electronics, especially in emerging nonvolatile memory technology. We investigate the performance of a ferroelectric field-effect transistor (FeFET) based on sliding ferroelectricity in bilayer boron nitride at room temperature. Sliding ferroelectricity represents a different form of atomically thin two-dimensional (2D) ferroelectrics, characterized by the switching of out-of-plane polarization through interlayer sliding motion. We examined the FeFET device employing monolayer graphene as the channel layer, which demonstrated ultrafast switching speeds on the nanosecond scale and high endurance exceeding 10 11 switching cycles, comparable to state-of-the-art FeFET devices. These characteristics highlight the potential of 2D sliding ferroelectrics for inspiring next-generation nonvolatile memory technology.

Science & Technology - Other Topics↗

Device-Level Multidimensional Thermal Dynamics With Implications for Current and Future Wide Bandgap Electronics

Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.

42 ENGINEERING↗

Demonstrating Distribution System Resiliency through Grid-Edge Microgrids, on a Multi-Site Networked Hardware-in-Loop Platform

With the increasing penetration of Distributed Energy Resources (DERs) at the grid-edge, power systems include more energy storage, remote switches, relays, voltage regulators, and other intelligent electronic devices (IED). Effective control of these grid-edge devices by using Advanced Distribution Management Systems (ADMS) can yield substantial improvements to the resiliency and power quality of distribution systems. In this paper, improvements to the resiliency of a distribution system are demonstrated using a multi-site evaluation environment consisting of a real-time Hardware-in-Loop (HIL) setup in which DERs and other IEDs are modeled; and an ADMS which monitors and is able to control the distribution system assets. The HIL model and the ADMS are located 2400 km away, with communication between the sites enabled by a data manager using Distributed Network Protocol 3 (DNP3), demonstrating the system's capabilities even over long distances. After a simulated transmission system failure in the HIL demonstration setup, DERs and other devices are operated to restore critical loads and node voltage profile (to within the 'nominal +/-5%' band) in the distribution system.

ADMS↗

True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching

This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. Furthermore, these results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV. Index Terms— GaN, HEMT, power electronics, hard switching, breakdown voltage, overvoltage, ruggedness, reliability.

42 ENGINEERING↗