High reliability screening of semiconductor and integrated circuit devices
Destructive and nondestructive testing, results, and specifications for reliability of integrated circuit and semiconductor devices
NONDESTRUCTIVE TESTING↗
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Atomic Chain Electronics
Adatom chains, precise structures artificially created on an atomically regulated surface, are the smallest possible candidates for future nanoelectronics. Since all the devices are created by combining adatom chains precisely prepared with atomic precision, device characteristics are predictable, and free from deviations due to accidental structural defects. In this atomic dimension, however, an analogy to the current semiconductor devices may not work. For example, Si structures are not always semiconducting. Adatom states do not always localize at the substrate surface when adatoms form chemical bonds to the substrate atoms. Transport properties are often determined for the entire system of the chain and electrodes, and not for chains only. These fundamental issues are discussed, which will be useful for future device considerations.
Yamada, Toshishige↗
Quantification Of 4H- To 3C-Polymorphism In Silicon Carbide (SiC) Epilayers And An Investigation Of Recombination-Enhanced Dislocation Motion In SiC By Optical Emission Microscopy (Oem) Techniques
Environments that impose operational constraints on conventional silicon-(Si) based semiconductor devices frequently appear in military- and space-grade applications. These constraints include high temperature, high power, and high radiation environments. Silicon carbide (SiC), an alternative type of semiconductor material, has received abundant research attention in the past few years, owing to its radiation-hardened properties as well as its capability to withstand high temperatures and power levels. However, the growth and manufacture of SiC devices is still comparatively immature, and there are severe limitations in present crystal growth and device fabrication processes. Among these limitations is a variety of crystal imperfections known as defects. These imperfections can be point defects (e.g., vacancies and interstitials), line defects (e.g., edge and screw dislocations), or planar defects (e.g., stacking faults and double-positioning boundaries). All of these defects have been experimentally shown to be detrimental to the performance of electron devices made from SiC. As such, it is imperative that these defects are significantly reduced in order for SiC devices to become a viable entity in the electronics world. The NASA Glenn High Temperature Integrated Electronics & Sensors Team (HTIES) is working to identify and eliminate these defects in SiC by implementing improved epitaxial crystal growth procedures. HTIES takes two-inch SiC wafers and etches patterns, producing thousands of mesas into each wafer. Crystal growth is then carried out on top of these mesas in an effort to produce films of improved quality-resulting in electron devices that demonstrate superior performance-as well as fabrication processes that are cost-effective, reliable, and reproducible. In this work, further steps are taken to automate HTIES' SiC wafer inspection system. National Instruments LabVIEW image processing and pattern recognition routines are developed that are capable of quantifying and mapping defects on both the substrate and mesa surfaces, and of quantifying polymorphic changes in the grown materials. In addition, an optical emission microscopy (OEM) system is developed that will facilitate comprehensive study of recombination-enhanced dislocation motion (REDM).
Speer, Kevin M.↗
Smallest Nanoelectronic with Atomic Devices with Precise Structures
Since its invention in 1948, the transistor has revolutionized our everyday life - transistor radios and TV's appeared in the early 1960s, personal computers came into widespread use in the mid-1980s, and cellular phones, laptops, and palm-sized organizers dominated the 1990s. The electronics revolution is based upon transistor miniaturization; smaller transistors are faster, and denser circuitry has more functionality. Transistors in current generation chips are 0.25 micron or 250 nanometers in size, and the electronics industry has completed development of 0.18 micron transistors which will enter production within the next few years. Industry researchers are now working to reduce transistor size down to 0.13 micron - a thousandth of the width of a human hair. However, studies indicate that the miniaturization of silicon transistors will soon reach its limit. For further progress in microelectronics, scientists have turned to nanotechnology to advance the science. Rather than continuing to miniaturize transistors to a point where they become unreliable, nanotechnology offers the new approach of building devices on the atomic scale [see sidebar]. One vision for the next generation of miniature electronics is atomic chain electronics, where devices are composed of atoms aligned on top of a substrate surface in a regular pattern. The Atomic Chain Electronics Project (ACEP) - part of the Semiconductor Device Modeling and Nanotechnology group, Integrated Product Team at the NAS Facility has been developing the theory of understanding atomic chain devices, and the author's patent for atomic chain electronics is now pending.
Yamada, Toshishige↗
Radiation design criteria handbook
Radiation design criteria for electronic parts applications in space environments are provided. The data were compiled from the Mariner/Jupiter Saturn 1977 electronic parts radiation test program. Radiation sensitive device types were exposed to radiation environments compatible with the MJS'77 requirements under suitable bias conditions. A total of 189 integrated circuits, transistors, and other semiconductor device types were tested.
Stanley, A. G.↗
Power Switching Device
The MOS-Controlled Thyristor is a new type of power switching device for faster and more efficient control and management of power electronics. It enables power electronic switching at frequencies of 50 to 100 thousand times a second with much lower power losses than other semiconductor devices. Advantages include electric power savings and smaller space. The device is used in motor and power controllers, AC & DC motor drives and induction heating. Early development was supported by Lewis Research Center (LEW) and other agencies. General Electric''s power semiconductor operation, the initial NASA contractor, was later purchased by Harris Semiconductor.
Source record↗
Collaborative research in tunneling and field emission pumped surface wave local oscillators and amplifiers for infrared and submillimeter wavelengths under director's discretionary fund
Progress is reported in work towards the development of surface wave sources for the infrared and sub-millimeter portion of the spectrum to be based upon electron pumping by tunneling electrons in metal-barrier-metal or metal-barrier-semiconductor devices. Tunneling phenomena and the coupling of radiation to tunnel junctions were studied. The propagation characteristics of surface electro-magnetic modes in metal-insulator-p(++) semiconductor structures as a function of frequency were calculated. A model for the gain process based upon Tucker's formalism was developed and used to estimate what low frequency gain might be expected from such structures. The question of gain was addressed from a more fundamental viewpoint using the method of Lasher and Stern.
Gustafson, T. K.↗
Open-Source Software for Modeling of Nanoelectronic Devices
The Nanoelectronic Modeling 3-D (NEMO 3-D) computer program has been upgraded to open-source status through elimination of license-restricted components. The present version functions equivalently to the version reported in "Software for Numerical Modeling of Nanoelectronic Devices" (NPO-30520), NASA Tech Briefs, Vol. 27, No. 11 (November 2003), page 37. To recapitulate: NEMO 3-D performs numerical modeling of the electronic transport and structural properties of a semiconductor device that has overall dimensions of the order of tens of nanometers. The underlying mathematical model represents the quantum-mechanical behavior of the device resolved to the atomistic level of granularity. NEMO 3-D solves the applicable quantum matrix equation on a Beowulf-class cluster computer by use of a parallel-processing matrix vector multiplication algorithm coupled to a Lanczos and/or Rayleigh-Ritz algorithm that solves for eigenvalues. A prior upgrade of NEMO 3-D incorporated a capability for a strain treatment, parameterized for bulk material properties of GaAs and InAs, for two tight-binding submodels. NEMO 3-D has been demonstrated in atomistic analyses of effects of disorder in alloys and, in particular, in bulk In(x)Ga(1-x)As and in In(0.6)Ga(0.4)As quantum dots.
Oyafuso, Fabiano↗
Novel High Efficient Organic Photovoltaic Materials: Appendix for Summary of Research
There are many different kinds of conjugated polymers that may be useful in photovoltaic devices. So far, the most popular and successful conjugated polymers used in photovoltaic devices include poly(1,4-)phenylenevinylenes (PPV), C60 and their derivatives. The discovery of electro-luminescence in PPV has stimulated a great deal of interest in developing "plastic" solid-state semiconductor devices. The overall synthetic methodology for the preparation of PPV can be divided into three main categories: (1) side chain derivatization, (2) precursor approach, and (3) in-situ polymerization. In this project, the first method was adopted. As discussed in project proposal and literatures, the overall efficiency of photovoltaic devices containing conjugated polymers is determined by the materials ability to generate excitons from incoming radiation, and then to separate the charges at donor/acceptor interfaces, and then to transport charges to respective electrodes. Given that effective exciton diffusion range are typical less then 30 nm, unique morphological structures are needed. This need led to several research groups to the idea that interpenetrating or bi-continuous networks of donor (electron donating) and acceptor (electron withdrawing) polymers should give better results. One approach involved the use of functionalized PPV. The attachment of electron withdrawing cyano groups to a PPV forms the CN-PPV, making it a strong electron acceptor. Underivatized PPV is a generally considered a hole-transporting material. Using blends of MEH-PPV, a soluble donor PPV derivative, as a hole transporter and CN-PPV as an electron transporter, a quantum efficiencies of up to 6% was achieved.
Sun, Sam↗
Methods for dc to ac conversion Semiannual status report
Thin film deposition on metal oxide semiconductor devices, and dc to ac conversion methods
ALTERNATING CURRENT /AC/↗
SiC Multi-Chip Power Modules as Power-System Building Blocks
The term "SiC MCPMs" (wherein "MCPM" signifies "multi-chip power module") denotes electronic power-supply modules containing multiple silicon carbide power devices and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking. Moreover, the higher-temperature capabilities of SiC MCPMs could enable operation in environments hotter than Si-based power systems can withstand. The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules. In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications: typical functions could include regulating voltages, storing energy, and driving motors. Because identical SiC MCPM building blocks could be utilized in a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. Several prototype DC-to-DC power-converter modules containing SiC power-switching devices were designed and built to demonstrate the feasibility of the SiC MCPM concept. In anticipation of a future need for operation at high temperature, the circuitry in the modules includes high-temperature inductors and capacitors. These modules were designed to be stacked to construct a system of four modules electrically connected in series and/or parallel. The packaging of the modules is designed to satisfy requirements for series and parallel interconnection among modules, high power density, high thermal efficiency, small size, and light weight. Each module includes four output power connectors two for serial and two for parallel output power connections among the modules. Each module also includes two signal connectors, electrically isolated from the power connectors, that afford four zones for signal interconnections among the SOI controllers. Finally, each module includes two input power connectors, through which it receives power from an in-line power bus. This design feature is included in anticipation of a custom-designed power bus incorporating sockets compatible with snap-on type connectors to enable rapid replacement of failed modules.
Lostetter, Alexander↗
Molten Target Sputtering: Non-Conventional Method for High Mobility Si0.15Ge0.85 Growth at 500°C
Since electrons travel over 100 times faster in Silicon-Germanium (SiGe) than in pure Si due to the low effective masses associated with Ge and SiGe-based devices continue to replace Si-based solid-state electronic devices. SiGe thin film on sapphire was successfully grown at 890°C, using a magnetron sputtering system within heteroepitaxial framework. However, SiGe growth at 890oC is a costly and difficult process to produce as a uniform wafer for semiconductor device manufacturing due to thermal soak times, and geometric thermal shadowing from the wafer holder. To leverage the semiconducting capabilities of SiGe, novel processing techniques for SiGe film growth with decreased thermal loading are required. This paper introduces the Molten Target Sputtering (MTS) method that produces high mobility SiGe on sapphire below 500°C. This non-conventional method has the advantage of high kinetic energy, high-energy latency, and high flux density of sputtered atoms by combining benefits of both magnetron sputtering and thermal evaporation. For the MTS method, a 1~2 mm (depth and width) ring-shaped groove was cut between the center magnet and surrounded by electromagnets creating a circular cavity between the copper plate and source target materials that melt the target material. The SiGe grown from the MTS shows continuous morphology and 99.7% single crystal Si0.15Ge0.85 films. The Hall electron mobilities of the Si0.15Ge0.85 are 456 sq. cmV(exp -1)s(exp -1) and 123.9 sq. cmV(exp -1)s(exp -1) at 5.59 x 10(exp 18) cubic cm and 3.5 x 10(exp 20) cubic cm carrier concentration at 22.38°C, respectively. This is approximately 5.5 times higher than that of Si and similar to the Ge value at equivalent carrier concentrations and temperatures.
High mobility SiGe↗
Proceedings of the Conference on High-temperature Electronics
The development of electronic devices for use in high temperature environments is addressed. The instrumentational needs of planetary exploration, fossil and nuclear power reactors, turbine engine monitoring, and well logging are defined. Emphasis is place on the fabrication and performance of materials and semiconductor devices, circuits and systems and packaging.
Source record↗
Radiation Hardness Assurance for Space Systems
The space radiation environment can lead to extremely harsh operating conditions for on-board electronic box and systems. The characteristics of the radiation environment are highly dependent on the type of mission (date, duration and orbit). Radiation accelerates the aging of the electronic parts and material and can lead to a degradation of electrical performance; it can also create transient phenomena on parts. Such damage at the part level can induce damage or functional failure at electronic box, subsystem, and system levels. A rigorous methodology is needed to ensure that the radiation environment does not compromise the functionality and performance of the electronics during the system life. This methodology is called hardness assurance. It consists of those activities undertaken to ensure that the electronic piece parts placed in the space system perform to their design specifications after exposure to the space environment. It deals with system requirements, environmental definitions, part selection, part testing, shielding and radiation tolerant design. All these elements should play together in order to produce a system tolerant to.the radiation environment. An overview of the different steps of a space system hardness assurance program is given in section 2. In order to define the mission radiation specifications and compare these requirements to radiation test data, a detailed knowledge of the space environment and the corresponding electronic device failure mechanisms is required. The presentation by J. Mazur deals with the Earth space radiation environment as well as the internal environment of a spacecraft. The presentation by J. Schwank deals with ionization effects, and the presentation by T. Weatherford deals with Single particle Event Phenomena (SEP) in semiconductor devices and microcircuits. These three presentations provide more detailed background to complement the sections 3 and 4. Part selection and categorization are discussed in section 5. Section 6 presents the organization of the hardness assurance within a project. Section 7 discusses emerging radiation hardness assurance issues.
Poivey, Christian↗
Silicon Heat Pipe Array
Improved methods of heat dissipation are required for modern, high-power density electronic systems. As increased functionality is progressively compacted into decreasing volumes, this need will be exacerbated. High-performance chip power is predicted to increase monotonically and rapidly with time. Systems utilizing these chips are currently reliant upon decades of old cooling technology. Heat pipes offer a solution to this problem. Heat pipes are passive, self-contained, two-phase heat dissipation devices. Heat conducted into the device through a wick structure converts the working fluid into a vapor, which then releases the heat via condensation after being transported away from the heat source. Heat pipes have high thermal conductivities, are inexpensive, and have been utilized in previous space missions. However, the cylindrical geometry of commercial heat pipes is a poor fit to the planar geometries of microelectronic assemblies, the copper that commercial heat pipes are typically constructed of is a poor CTE (coefficient of thermal expansion) match to the semiconductor die utilized in these assemblies, and the functionality and reliability of heat pipes in general is strongly dependent on the orientation of the assembly with respect to the gravity vector. What is needed is a planar, semiconductor-based heat pipe array that can be used for cooling of generic MCM (multichip module) assemblies that can also function in all orientations. Such a structure would not only have applications in the cooling of space electronics, but would have commercial applications as well (e.g. cooling of microprocessors and high-power laser diodes). This technology is an improvement over existing heat pipe designs due to the finer porosity of the wick, which enhances capillary pumping pressure, resulting in greater effective thermal conductivity and performance in any orientation with respect to the gravity vector. In addition, it is constructed of silicon, and thus is better suited for the cooling of semiconductor devices.
Yee, Karl Y.↗
On-Chip Power-Combining for High-Power Schottky Diode Based Frequency Multipliers
A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.
Siles Perez, Jose Vicente↗
Alternative Packaging for Back-Illuminated Imagers
An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.
Pain, Bedabrata↗
Applications of Silicon Carbide for High Temperature Electronics and Sensors
Silicon carbide (SiC) is a wide bandgap material that shows great promise in high-power and high temperature electronics applications because of its high thermal conductivity and high breakdown electrical field. The excellent physical and electronic properties of SiC allows the fabrication of devices that can operate at higher temperatures and power levels than devices produced from either silicon or GaAs. Although modern electronics depends primarily upon silicon based devices, this material is not capable of handling may special requirements. Devices which operate at high speeds, at high power levels and are to be used in extreme environments at high temperatures and high radiation levels need other materials with wider bandgaps than that of silicon. Many space and terrestrial applications also have a requirement for wide bandgap materials. SiC also has great potential for high power and frequency operation due to a high saturated drift velocity. The wide bandgap allows for unique optoelectronic applications, that include blue light emitting diodes and ultraviolet photodetectors. New areas involving gas sensing and telecommunications offer significant promise. Overall, the properties of SiC make it one of the best prospects for extending the capabilities and operational regimes of the current semiconductor device technology.
Silicon Carbide↗