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Results for “bipolar transistor”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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225 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS1981

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Source record↗
NASA NTRS1983

High-temperature optically activated GaAs power switching for aircraft digital electronic control

Gallium arsenide high-temperature devices were fabricated and assembled into an optically activated pulse-width-modulated power control for a torque motor typical of the kinds used in jet engine actuators. A bipolar heterojunction phototransistor with gallium aluminum arsenide emitter/window, a gallium arsenide junction field-effect power transistor and a gallium arsenide transient protection diode were designed and fabricated. A high-temperature fiber optic/phototransistor coupling scheme was implemented. The devices assembled into the demonstrator were successfully tested at 250 C, proving the feasibility of actuator-located switching of control power using optical signals transmitted by fibers. Assessments of the efficiency and technical merits were made for extension of this high-temperature technology to local conversion of optical power to electrical power and its control at levels useful for driving actuators. Optical power sources included in the comparisons were an infrared light-emitting diode, an injection laser diode, tungsten-halogen lamps and arc lamps. Optical-to-electrical power conversion was limited to photovoltaics located at the actuator. Impedance matching of the photovoltaic array to the load was considered over the full temperature range, -55 C to 260 C. Loss of photovoltaic efficiency at higher temperatures was taken into account. Serious losses in efficiency are: (1) in the optical source and the cooling which they may require in the assumed 125 C ambient, (2) in the decreased conversion efficiency of the gallium arsenide photovoltaic at 260 C, and (3) in impedance matching. Practical systems require improvements in these areas.

Berak, J. M.↗
NASA NTRS2012

Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

linear integrated circuits↗
NASA NTRS1992

Behavior of faulty double BJT BiCMOS logic gates

Logic Behavior of a Double BJT BiCMOS device under transistor level shorts and opens is examined. In addition to delay faults, faults that cause the gate to exhibit sequential behavior were observed. Several faults can be detected only by monitoring the current. The faulty behavior of Bipolar (TTL) and CMOS logic families is compared with BiCMOS, to bring out the testability differences.

Menon, Sankaran M.↗
DOE OSTI2025

Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10 12 for Refresh-Free Embedded Memory

This work presents, for the first time, a back-end-of-the-line (BEOL)-compatible W-doped indium oxide (IWO) ferroelectric field-effect transistor (FEFET) with a record-low operating voltage below 0.9 V and a write speed of 20 ns while achieving a transient read current window (CW) ratio ( I LVT /I HVT ) greater than 10 4 . The device also exhibits exceptional reliability characteristics such as: 1) measured bipolar write endurance up to 10 12 cycles; 2) a fast read speed of 50 ns; 3) read endurance surpassing 10 12 cycles; and 4) retention exceeding 10 4 s at 85 ∘ C. Furthermore, a physics-based numerical model has been developed to investigate the nanoscale characteristics of BEOL FEFET devices, leveraging nucleation-limited switching in HfO 2 ferroelectrics and dc characterization to extract material and channel parameters for accurate device simulation. The simulation uncovers the stochastic switching behavior of BEOL amorphous oxide semiconductor (AOS) FEFETs and demonstrates an intrinsic switching time as low as 1 ps, highlighting the potential of BEOL AOS FEFETs for ultrafast memory applications. These results establish AOS FEFETs as a compelling candidate for high-density embedded memory applications for last-level cache (LLC) (L4) in advanced CMOS technology nodes.

1-V ferroelectric field-effect transistor (FEFET)↗
NASA NTRS2000

Displacement Damage in Bipolar Linear Integrated Circuits

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

Rax, B. G.↗
NASA NTRS1983

Annual Conference on Nuclear and Space Radiation Effects, Gatlinburg, TN, July 18-21, 1983, Proceedings

Topics discussed include radiation effects in devices; the basic mechanisms of radiation effects in structures and materials; radiation effects in integrated circuits; spacecraft charging and space radiation effects; hardness assurance for devices and systems; and radiation transport, energy deposition and charge collection. Papers are presented on the mechanisms of small instabilities in irradiated MOS transistors, on the radiation effects on oxynitride gate dielectrics, on the discharge characteristics of a simulated solar cell array, and on latchup in CMOS devices from heavy ions. Attention is also given to proton upsets in orbit, to the modeling of single-event upset in bipolar integrated circuits, to high-resolution studies of the electrical breakdown of soil, and to a finite-difference solution of Maxwell's equations in generalized nonorthogonal coordinates.

Source record↗
DOE OSTI2020

Spatial defects nanoengineering for bipolar conductivity in MoS 2

Understanding the atomistic origin of defects in two-dimensional transition metal dichalcogenides, their impact on the electronic properties, and how to control them is critical for future electronics and optoelectronics. Here, we demonstrate the integration of thermochemical scanning probe lithography (tc-SPL) with a flow-through reactive gas cell to achieve nanoscale control of defects in monolayer MoS 2 . The tc-SPL produced defects can present either p- or n-type doping on demand, depending on the used gasses, allowing the realization of field effect transistors, and p-n junctions with precise sub-μm spatial control, and a rectification ratio of over 10 4 . Doping and defects formation are elucidated by means of X-Ray photoelectron spectroscopy, scanning transmission electron microscopy, and density functional theory. We find that p-type doping in HCl/H 2 O atmosphere is related to the rearrangement of sulfur atoms, and the formation of protruding covalent S-S bonds on the surface. Alternatively, local heating MoS 2 in N 2 produces n-character.

36 MATERIALS SCIENCE↗
NASA NTRS1994

Nonvolatile random access memory

A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

Wu, Jiin-Chuan↗