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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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NASA NTRS2003

Multi-Disciplinary Analysis for Future Launch Systems Using NASA's Advanced Engineering Environment (AEE)

A new engineering environment constructed for the purposes of analyzing and designing Reusable Launch Vehicles (RLVs) is presented. The new environment has been developed to allow NASA to perform independent analysis and design of emerging RLV architectures and technologies. The new Advanced Engineering Environment (AEE) is both collaborative and distributed. It facilitates integration of the analyses by both vehicle performance disciplines and life-cycle disciplines. Current performance disciplines supported include: weights and sizing, aerodynamics, trajectories, propulsion, structural loads, and CAD-based geometries. Current life-cycle disciplines supported include: DDT&E cost, production costs, operations costs, flight rates, safety and reliability, and system economics. Involving six NASA centers (ARC, LaRC, MSFC, KSC, GRC and JSC), AEE has been tailored to serve as a web-accessed agency-wide source for all of NASA's future launch vehicle systems engineering functions. Thus, it is configured to facilitate (a) data management, (b) automated tool/process integration and execution, and (c) data visualization and presentation. The core components of the integrated framework are a customized PTC Windchill product data management server, a set of RLV analysis and design tools integrated using Phoenix Integration's Model Center, and an XML-based data capture and transfer protocol. The AEE system has seen production use during the Initial Architecture and Technology Review for the NASA 2nd Generation RLV program, and it continues to undergo development and enhancements in support of its current main customer, the NASA Next Generation Launch Technology (NGLT) program.

Monell, D.↗
NASA NTRS2011

Vibration Considerations for Cryogenic Tanks Using Glass Bubbles Insulation

The use of glass bubbles as an efficient and practical thermal insulation system has been previously demonstrated in cryogenic storage tanks. One such example is a spherical, vacuum-jacketed liquid hydrogen vessel of 218,000 liter capacity where the boiloff rate has been reduced by approximately 50 percent. Further applications may include non-stationary tanks such as mobile tankers and tanks with extreme duty cycles or exposed to significant vibration environments. Space rocket launch events and mobile tanker life cycles represent two harsh cases of mechanical vibration exposure. A number of bulk fill insulation materials including glass bubbles, perlite powders, and aerogel granules were tested for vibration effects and mechanical behavior using a custom design holding fixture subjected to random vibration on an Electrodynamic Shaker. The settling effects for mixtures of insulation materials were also investigated. The vibration test results and granular particle analysis are presented with considerations and implications for future cryogenic tank applications. A thermal performance update on field demonstration testing of a 218,000 L liquid hydrogen storage tank, retrofitted with glass bubbles, is presented. KEYWORDS: Glass bubble, perlite, aerogel, insulation, liquid hydrogen, storage tank, mobile tanker, vibration.

Werlink, Rudolph J.↗
NASA NTRS2010

Metabolic Rate and Ground Reaction Force During Motorized and Non-Motorized Treadmill Exercise

PURPOSE: To measure vertical ground reaction force (vGRF) and oxygen consumption (VO2) at several velocities during exercise using a ground-based version of the ISS treadmill in the M and NM modes. METHODS: Subjects (n = 20) walked or ran at 0.89, 1.34, 1.79, 2.24, 2.68, and 3.12 m/s while VO2 and vGRF data were collected. VO2 was measured using open-circuit spirometry (TrueOne 2400, Parvo-Medics). Data were averaged over the last 2 min of each 5-min stage. vGRF was measured in separate 15-s bouts at 125 Hz using custom-fitted pressure-sensing insoles (F-Scan Sport Sensors, Tekscan, Inc). A repeated-measures ANOVA was used to test for differences in VO2 and vGRF between M and NM and across speeds. Significance was set at P < 0.05. RESULTS: Most subjects were unable to exercise for 5 min at treadmill speeds above 1.79 m/s in the NM mode; however, vGRF data were obtained for all subjects at each speed in both modes. VO2 was approx.40% higher during NM than M exercise across treadmill speeds. vGRF increased with treadmill speed but was not different between modes. CONCLUSION: Higher VO2 with no change in vGRF suggests that the additional metabolic cost associated with NM treadmill exercise is accounted for in the horizontal forces required to move the treadmill belt. Although this may limit the exercise duration at faster speeds, high-intensity NM exercise activates the hamstrings and plantarflexors, which are not specifically targeted or well protected by other in-flight countermeasures.

Everett, Meghan E.↗
NASA NTRS1990

Custom CMOS Reed Solomon coder for the Hubble Space Telescope

A VLSI coder is presented that can function either as an encoder or decoder for Reed-Solomon codes. VLSI is one approach to implementing high-performance Reed-Solomon decoders. There are three VLSI technologies that could be used: gate arrays, standard cells, and full custom. The first two approaches are relatively easy to implement, but are limited in both performance and density. Full-custom VLSI is used to achieve both circuit density and speed, and allows control of the amount of interconnect. Speed, which is a function of capacitance, which is a function of interconnect, is an important parameter in high-performance VLSI. A single 8.2 mm x 8.4 mm, 200,000 transistor CMOS chip implementation of the Reed-Solomon code required by the Hubble Space Telescope is reported. The chip features a 10-MHz sustained byte rate independent of error pattern. The 1.6-micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes and shortened codes are supported with no external buffering. Erasure corrections and random error corrections are supported with programmable correction of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors in the incoming message.

Whitaker, S.↗
NASA NTRS2010

Reconfigurable Hardware for Compressing Hyperspectral Image Data

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

Aranki, Nazeeh↗
NASA NTRS2011

Development of the ISS EMU SPEEDR

The Self Powered EVA EMU Data Recorder (SPEEDR) is an FPGA (Field-programmable gate array) based device designed to collect high-rate EMU (Extravehicular Mobility Unit) PLSS (Primary Life Support Subsystem) data for download at a later time. The existing EMU PLSS data down-link capability during EVA is one data packet every 2 minutes and is subject to bad packets or loss of signal. High-rate PLSS data is generated by the ECWS (Enhanced Caution and Warning System) but is not normally captured or distributed. Access to high-rate data will increase the capability of EMU anomaly resolution team to pinpoint issues remotely, saving crew time by reducing required call-down Q&A and on-orbit diagnostic activities. With no Shuttle flights post FY11, and potentially limited down-mass capability, the ISS crew and ground support personnel will have to be capable of on-orbit operations to maintain, diagnose, repair, and return to service EMU hardware, possibly through 2028. Collecting high-rate EMU PLSS data during both IVA (Intravehicular Activity) and EVA (Extravehicular Activity) operations will provide trending analysis for life extension and/or predictive performance. The SPEEDR concept has generated interest as a tool/technology that could be used for other ISS subsystems or future exploration-class space suits where hardware reliability/availability is critical and low/variable bandwidth may require "store then forward" methodology. Preliminary work in FY11 produced a functional prototype consisting of an FPGA evaluation board, custom memory/interface circuit board, and custom software. The SPEEDR concept includes a stand-alone battery that is recharged by a computer USB (Universal Serial Bus) port while data is being downloaded.

Bernard. Craig↗
NASA NTRS2012

Development of the Self-Powered Extravehicular Mobility Unit Extravehicular Activity Data Recorder

The Self-Powered Extravehicular Mobility Unit (EMU) Extravehicular Activity (EVA) Data Recorder (SPEEDR) is a field-programmable gate array (FPGA)-based device designed to collect high-rate EMU Primary Life Support Subsystem (PLSS) data for download at a later time. During EVA, the existing EMU PLSS data downlink capability is one data packet every 2 minutes and is subject to bad packets or loss of signal. Higher-rate PLSS data is generated by the Enhanced Caution and Warning System but is not normally captured or distributed. Access to higher-rate data will increase the capability of EMU anomaly resolution team to pinpoint issues remotely, saving crew time by reducing required call-down Q&A and on-orbit diagnostic activities. With no Space Shuttle flights post Fiscal Year 2011 (FY11), and potentially limited down-mass capability, the ISS crew and ground support personnel will have to be capable of on-orbit operations to maintain, diagnose, repair, and return to service EMU hardware, possibly through 2028. Collecting high-rate EMU PLSS data during both intravehicular activity (IVA) and EVA operations will provide trending analysis for life extension and/or predictive performance. The SPEEDR concept has generated interest as a tool/technology that could be used for other International Space Station subsystems or future exploration-class space suits where hardware reliability/availability is critical and low/variable bandwidth may require store then forward methodology. Preliminary work in FY11 produced a functional prototype consisting of an FPGA evaluation board, custom memory/interface circuit board, and custom software. The SPEEDR concept includes a stand-alone battery that is recharged by a computer Universal Serial Bus (USB) port while data are being downloaded.

Bernard, Craig↗
NASA NTRSDate not supplied

Automated Reconfigurable Mission Adaptive Digital Assembly Systems (ARMADAS): Robotically Assembled Sustainable Lunar Infrastructure

Introduction: The Automated Reconfigurable Mission Adaptive Digital Assembly Systems (ARMADAS) project at NASA Ames Research Center is developing autonomous infrastructure, instrumentation, and spacecraft assembly and manufacturing capabilities for next generation exploration and science missions, with a goal to change the cost scaling of these missions relative to mission size and duration. Using a building-block approach with a 'kit of parts' composed of ultra-light, high-performance mechanical metamaterials, simplified robots leverage the period environment to achieve high levels of autonomy and reliability for in-space and surface assembly of large-scale apertures, solar-arrays, towers, habitats, and other infrastructure. Robots and structure break down into a compact form factor for launch. By leveraging economies of scale and achieving high-packing ratios, ARMADAS technology can revolutionize possible space missions by breaking the tyranny of the launch shroud, decreasing development times, decreasing mission costs for transformative science capability, and providing a scalable and versatile space infrastructure strategy. Capabilities: To date, the ARMADAS project has demonstrated autonomous assembly of large numbers of structural modules into a meters-scale structure in an earth gravity environment. The mechanical performance is on par with conventional space structures, at a fraction of the cost. By using highly repeatable manufacturing processes (injection molding carbon fiber reinforced space-rated polymers), the structures are both cost effective and highly precise. The ARAMADAS system carefully designs parts for high-precision assembly–the simple and cost-effective robots build structures much larger and more precise than themselves. While maintaining structural efficiency, the ARMADAS system encompasses many functional module types, including for solar power, comm/power routing, etc., that will enable entire infrastructure systems to be engineered and autonomously assembled with modular parts. With well-defined interfaces, custom instrumentation modules can easily be added to fit many mission objectives. Lunar Infrastructure Vision: At the LSIC spring meeting, ARMADAS will present a vision for a general-purpose lunar construction kit capable of meeting a wide variety of lunar surface infrastructure needs (Figure 1). Investing in an ecosystem of reconfigurable, discretely repairable parts and robots enables systems than can expand their capability, reconfigure to meet emergency or unforeseen needs, self-repair and reduce spare-part needs. With a small set of parts (module types), a wide variety of infrastructure needs can be met. Footing modules will allow infrastructure construction at locations with no surface preparation. Footer, primary structure, and rail modules can create reconfigurable rail systems. These rail systems can be used to reduce cost-of-transport between frequently accessed sites, provide dust mitigation, and convey power and communications. High-performance structure modules combined with power-routing and solar modules can create tall towers for power and communication. Concepts for habitats and garages encompass a structure to support regolith cover for a pre-integrated module to an entirely ARMADAS system-based structure. This system can be leveraged by many in-situ resource utilization (ISRU) technologies to simplify processes and augment capabilities.

C. E. Gregg↗
NASA NTRS1996

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second(Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high- speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗
NASA NTRS1996

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing, a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study, which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating, and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗
NASA NTRS1996

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗
NASA NTRS1996

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RNI subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a hi ch data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗
NASA NTRS2020

Corrosion Behavior of Stainless Steel 304 and Nickel 625 Under Iodine Vapor at 300 °C

The chemical, structural, and microstructural behavior of stainless steel 304 (SS 304) and nickel 625 (Ni 625) were probed after exposure to iodine vapor laminar flow at 300 °C. This work was conducted in support of the development of in-space propulsion utilizing iodine as a propellant. The kinetics of corrosion was measured in a custom-built iodine-compatible thermogravimetric analyzer rig at 300 °C in which samples were exposed to an iodine laminar vapor flow of 1 mg/min (carried by 20 mL/min argon gas) for up to 31 days. Samples were characterized after the experiment by X-ray diffraction, electron microscopy, energy dispersive X-ray spectroscopy, and dynamic secondary ion mass spectrometry. All samples formed scales consisting mainly of metal oxyiodides showing different chemistry, microstructure, and crystalline phases. The paralinear rate law best describes the kinetics of oxidation of the samples. SS 304 exhibited slightly slower kinetics of oxidation (106±3·10(exp –5) mg/sq.cm/day) than Ni 625 (122±3·10(exp –5) mg/sq.cm/day) in the low-oxygen and low-water environment.

Chemistry and Materials↗
NASA NTRS1999

Biotelemeters for Space Flights and Fetal Monitoring

Pill-shaped biotelemeters originally designed for space flight applications will soon be used for monitoring the health of a fetus during and after in-utero fetal surgery. The authors developed a family of biotelemeters that are not only small enough for rodent studies on board the space shuttle or international space station, but also fit through a 10 mm trocar, a plastic tube that is used in endoscopic fetal surgery to obtain minimally invasive access to the fetus. The first 'pill' measures pressure and temperature, and is currently undergoing long-term leakage and biocompatibility tests. A second pill under development measures pH and temperature. A prototype of the 'pH-pill' has been built and successfully tested and is presently being miniaturized into the same dimensions as the 'pressure pill'. Additional pills measuring heart rate, ECG, other ions such as calcium and potassium, and eventually glucose and blood gases, will follow. All pills are designed for ultra-low power consumption yielding lifetimes of up to 10 months in order to meet the requirements of fetal monitoring, but also to provide the capability of long-term space station experiments. Each pill transmits its pulse-interval-modulated signal on a unique carrier frequency in the frequency range of 174-216MHz. A custom-designed multi-channel receiver demodulates and decodes each pill signal and sends the data to a LabVIEW program that performs real-time data analysis and display. A patent for the pill family and its data analysis system is pending.

Mundt, Carsten W.↗
NASA NTRS2023

SafeAeroBERT: Towards a Safety-Informed Aerospace-Specific Language Model

As aviation systems continue to operate with high traffic, large amounts of documents containing safety-relevant data continue to be generated via reporting systems such as the ASRS. Advanced natural language processing techniques, specifically pre-trained language models, have shown great success in domain-specific applications; however, the text in aviation safety reports is inundated with jargon and thus not fully utilized by general pre-trained models. In this research, we work towards developing a safety-informed aerospace-specific language model by pre-training a Bidirectional Encoder Representations from Transformer (BERT) model on reports from the Aviation Safety Reporting System and the National Transportation Safety Board. The resulting model, called SafeAeroBERT, is fine-tuned for the specific task of document classification, and can be further tuned for named-entity recognition, relation detection, information retrieval, and summarization. Results from the classification task are compared between SafeAeroBERT, the base BERT, and SciBERT models and show SafeAeroBERT outperforms the general BERT and SciBERT on classifying reports about human factors, aircraft, and procedure. SafeAeroBERT can be used on custom tasks, not limited to document classification, and is intended to aid an intelligent knowledge manager for safety report repositories.

Aviation↗
NASA NTRS2015

Lunar Health Monitor (LHM)

Orbital Research, Inc., has developed a low-profile, wearable sensor suite for monitoring astronaut health in both intravehicular and extravehicular activities. The Lunar Health Monitor measures respiration, body temperature, electrocardiogram (EKG) heart rate, and other cardiac functions. Orbital Research's dry recording electrode is central to the innovation and can be incorporated into garments, eliminating the need for conductive pastes, adhesives, or gels. The patented dry recording electrode has been approved by the U.S. Food and Drug Administration. The LHM is easily worn under flight gear or with civilian clothing, making the system completely versatile for applications where continuous physiological monitoring is needed. During Phase II, Orbital Research developed a second-generation LHM that allows sensor customization for specific monitoring applications and anatomical constraints. Evaluations included graded exercise tests, lunar mission task simulations, functional battery tests, and resting measures. The LHM represents the successful integration of sensors into a wearable platform to capture long-duration and ambulatory physiological markers.

Lisy, Frederick J.↗
NASA NTRS2016

Modeling of Highly Instrumented Honeywell Turbofan Engine Tested with Ice Crystal Ingestion in the NASA Propulsion System Laboratory

The Propulsion Systems Laboratory (PSL), an altitude test facility at NASA Glenn Research Center, has been used to test a highly instrumented turbine engine at simulated altitude operating conditions. This is a continuation of the PSL testing that successfully duplicated the icing events that were experienced in a previous engine (serial LF01) during flight through ice crystal clouds, which was the first turbofan engine tested in PSL. This second model of the ALF502R-5A serial number LF11 is a highly instrumented version of the previous engine. The PSL facility provides a continuous cloud of ice crystals with controlled characteristics of size and concentration, which are ingested by the engine during operation at simulated altitudes. Several of the previous operating points tested in the LF01 engine were duplicated to confirm repeatability in LF11. The instrumentation included video cameras to visually illustrate the accretion of ice in the low pressure compressor (LPC) exit guide vane region in order to confirm the ice accretion, which was suspected during the testing of the LF01. Traditional instrumentation included static pressure taps in the low pressure compressor inner and outer flow path walls, as well as total pressure and temperature rakes in the low pressure compressor region. The test data was utilized to determine the losses and blockages due to accretion in the exit guide vane region of the LPC. Multiple data points were analyzed with the Honeywell Customer Deck. A full engine roll back point was modeled with the Numerical Propulsion System Simulation (NPSS) code. The mean line compressor flow analysis code with ice crystal modeling was utilized to estimate the parameters that indicate the risk of accretion, as well as to estimate the degree of blockage and losses caused by accretion during a full engine roll back point. The analysis provided additional validation of the icing risk parameters within the LPC, as well as the creation of models for estimating the rates of blockage growth and losses.

Simulation↗
NASA NTRS1975

Thermal Performance of a Customized Multilayer Insulation (MLI). Design and Fabrication of Test Facility Hardware

The design, fabrication, and assembly of hardware for testing the performance of a customized multilayer insulation are discussed. System components described include the thermal payload simulator, the modified cryoshroud, and a tank back pressure control device designed to maintain a constant liquid boiling point during the thermal evaluation of the multilayer insulation. The thermal payload simulator will provide a constant temperature surface in the range of 20.5 to 417K (37 to 750R) for the insulated tank to view. The cryoshroud was modified to establish a low temperature black body cavity while limiting liquid hydrogen usage to a minimum feasible rate.

Leonhard, K. E.↗