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NASA NTRSDate not supplied

An Overview of Printed Circuit Board Risks and Supplier Capability (Reuse Document ID 20205007963)

This HDPUG Webinar provides the audience a snapshot of quality variations in printed circuit boards, as assessed, using experiences in processing and risk analysis of PCB structural integrity coupons. The presentation will focus on PCB quality metrics, the relative type and number of non-conformances observed and trend analysis using statistical methods. Trend analysis shows the top five non-conformances observed across suppliers, the associated root cause(s) behind these non-conformance, suggestions of mitigation plans and most importantly – the relation of these non-conformances to end item reliability. The statistical trends will then be matched with the current state of the domestic PCB supplier base, its key challenges and opportunities. The presentation further discusses the methods applied at GSFC for evaluating candidate PCB technologies that promote the adoption of higher throughput and faster processing technology for GSFC missions.

printed cricuit boards, supplier capability, risk ↗

DOE OSTI2025

RD53 pixel readout integrated circuits for ATLAS and CMS HL-LHC upgrades

The RD53 collaboration has since 2013 developed new hybrid pixel detector chips with 50 × 50 μm2 pixels for the HL-LHC upgrades of the ATLAS and CMS experiments at CERN. A common architecture, design and verification framework has been developed to enable final pixel chips of different sizes to be designed, verified and tested to handle extreme hit rates of 3 GHz/cm2 (up to 12 GHz per chip) together with an increased trigger rate of 1 MHz and efficient readout of up to 5.12 Gbits/s per pixel chip. Tolerance to an extremely hostile radiation environment with 1 Grad over 10 years and induced SEU (Single Event Upset) rates of up to 100 upsets per second per chip have been major challenges to make reliable pixel chips. Three generations of pixel chips, and many specific mixed signal building blocks and radiation test chips, have been submitted and extensively tested to get to final production chips. The large, complex and high rate pixel chips have been developed with a strong emphasis on low power consumption together with a concurrent development and qualification of novel serial powering at chip, module and system level, to minimize detector material budget.

Alimonti, G↗

NASA NTRS1984

Recent developments in semiconductor research

Recent findings drawn from various laboratories focused toward a new understanding of the nature of crystal growth and how impurities are incorporated or excluded from the lattice were considered. From these findings a heuristic approach is given for improving the uniformity and charge carrier concentration of thin semiconductor films. Such improvement is considered essential to achieve respectable yield on large scale integrated circuits. A tentative conclusion is drawn which indicates that if the host compound crystal reactants are provided to the growing crystal surface in a reasonably stoichiometric manner, it is virtually impossible to include impurities into a growing crystal surface held at a sufficiently low temperature; impurities are incorporated into the crystal by gettering action of crystal defects located one and two monlayers beneath the growing surface. Devices in 3-5 semiconductors based on heterojunctions and two dimensional electron gases are noted and reliability concerns are voiced. Alternatives and novel device structures such as truly single crystal high quality silicon on insulator and beta silicon carbide devices are presented.

Yoder, M. N.↗

NASA NTRS1992

Flexible high speed codec

The project's objective is to develop an advanced high speed coding technology that provides substantial coding gains with limited bandwidth expansion for several common modulation types. The resulting technique is applicable to several continuous and burst communication environments. Decoding provides a significant gain with hard decisions alone and can utilize soft decision information when available from the demodulator to increase the coding gain. The hard decision codec will be implemented using a single application specific integrated circuit (ASIC) chip. It will be capable of coding and decoding as well as some formatting and synchronization functions at data rates up to 300 megabits per second (Mb/s). Code rate is a function of the block length and can vary from 7/8 to 15/16. Length of coded bursts can be any multiple of 32 that is greater than or equal to 256 bits. Coding may be switched in or out on a burst by burst basis with no change in the throughput delay. Reliability information in the form of 3-bit (8-level) soft decisions, can be exploited using applique circuitry around the hard decision codec. This applique circuitry will be discrete logic in the present contract. However, ease of transition to LSI is one of the design guidelines. Discussed here is the selected coding technique. Its application to some communication systems is described. Performance with 4, 8, and 16-ary Phase Shift Keying (PSK) modulation is also presented.

Boyd, R. W.↗

NASA NTRS1991

Low cost high efficiency GaAs monolithic RF module for SARSAT distress beacons

Low cost high performance (5 Watts output) 406 MHz beacons are urgently needed to realize the maximum utilization of the Search and Rescue Satellite-Aided Tracking (SARSAT) system spearheaded in the U.S. by NASA. Although current technology can produce beacons meeting the output power requirement, power consumption is high due to the low efficiency of available transmitters. Field performance is currently unsatisfactory due to the lack of safe and reliable high density batteries capable of operation at -40 C. Low cost production is also a crucial but elusive requirement for the ultimate wide scale utilization of this system. Microwave Monolithics Incorporated (MMInc.) has proposed to make both the technical and cost goals for the SARSAT beacon attainable by developing a monolithic GaAs chip set for the RF module. This chip set consists of a high efficiency power amplifier and a bi-phase modulator. In addition to implementing the RF module in Monolithic Microwave Integrated Circuit (MMIC) form to minimize ultimate production costs, the power amplifier has a power-added efficiency nearly twice that attained with current commercial technology. A distress beacon built using this RF module chip set will be significantly smaller in size and lighter in weight due to a smaller battery requirement, since the 406 MHz signal source and the digital controller have far lower power consumption compared to the 5 watt power amplifier. All the program tasks have been successfully completed. The GaAs MMIC RF module chip set has been designed to be compatible with the present 406 MHz signal source and digital controller. A complete high performance low cost SARSAT beacon can be realized with only additional minor iteration and systems integration.

Petersen, W. C.↗

NASA NTRS2017

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

Today's launch vehicles complex electronic and avionic systems heavily utilize the Field Programmable Gate Array (FPGA) integrated circuit (IC). FPGAs are prevalent ICs in communication protocols such as MIL-STD-1553B, and in control signal commands such as in solenoid/servo valves actuations. This paper will demonstrate guidelines to estimate FPGA failure rates for a launch vehicle, the guidelines will account for hardware, firmware, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC, FPGA memory and clock. The firmware portion will provide guidelines on the high level FPGA programming language and ways to account for software/code reliability growth. The radiation portion will provide guidelines on environment susceptibility as well as guidelines on tailoring other launch vehicle programs historical data to a specific launch vehicle.

Al Hassan, Mohammad↗

DOE OSTI2026

A Survey on the Expanding Scope and Interdisciplinary Opportunities for Processing-in-Memory Techniques

Processing-in-Memory (PIM) is emerging as a practical path to overcome the limitations of traditional von Neumann architectures. At its core, PIM systems implement computing primitives such as logic operations and multiply-accumulate acceleration through compute-in-memory, near-memory processing, or hybrid designs. The role of memory cells varies widely across technologies, acting as inputs, outputs, or analog accumulators through bit-lines and sense amplifiers. This diversity creates trade-offs in precision, bandwidth, latency, and programmability, making it difficult to build a unified understanding on the progress of the field. In this survey, we organize recent advances of PIM into three areas. First, we discuss the progress on the architectural optimizations of PIM and its integration with both DRAM and emerging non-volatile memories. Second, we examine how PIM is being used to accelerate key computing domains, including generative AI workloads and high-performance kernels, along with new approaches. Third, we highlight the growing adoption of PIM in computational sciences, where it is being applied to solve interdisciplinary problems such as genome analysis, mRNA quantification, mass spectrometry, quantum circuit simulation, wave modeling, and secure computation. Finally, we synthesize the major challenges that continue to slow PIM adoption, including manufacturing constraints, power delivery, thermal reliability, data consistency, runtime and memory-management coordination, and the difficulty of building portable software abstractions without sacrificing commercial viability. This work provides an updated, structured perspective on PIM’s potential across computing and computational sciences and the barriers that must be solved for it to reach its full impact.

Asifuzzaman, Kazi [Oak Ridge National Laboratory (↗

DOE OSTI2024

Spectroscopic Measurements and Models of Energy Deposition in the Substrate of Quantum Circuits by Natural Ionizing Radiation

Naturally occurring background radiation is a potential source of correlated decoherence events in superconducting qubits that will challenge error-correction schemes. In order to characterize the radiation environment in an unshielded laboratory representative of superconducting qubits’ environments, we performed broadband, spectroscopic measurements of background radiation events inside a millikelvin refrigerator. The spectrometer was designed to mimic the size and composition of a quantum circuit. Specifically, we measured the background radiation spectra in silicon substrates of two thicknesses, 500 and 1500 µm, and one area, 25 mm 2 . The observed spectra span energies from a few kilo-electron-volts up to nearly 10 MeV, are nearly featureless, and decrease in intensity by a factor of 40 000 between 100 keV and 3 MeV for the 500-µm substrate. We integrate the spectra to obtain the average event rates and deposited power levels. These quantities correspond to a rate of 0.023 events per second and a power of 4.9 keV s -1 , when counting events that deposit at least 40 keV for the 500-µm-thick substrate. We find that the cryogenic measurements are in good agreement with predictions based on simple measurements of the terrestrial gamma-ray flux outside the refrigerator, published models of cosmic-ray fluxes, a crude model of the cryostat, and radiation-transport simulations. This model requires no free parameters to predict the background radiation spectra in the silicon substrates. The agreement between measurements and predictions demonstrates that the model we present can be used to assess the relative contributions of terrestrial and cosmic-ray sources to background radiation interactions in silicon substrates of varying thickness. These spectroscopic measurements are performed with a novel combination of superconducting microresonators located on micromachined silicon islands that define the interaction volume with background radiation. The resonators transduce deposited energy to a readily detectable electrical signal. Microresonator readout closely resembles dispersive superconducting qubit readout, so similar devices—with or without micromachined islands—are suitable for integration with superconducting quantum circuits as detectors for background radiation events. For our specific laboratory conditions, we find that gamma-ray emissions from radioisotopes are responsible for the majority of events that deposit E < 1 ⁢Me⁢V. We present results demonstrating that the background radiation spectrum contains relevant contributions from cosmic-ray particles other than muons, particularly a tail of multi-mega-electron-volt events due to protons and neutrons. These observations suggest several paths to reducing the impact of background radiation on quantum circuits, supported by an empirically validated model for generating reliable predictions of radiation interactions with silicon substrates.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

NASA NTRS1981

A high capacity satellite switched TDMA microwave switch matrix

A description is given of the conceptual design of a high-capacity satellite switched-time division multiple access (SS-TDMA) microwave switch matrix fabricated with GaAs monolithic microwave integrated circuits (MMICs), including integration of both microwave and control logic circuits into the monolithic design. The technology required for a 30/20 GHz communications system includes an on-board SS-TDMA switch matrix. A conceptual design study that has been completed for a wideband, high-capacity (typically 100 x 100) channel switch matrix using technology anticipated for 1987 is described, noting that the study resulted in a switch matrix design concept using a coupled crossbar architecture implemented with MMIC. The design involves basic building block MMIC, permitting flexible growth and efficient wraparound redundancy to increase reliability.

Cory, B. J.↗

NASA NTRS1994

Development of a Power Electronics Unit for the Space Station Plasma Contactor

A hollow cathode plasma contactor has been baselined as a charge control device for the Space Station (SS) to prevent deleterious interactions of coated structural components with the ambient plasma. NASA LeRC Work Package 4 initiated the development of a plasma contactor system comprised of a Power Electronics Unit (PEU), an Expellant Management Unit (EMU), a command and data interface, and a Plasma Contactor Unit (PCU). A breadboard PEU was designed and fabricated. The breadboard PEU contains a cathode heater and discharge power supply, which were required to operate the PCU, a control and auxiliary power converter, an EMU interface, a command and telemetry interface, and a controller. The cathode heater and discharge supplies utilized a push-pull topology with a switching frequency of 20 kHz and pulse-width-modulated (PWM) control. A pulse ignition circuit derived from that used in arcjet power processors was incorporated in the discharge supply for discharge ignition. An 8088 based microcontroller was utilized in the breadboard model to provide a flexible platform for controller development with a simple command/data interface incorporating a direct connection to SS Mulitplexer/Demultiplexer (MDM) analog and digital I/O cards. Incorporating this in the flight model would eliminate the hardware and software overhead associated with a 1553 serial interface. The PEU autonomously operated the plasma contactor based on command inputs and was successfully integrated with a prototype plasma contactor unit demonstrating reliable ignition of the discharge and steady-state operation.

Hamley, John A.↗

NASA NTRS2011

Integrated Software Health Management for Aircraft GN and C

Modern aircraft rely heavily on dependable operation of many safety-critical software components. Despite careful design, verification and validation (V&V), on-board software can fail with disastrous consequences if it encounters problematic software/hardware interaction or must operate in an unexpected environment. We are using a Bayesian approach to monitor the software and its behavior during operation and provide up-to-date information about the health of the software and its components. The powerful reasoning mechanism provided by our model-based Bayesian approach makes reliable diagnosis of the root causes possible and minimizes the number of false alarms. Compilation of the Bayesian model into compact arithmetic circuits makes SWHM feasible even on platforms with limited CPU power. We show initial results of SWHM on a small simulator of an embedded aircraft software system, where software and sensor faults can be injected.

Schumann, Johann↗

NASA NTRS1993

A comparative study between shielded and open coplanar waveguide discontinuities

A comparative study between open and shielded coplanar waveguide (CPW) discontinuities is presented. The space domain integral equation method is used to characterize several discontinuities such as the open-end CPW and CPW series stubs. Two different geometries of CPW series stubs (straight and bent stubs) are compared with respect to resonant frequency and radiation loss. In addition, the encountered radiation loss due to different CPW shunt stubs is evaluated experimentally. The notion of forced radiation simulation is presented, and the results of such a simulation are compared to the actual radiation loss obtained rigorously. It is shown that such a simulation cannot give reliable results concerning radiation loss from printed circuits.

Dib, Nihad I.↗

NASA NTRS1993

A low-mass faraday cup experiment for the solar wind

Faraday cups have proven to be very reliable and accurate instruments capable of making 3-D velocity distribution measurements on spinning or 3-axis stabilized spacecraft. Faraday cup instrumentation continues to be appropriate for heliospheric missions. As an example, the reductions in mass possible relative to the solar wind detection system about to be flown on the WIND spacecraft were estimated. Through the use of technology developed or used at the MIT Center for Space Research but were not able to utilize for WIND: surface-mount packaging, field-programmable gate arrays, an optically-switched high voltage supply, and an integrated-circuit power converter, it was estimated that the mass of the Faraday Cup system could be reduced from 5 kg to 1.8 kg. Further redesign of the electronics incorporating hybrid integrated circuits as well as a decrease in the sensor size, with a corresponding increase in measurement cycle time, could lead to a significantly lower mass for other mission applications. Reduction in mass of the entire spacecraft-experiment system is critically dependent on early and continual collaborative efforts between the spacecraft engineers and the experimenters. Those efforts concern a range of issues from spacecraft structure to data systems to the spacecraft power voltage levels. Requirements for flight qualification affect use of newer, lighter electronics packaging and its implementation; the issue of quality assurance needs to be specifically addressed. Lower cost and reduced mass can best be achieved through the efforts of a relatively small group dedicated to the success of the mission. Such a group needs a fixed budget and greater control over quality assurance requirements, together with a reasonable oversight mechanism.

Lazarus, A. J.↗

NASA NTRS2022

The Promise of Alloy Anodes for Solid-State Batteries

Solid-state batteries are anext-generation technology that could featureimproved safety and energy density, but reliably integrating high-capacity electrode materials to enable high energy while retaining stablelong-termcycling remains a challenge. Anode materials that alloy with lithium, such as silicon, tin, and aluminum,offer high capacity that canyield high-energy battery cells. The use of alloy anodes in solid-state batteries potentially offers major mechanistic benefits compared to other anode contendersand battery systems, such as lithium metal in solid-state architectures or alloys in liquid-electrolyte batteries. This perspective discusseskey advantagesof alloy anode materials for solid-state batteries, including the avoidance of the short circuiting observed with lithium metal and the chemo-mechanical stabilization of the solid-electrolyte interphase (SEI). We further discuss open research questions and challenges in engineering alloy-anode-based solid-state batteries, with the goal of advancing our understanding and control of alloy anode materialswithin solid-state architectures toward commercial application.

John A Lewis↗

NASA NTRS2010

Nanoionics-Based Switches for Radio-Frequency Applications

Nanoionics-based devices have shown promise as alternatives to microelectromechanical systems (MEMS) and semiconductor diode devices for switching radio-frequency (RF) signals in diverse systems. Examples of systems that utilize RF switches include phase shifters for electronically steerable phased-array antennas, multiplexers, cellular telephones and other radio transceivers, and other portable electronic devices. Semiconductor diode switches can operate at low potentials (about 1 to 3 V) and high speeds (switching times of the order of nanoseconds) but are characterized by significant insertion loss, high DC power consumption, low isolation, and generation of third-order harmonics and intermodulation distortion (IMD). MEMS-based switches feature low insertion loss (of the order of 0.2 dB), low DC power consumption (picowatts), high isolation (>30 dB), and low IMD, but contain moving parts, are not highly reliable, and must be operated at high actuation potentials (20 to 60 V) generated and applied by use of complex circuitry. In addition, fabrication of MEMS is complex, involving many processing steps. Nanoionics-based switches offer the superior RF performance and low power consumption of MEMS switches, without need for the high potentials and complex circuitry necessary for operation of MEMS switches. At the same time, nanoionics-based switches offer the high switching speed of semiconductor devices. Also, like semiconductor devices, nanoionics-based switches can be fabricated relatively inexpensively by use of conventional integrated-circuit fabrication techniques. More over, nanoionics-based switches have simple planar structures that can easily be integrated into RF power-distribution circuits.

Nessel, James↗

DOE OSTI2024

Advanced Sensor Deployment for Distribution System State Estimation and Fault Identification

Distribution systems are currently facing steep operational challenges as a result of the rapidly increasing integration of renewables and other distributed energy resources (DERs) at both the primary and secondary circuit levels. Distribution utilities and system operators have traditionally had some visibility of their primary circuits using low-frequency supervisory control and data acquisition systems, and they have had very poor if not zero visibility of the secondary circuits where the presence of DERs is constantly increasing. Therefore, this paper presents simulation studies to demonstrate the benefits of an advanced, high-fidelity sensor technology, called as the Meta-Alert System (MAS), developed by Electrical Grid Monitoring, Ltd. (EGM), on the distribution grid. First, a reliable model of the EGM sensors is developed, and then two use cases, distribution system state estimation (DSSE) and fault identification are simulated to evaluate the performance of the MAS technology. Simulation results on the Electric Power Research Institute J1 feeder demonstrate that the MAS can effectively participate in system-level DSSE programs and can detect and locate faults faster than traditional distribution protection schemes.

distribution system↗

DOE OSTI2026

Characterization of the First Prototype of the L1K65n Differential-Output Charge-Sensitive Preamplifier ASIC for High-Performance, Low-Background HPGe Detector Readout

Next-generation neutrinoless double-beta (0νββ) decay searches require a large detector/isotope mass and very low radioactive backgrounds. The upcoming LEGEND-1000 experiment (Large Enriched Germanium Experiment for Neutrinoless double-beta Decay) constitute a ton-scale array of several hundred high-purity germanium (HPGe) detectors enriched in 76Ge, the isotope of interest. It aims to reach a sensitivity beyond 10 28 years on the 0νββ decay half-life of 76Ge, necessitating an order of magnitude reduction in background with respect to the state of the art. This will require the implementation of a dedicated application specific integrated circuit (ASIC) preamplifier that will significantly lower background contribution compared to the conventional low-mass front end (LMFE) employed in the Majorana Demonstrator and LEGEND-200 experiments while maintaining or improving energy resolution and other performance parameters. Features include a high (9 MeV) dynamic range with noise low enough to achieve a trigger threshold of <1 keV, a single power supply to reduce background-inducing cabling, and a differential output to maintain signal integrity over several meters of transmission line. The chip would be optimized to operate in liquid argon (87 K) and be able to do so reliably for ten years. Following on from an earlier 180-nm prototype, we have developed a differential-output charge-sensitive preamplifier ASIC fabricated in a 65-nm process, 1×2 mm in size, that addresses these needs. Here, we present recent results from the successful testing and characterization of the first version of this device.

ASIC↗

DOE OSTI2025

OPET Hardware (Open PV Electrical Tool Hardware) [SWR-25-42]

OPET (Open-source Photovoltaic Electrical Tool) is used for performance measurements of solar photovoltaic (PV) devices in the field under natural sunlight or in the lab under artificial light. Its primary use is in research and development of solar cells and modules, specifically in reliability and durability research of PV devices. Some features and functions include: -IV curve measurements with linear or cosine distributed measurement points -PV device active loading at open circuit voltage (Voc), short circuit current (Isc) and maximum power point (Pmp) -Bias power supply to overcome series resistance in contact wires for Isc measurements and loading -PV voltage input in five ranges from 1V to 100V -PV current input ranges -Low current version, six current ranges from 1.1mA to 340mA -High current version, six current ranges from 50mA to 15A -IO ports for I2C and SPI temperature sensor Arduino extension boards -Integrated fan control This repository contains everything relating to the hardware of the OPET device. If you are looking for the firmware or software repositories, links are below: https://github.com/NREL/opet-firmware https://github.com/NREL/opet-control

McDanold, Byron [National Renewable Energy Laborat↗