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A low-noise microwave receiver downconverter utilizing thin-film high-critical-temperature superconducting (HTS) passive circuitry and semiconductor active devices has been developed for use in space.
We have comprehensively tested uncooled, free space coupled, InGaAs Quad Photoreceivers having 0.5mm, 1mm, and 2mm diameter integrated with a low noise transimpedance amplifier (TIA)using 30MeV Protons, 100MeV Protons, 662keV Gamma Rays, 1GeV/n Helium, and 1GeV/n Iron at room temperature of ~20°C.These devices find multiple applications in space for differential wave front sensing as part of a Gravitational Wave Observatory, as well as instrumentation and control for next generation space telescopes. The bandwidth of all receivers was 20MHz which was TIA limited. All 0.5mm and 1mm devices were found to be fully functional at normal operating conditions and at room temperature for Protons, Gamma Rays, 1GeV/n Helium, and 1GeV/n Iron. Only one quadrant of a 2mm In GaAs Quad had hard failure due to 1GeV/n Helium Ions; otherwise it too survived all other radiation tests. Detailed test results follow in the manuscript including recommendations for future space flights. These radiation test results, combined with the earlier successful mechanical shock and vibration testing mean these devices have passed preliminary testing for space qualification.
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An S-band radio frequency interference (RFI) receiver to analyze and identify sources of RFI problems in the Deep Space Network DSN tracking stations is described. The RFI receiver is a constant gain, double conversion, open loop receiver with dual sine/cosine channel outputs, providing a total of 20 MHZ monitoring capability. This receiver is computer controlled using a MODCOMP II miniprocessor. The RFI receiver has been designed to operate at a 150 Kelvin system noise temperature accomplished by cascading two low noise field effect transistor (FET) amplifiers for the receiver front-end. The first stage low noise FET amplifier is mounted at the feed horn to minimize any cable losses to achieve a lower system noise temperature. The receiver is tunable over the frequency range of 2150 to 2450 MHz in both sine/cosine output channels with a resolution of 100 kHz.
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Circuit utilizing a transistorized differential amplifier is developed for biomedical use. This low voltage operating circuit provides adjustable cancellation at the input for unbalanced noise signals, and automatic temperature compensation is accomplished by a single active element across the input-output ends.
Low-noise detectors are a key technology for the next generation of astronomical instruments aimed at spectroscopy of faint objects and the search for exoplanets. In this context, the multiple-amplifier sensing charge-coupled device (MAS-CCD) emerges as a promising technology for future scientific instruments. A critical parameter affecting the performance of these devices is spurious charge, produced by the clocking of the gates. Its measurement is typically challenging with existing methods. In practice, the optimization of this parameter often relies on empirical procedures that require significant time and careful consideration of the trade-off with full-well capacity. In this work, we present a new technique to estimate spurious charge based on covariance analysis of the output amplifiers of the MAS-CCD, which measures the same charge packet in different amplifiers at different times. The method enables fast and precise measurements of spurious charge under operating conditions where conventional approaches are difficult to apply. We develop the theoretical framework of the method and validate the model through simulations. The results demonstrate the feasibility of this approach and suggest that it could serve as a basis for reliable large-scale characterization of sensor performance.
New circuit precisely compares phases of two RF signals nearly equal in frequency, such as two hydrogen-maser frequency standards. Measuring circuit minimizes interactions between two sources. Also stabilized against thermal effects and against noise that could produce erroneous readings. Heat sinking, buffer amplifiers, and low-noise zero-crossing detector make picosecond precision possible.
Report describes design and low-temperature tests of low-noise GaAs microwave amplifier combined with microstrip band-pass filter. Two versions of microstrip filter used in alternate tests; in one version, microstrips formed as films of high-transition-temperature superconductor Y/Ba/Cu/O on lanthanum aluminate substrate with gold film as ground plane. Other version identical except microstrips as well as ground plane made of gold, normally conductive.
A Gated CDS Integrator (GCI) may amplify low-level signals without introducing excessive offset and noise. The GCI may also amplify the low level signals with accurate and variable gain. The GCI may include a modulator preceding an amplifier such that offset or noise present in a signal path between the modulator and a demodulator input is translated to a higher out of band frequency, and thereafter reduced by a double sampled discrete time integrator which also reduces thermal noise. The thermal noise may also be reduced by averaging the output of the discrete time integrator.
A Gated CDS Integrator (GCI) may amplify low-level signals without introducing excessive offset and noise. The GCI may also amplify the low level signals with accurate and variable gain. The GCI may include a modulator preceding a linear amplifier such that offset or noise present in a signal path between the modulator and a demodulator input is translated to a higher out of band frequency.
The work aims at developing a low-power Silicon on Insulator Complementary Metal Oxide Semiconductor (SOI CMOS) Transceiver for deep-space communications. RF Receiver must accomplish the following tasks: (a) Select the desired radio channel and reject other radio signals, (b) Amplify the desired radio signal and translate them back to baseband, and (c) Detect and decode the information with Low BER. In order to minimize cost and achieve high level of integration, receiver architecture should use least number of external filters and passive components. It should also consume least amount of power to minimize battery cost, size, and weight. One of the most stringent requirements for deep-space communication is the low-power operation. Our study identified that two candidate architectures listed in the following meet these requirements: (1) Low-IF receiver, (2) Sub-sampling receiver. The low-IF receiver uses minimum number of external components. Compared to Zero-IF (Direct conversion) architecture, it has less severe offset and flicker noise problems. The Sub-sampling receiver amplifies the RF signal and samples it using track-and-hold Subsampling mixer. These architectures provide low-power solution for the short- range communications missions on Mars. Accomplishments to date include: (1) System-level design and simulation of a Double-Differential PSK receiver, (2) Implementation of Honeywell SOI CMOS process design kit (PDK) in Cadence design tools, (3) Design of test circuits to investigate relationships between layout techniques, geometry, and low-frequency noise in SOI CMOS, (4) Model development and verification of on-chip spiral inductors in SOI CMOS process, (5) Design/implementation of low-power low-noise amplifier (LNA) and mixer for low-IF receiver, and (6) Design/implementation of high-gain LNA for sub-sampling receiver. Our initial results show that substantial improvement in power consumption is achieved using SOI CMOS as compared to standard CMOS process. Potential advantages of SOI CMOS for deep-space communication electronics include: (1) Radiation hardness, (2) Low-power operation, and (3) System-on-Chip (SOC) solutions.
Atmospheric science and weather forecasting require measurements of the temperature and humidity vs. altitude. These sounding measurements are obtained at frequencies close to the resonance frequencies of oxygen (118 GHz) and water (183 GHz) molecules. We have characterized a broadband amplifier that will increase the sensitivity of sounding and other instruments at these frequencies. This study demonstrated for the first t1me continuous low noise amplification from 100 to 180 GHz. The measured InP monolithic millimeter-wave Integrated circuit (MMIC) amplifier had more than 18 dB of gain from 100 to 180 GHz and 15 dB of gain up to 220 GHz. This is the widest bandwidth low noise amplifier result at these frequencies to date. The circuit was fabricated in Northrop Grumman Corporation 35 nm InP high electron mobility transistor (HEMT).
A helium refrigerator utilizing the Gifford-McMahon/Joule-Thomson (GM/JT) cycle was designed and tested to demonstrate the feasibility of using small closed-cycle refrigerators as an alternative to batch-filled cryostats for operating temperatures below 4 K. The systems could be used to cool low-noise microwave maser amplifiers located in large parabolic antennas. These antennas tilt vertically, making conventional liquid-filled dewars difficult to use. The system could also be used for a non-tilting beam waveguide antenna to reduce the helium consumption of a liquid helium cryostat. The prototype system is adjustable to provide 700 mW of cooling at 2.5 K to 3 W at 4.3 K. Performance of the unit is not significantly affected by physical orientation. The volume occupied by the refrigerator is less than 0.1 cu m. Two JT expansion stages are used to maximize cooling capacity per unit mass flow. The heat exchangers were designed to produce minimum pressure drop in the return gas stream. Pressure drop for the entire JT return circuit is less than 5 kpa at a mass flow of 0.06 g/sec when operating at 2.5 K.
Several previously used instrumentation amplifier circuits were examined to find limitations and possibilities for improvement. One general configuration is analyzed in detail, and methods for improvement are enumerated. An improved amplifier circuit is described and analyzed with respect to common mode rejection and noise. Experimental data are presented showing good agreement between calculated and measured common mode rejection ratio and equivalent noise resistance. The amplifier is shown to be capable of common mode rejection in excess of 140 db for a trimmed circuit at frequencies below 100 Hz and equivalent white noise below 3.0 nv/square root of Hz above 1000 Hz.
A high frequency oscillator is provided by connecting two amplifier circuits in parallel where each amplifier circuit provides the other amplifier circuit with the conditions necessary for oscillation. The inherent noise present in both amplifier circuits causes the quiescent current, and in turn, the generated frequency, to change. The changes in quiescent current cause the transconductance and the load impedance of each amplifier circuit to vary, and this in turn results in opposing changes in the input susceptance of each amplifier circuit. Because the changes in input susceptance oppose each other, the changes in quiescent current also oppose each other. The net result is that frequency stability is enhanced.
We report on the performance of a novel W-band amplifier fabricated utilizing very compact bump bonds. We bump-bonded a high-speed, low-noise InP high electron mobility transistor (HEMT) onto a separately fabricated passive circuit having a GaAs substrate. The compact bumps and small chip size were used for efficient coupling and maximum circuit design flexibility. This new quasi-monolithic millimeter-wave integrated circuit (Q-MMIC) amplifier exhibits a peak gain of 5.8 dB at approx. 90 GHz and a 3 dB bandwidth of greater than 25%. To our knowledge, this is the highest frequency amplifier assembled using bump-bonded technology. Our bump-bonding technique is a useful alternative to the high cost of monolithic millimeter-wave integrated circuits (MMIC's). Effects of the bumps on the circuit appear to be minimal. We used the simple matching circuit for demonstrating the technology - future circuits would have all of the elements (resistors, via holes, bias lines, etc.) included 'in conventional MMIC's. Our design in different from other investigators' efforts in that the bumps are only 8 microns thick by 15 microns wide. The bump sizes were sufficiently small that the devices, originally designed for W-band hybrid circuits, could be bonded without alteration. Figure 3 shows the measured and simulated magnitude of S-parameters from 85-120 GHz, of the InP HEMT bump-bonded to the low noise amplifier (LNA) passive. The maximum gain is 5.8 dB at approx. 90 GHz, and gain extends to 117 GHz. Measurement of a single device (without matching networks) shows approx. 1 dB of gain at 90 GHz. The measured gain of the amplifier agrees well with the design in the center of the measurement band, and the agreement falls off at the band edges. Since no accommodation for the bump-bonding parasitics was made in the design, the result implies that the parasitic elements associated with the bonding itself do not dominate the performance of the LNA circuit. It should be noted that this amplifier was designed for good noise performance, which is why the input and output return losses are poorer than one would expect for an amplifier simply matched for gain. However, noise performance has not been measured at this time. While the agreement between modeled vs. experimental data is not exact, the data prove that bump-bonded technology can be used for amplifiers at frequencies at least as high as 100 GHz. JPL is pursuing this technology as a way to economically and quickly incorporate the best available HEMTs into a circuit with all of the reliability and circuit design flexibility offered by MMIC technology. We are currently using the technology to fabricate 4-stage, wide-band, W-band LNA's. We have also performed pull and shear tests which show that the bump bonds are sufficiently robust for any anticipated application.
We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.