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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

Frequency-multiplexed and pipelined iterative optical systolic array processors

Optical matrix processors using acoustooptic transducers are described, with emphasis on new systolic array architectures using frequency multiplexing in addition to space and time multiplexing. A Kalman filtering application is considered in a case study from which the operations required on such a system can be defined. This also serves as a new and powerful application for iterative optical processors. The importance of pipelining the data flow and the ordering of the operations performed in a specific application of such a system are also noted. Several examples of how to effectively achieve this are included. A new technique for handling bipolar data on such architectures is also described.

Casasent, D.↗
NASA NTRS1983

Optical systolic array processor using residue arithmetic

The use of residue arithmetic to increase the accuracy and reduce the dynamic range requirements of optical matrix-vector processors is evaluated. It is determined that matrix-vector operations and iterative algorithms can be performed totally in residue notation. A new parallel residue quantizer circuit is developed which significantly improves the performance of the systolic array feedback processor. Results are presented of a computer simulation of this system used to solve a set of three simultaneous equations.

Jackson, J.↗
NASA NTRS1984

Investigation of TM Band-to-band Registration Using the JSC Registration Processor

The JSC registration processor performs scene-to-scene (or band-to-band) correlation based on edge images. The edge images are derived from a percentage of the edge pixels calculated from the raw scene data, excluding clouds and other extraneous data in the scene. Correlations are performed on patches (blocks) of the edge images, and the correlation peak location in each patch is estimated iteratively to fractional pixel location accuracy. Peak offset locations from all patches over the scene are then considered together, and a variety of tests are made to weed out outliers and other inconsistencies before a distortion model is assumed. Thus, the correlation peak offset locations in each patch indicate quantitatively how well the two TM bands register to each other over that patch of scene data. The average of these offsets indicate the overall accuracies of the band-to-band registration. The registration processor was also used to register one acquisition to another acquisition of multitemporal TM data acquired over the same ground track. Band 4 images from both acquisitions were correlated and an rms error of a fraction of a pixel was routinely obtained.

Yao, S. S.↗
NASA NTRS1982

A programmable power processor for high power space applications

A Programmable Power Processor (P3) has been developed for application in future large space power systems. The P3 is capable of operation over a wide range of input voltage (26 to 375 Vdc) and output voltage (24 to 180 Vdc). The peak output power capability is 18 kW (180 V at 100 A). The output characteristics of the P3 can be programmed to any voltage and/or current level within the limits of the processor and may be controlled as a function of internal or external parameters. Seven breadboard P3s and one 'flight-type' engineering model P3 have been built and tested both individually and in electrical power systems. The programmable feature allows the P3 to be used in a variety of applications by changing the output characteristics. Test results, including efficiency at various input/output combinations, transient response, and output impedance, are presented.

Lanier, J. R., Jr.↗
NASA NTRS1982

30/20 GHz communications systems baseband processor development

The architecture and system design concepts for a commercial satellite communications system planned for the 1990's has been developed. The system provides data communications between the individual users via trunking and customer premise service terminals utilizing a central switching satellite operating in a time-division multiple-access mode. Baseband processing is employed to route and control traffic on an individual message basis while providing significant advantages in improved link margins and system flexibility. Key technology developments required to prove the flight readiness of the baseband processor design are being verified in the baseband processor proof-of-concept model described herein.

Brown, L.↗
NASA NTRS1984

Modeling algorithm execution time on processor arrays

An approach to modelling the execution time of algorithms on parallel arrays is presented. This time is expressed as a function of the number of processors and system parameters. The resulting model has been applied to a parallel implementation of the conjugate-gradient algorithm on NASA's FEM. Results of experiments performed to compare the model predictions against actual behavior show that the floating-point arithmetic, communication, and synchronization components of the parallel algorithm execution time were correctly modelled. The results also show that the overhead caused by the interaction of the system software and the actual parallel hardware must be reflected in the model parameters. The model has been used to predict the performance of the conjugate gradient algorithm on a given problem as the number of processors and machine characteristics varied.

Adams, L. M.↗
NASA NTRS1985

Investigation of TM Band-to-band Registration Using the JSC Registration Processor

When the Thematic Mapper (TM) imagery was first received and displayed in the fall of 1982, its radiometric lucidity and geometric fidelity was judged far superior to the multispectral scanner (MSS) imagery. The MSS data from the LANDSAT series of satellites have served well as the mainstay of satellite imagery for the remote sensing community up to now. Therefore, there is great anticipation as to the utility of this new IM imagery to advance the field of remote sensing. The thematic mapper (TM) band to band registration accuracy evaluation was discussed. In particular, the band to band registration accuracies of the TM data in the subpixel region were evaluated using the Johnson Space Center (JSC) registration processor which is ideally suited for this task. The JSC registration processor was also used to register one acquisition to another acquisition of multitemporal TM data acquired over the same ground track. The approach and the rationale behind the task, the description of the data set, the evaluation results, and the preliminary conclusions are discussed.

Yao, S. S.↗
NASA NTRS1985

Filter induced errors in laser anemometer measurements using counter processors

Simulations of laser Doppler anemometer (LDA) systems have focused primarily on noise studies or biasing errors. Another possible source of error is the choice of filter types and filter cutoff frequencies. Before it is applied to the counter portion of the signal processor, a Doppler burst is filtered to remove the pedestal and to reduce noise in the frequency bands outside the region in which the signal occurs. Filtering, however, introduces errors into the measurement of the frequency of the input signal which leads to inaccurate results. Errors caused by signal filtering in an LDA counter-processor data acquisition system are evaluated and filters for a specific application which will reduce these errors are chosen.

Oberle, L. G.↗
NASA NTRS1983

Satellite baseband processor test performance summary

A satellite baseband processor (BBP) has been developed for the NASA Lewis 30/20 GHz Satellite Communications Program. The BBP design, reported elsewhere, has been implemented in a proof-of-concept (POC) model. The results of the laboratory system tests of the POC are summarized. Bit error rate test results are presented for the FDM/TDMA communication system operating at 27.5, 110, and 550 Mbps over a variety of operating conditions. The results clearly demonstrate the applicability of baseband processing to future high capacity satellite communication system concepts. A brief description of the system concept, its function, and the role of the baseband processor are presented. The test conditions and means of simulation are also described. The methods of test evaluation and their significance in a system context are given.

Shaneyfelt, J. T.↗
NASA NTRS1985

Parallel processor programs in the Federal Government

In 1982, a report dealing with the nation's research needs in high-speed computing called for increased access to supercomputing resources for the research community, research in computational mathematics, and increased research in the technology base needed for the next generation of supercomputers. Since that time a number of programs addressing future generations of computers, particularly parallel processors, have been started by U.S. government agencies. The present paper provides a description of the largest government programs in parallel processing. Established in fiscal year 1985 by the Institute for Defense Analyses for the National Security Agency, the Supercomputing Research Center will pursue research to advance the state of the art in supercomputing. Attention is also given to the DOE applied mathematical sciences research program, the NYU Ultracomputer project, the DARPA multiprocessor system architectures program, NSF research on multiprocessor systems, ONR activities in parallel computing, and NASA parallel processor projects.

Schneck, P. B.↗
NASA NTRS1985

Performance of direct and iterative algorithms on an optical systolic processor

The frequency-multiplexed optical linear algebra processor (OLAP) is treated in detail with attention to its performance in the solution of systems of linear algebraic equations (LAEs). General guidelines suitable for most OLAPs, including digital-optical processors, are advanced concerning system and component error source models, guidelines for appropriate use of direct and iterative algorithms, the dominant error sources, and the effect of multiple simultaneous error sources. Specific results are advanced on the quantitative performance of both direct and iterative algorithms in the solution of systems of LAEs and in the solution of nonlinear matrix equations. Acoustic attenuation is found to dominate iterative algorithms and detector noise to dominate direct algorithms. The effect of multiple spatial errors is found to be additive. A theoretical expression for the amount of acoustic attenuation allowed is advanced and verified. Simulations and experimental data are included.

Ghosh, A. K.↗
NASA NTRS1985

Filter induced errors in laser anemometry using counter-processor

Simulations of laser Doppler anemometer (LDA) systems have focused primarily on noise studies or biasing errors. Another possible source of error is the choice of filter types and filter cutoff frequencies. Before it is applied to the counter portion of the signal processor, a Doppler burst is filtered to remove the pedestal and to reduce noise in the frequency bands outside the region in which the signal occurs. Filtering, however, introduces errors into the measurement of the frequency of the input signal which leads to inaccurate results. Errors caused by signal filtering in an LDA counter-processor data acquisition system are evaluated and filters for a specific application will reduce these errors are chosen.

Oberle, L. A.↗
NASA NTRS1986

Radar backscatter measurement accuracies using digital Doppler processors in spaceborne scatterometers

The normalized standard deviation, Kp, of radar backscatter measurements using digital Doppler processors in spaceborne scatterometers is derived. The Kp expression for analog Doppler filter processors, such as that used in the Seasat scatterometer is shown to be a special case of the derived Kp expression. A connection to Welch's (1967) power spectrum estimation rsults is also made. Tradeoff studies in digital filter design such as hardware complexity, computational speed, and system performance can be performed based on this Kp expression. A current application in the design of the NASA scatterometer to be flown in 1990 is discussed. This derivation should be useful for system design and analysis of other radar remote-sensing instruments.

Chi, C.-Y.↗
NASA NTRS1986

Frequency domain laser velocimeter signal processor

The features and performance parameters of the frequency domain laser velocimeter signal processor (FDSP) for examining flow phenomena are described. A candidate for replacing the standard signal processor, the FDSP can function receiving bursts of as few as 150 photons in an instantaneous mode or down to a photon resolved regime for an averaging mode. the FDSP has a nonlinear A/D converter and data storage shift registers (high speed recorder group), an elliptic digital filter bank, a controlling microprocessor and frequency and signal gain control circuits (low speed data processing group). The high speed group amplifies, digitizes, identifies and stores burst waveforms and the low speed group identifies the signal frequency within the burst after the signal passes through digital filters. The FDSP can operate in a near-autonomous mode using photon correlation techniques and requires no human intervention for calibration.

Meyers, J. F.↗
NASA NTRS1987

Solving Finite-Element Problems on a Concurrent Processor

By use of "conjugate gradients" technique, concurrent efficiency greater than 90 percent. Algorithm applies method of conjugate gradients to iterative solution of finite-element problems on concurrent processor. With algorithm, iteration rates nearly proportional to number of processors. For sufficiently large problems, fraction of proportional speedup achieved, called concurrent efficiency, exceeds 90 percent. Results indicate future application of this and related algorithms to large finite-element problems depend primarily upon applicability of iteratiave techniques, not upon issues of concurrency or efficiency.

Lyzenga, G. A.↗
NASA NTRS1987

Integrated Optical Processor

Images processed rapidly in rugged, compact device. Conceptual integrated optical image processor performs complicated analog calculations, including Fourier transforms, convolutions, correlations, and matrix multiplications. Compact and rugged on account of monolithic structure, processor faster than equivalent all-electronic devices because calculations require only time for light to travel across device; processing speed limited by electronic input and output circuits.

Stephens, William E.↗
NASA NTRS1986

RADARSAT high throughput SAR processor development

MacDonald Dettwiler & Associates has been involved with the Canadian Radarsat (RSAT) project for a number of years. This included Phase A definition studies and for the past two years, Phase B ground station design and processor prototyping efforts. The current baseline design for the SAR processing facility (SARDPF) is described along with its requirements and functional decomposition. This forms the context for then discussing the prototype SAR processor and extensions necessary to meet current ground station processing requirements.

George, P.↗