Search NASA⌕ Search

SEARCH · Search NASA

Results for “POWER ELECTRONICS”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 253 records · Page 14

GaN Core-shell Nanofin Vertical Transistor (CoNVerT): A New Direction for Power Electronics (Final Scientific/Technical Report)

A novel power transistor architecture, the GaN c ore-shell n anofin ver tical transistor (CoNVerT) to address fundamental challenges in realizing the ultimate limit of GaN power transistor performance was explored experimentally. This technology promises ultra-high-efficiency high voltage/high power applications (e.g. DC/DC converters, motor control, fast charging, actuation), as well as to operate in harsh environments. The device exploits a vertical superjunction structure based on an experimentally-validated core-shell nanofin growth process in which lateral p-n heterojunctions are formed in a single growth step, while still maintaining vertical current flow for compact die size and low cost. The concept leverages the best properties of GaN for mid-range voltage applications: high mobility, high breakdown voltage, and native heterojunction enhancement-mode operation. Due to the crystallographic nature of the nanofin growth by molecular beam epitaxy, the sidewall heterojunctions occur on non-polar planes, resulting in ultra-smooth interfaces for high mobility, no sidewall etch damage and related surface/interface states, and elimination of piezoelectric effects that can limit reliability in conventional structures. This also facilitates superjunction formation for maximum device performance, and the selective-area growth of the nanofin results in dislocation-free growth, even on low-cost Si (111) substrate. In this program, core-shell nanofins were grown by molecular beam epitaxy, test structures to evaluate the doping, resistivity, and other electrical properties were fabricated, and the material and test structures were characterized in detail. The work identified clear potential (e.g., the doping was well controlled as required for superjunction concepts), but also additional areas that require additional effort to resolve (some unexpected crystal defects were encountered that require additional engineering to overcome). Simulation studies of the proposed concept validate that the fundamental approach is very promising, but additional effort in experimental realization is needed.

42 ENGINEERING↗

A High-Voltage High-Reliability Scalable Architecture for Electric Vehicle Power Electronics (Final Report)

This project developed and demonstrated new composite converter technologies that lead to high power density (> 20 kW/L) at power levels of 10s of kW, 100s of kW, or possibly higher, with fundamental advances in converter efficiency and Q that lead to substantial increases in mean time to failure (MTTF). These advantages were realized through development of new composite converter topologies that perform buck, boost, or other conversion functions and that are scalable to higher voltage and power levels through sharing of voltage and current stresses among multiple dissimilar partial-power converter modules. The project led to experimental demonstration of a125 kW multifunction electric vehicle power conversion system having in-creased dc bus voltage (950 V nominal, 1200 V peak) that interfaces a 200 V to 400 V battery pack, and that includes integrated level 2 wired charging and wireless charging functions. The project incorporated SiC MOSFET modules having switching frequencies in excess of 100 kHz, planar magnetics, a hierarchical control architecture that enables scaling to higher voltages and powers with additional converter modules, and a high-power density in excess of 20 kW/L. The research demonstrated how a more complex converter approach can increase mean-time-to-failure, even though the number of elements is increased. This is achieved through significant reduction of temperature rise through fundamentally superior converter circuit topologies. The research also demonstrated new high power planar magnetics that increase power density. The technology is appropriate to a variety of applications including EV power trains, EV charging, PV inverters, battery storage, and similar areas. These systems potentially can be manufactured in the U.S.

33 ADVANCED PROPULSION SYSTEMS↗

HEMP Transformer Defense Through Power Electronics

High altitude electromagnetic pulse (HEMP) generated by exoatmospheric nuclear burst has the ability to affect the electric power grid. The main power grid components, cables and transformers, act as large antennas that have current induced in them from the HEMP. These currents are called geomagneticallyinduced currents (GIC), and they can occur during geomagnetic disturbances from HEMP or solar flares. HEMPs produce pulses with high electric field strengths that breakdown the dielectric of most electronics and, it is broken into three stages: E1 pulse with a microsecond width, E2 the falling trail of the pulse, and E3 a constant DC component. Oak Ridge National Laboratory has proven that transformers fitted with lightning arrestors do not receive damage from E1 and E2 pulses. However, the DC component of the E3 causes the transformer’s core to saturate and induce rapid heating that damages the transformer. SRNL is developing a power electronic system that is connected to the neutral of the high voltage side of large power transformers (LPT). This system will inject the inverse of the DC effect from the HEMP into the primary side of the transformer canceling out the E3 waveform and protecting the transformer from half-cycle-saturation. This year SRNL successfully simulated removing the DC injected and accurately simulated saturation on the transformer.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Power Electronic Substrates for Space Restricted Application

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. In this study, four substrate technologies were evaluated for space-restricted applications: direct-bonded copper, an insulated metal substrate, a thermally annealed pyrolytic graphite–based insulated metal substrate, and direct-bonded aluminum, where the heat sink is directly attached without thermal interface materials. The finite element results suggest that the popular direct-bonded copper substrate has better thermal performance than the rest of the substrates for space-restricted applications. Furthermore, a modified direct-bonded copper is proposed to further improve thermal performance. The evaluation results show that the modified substrate can handle 30% more losses than its traditional counterpart.

Chowdhury, Shajjad↗

Method for reworkable packaging of high speed, low electrical parasitic power electronics modules through gate drive integration

A multichip power module directly connecting the busboard to a printed-circuit board that is attached to the power substrate enabling extremely low loop inductance for extreme environments such as high temperature operation. Wire bond interconnections are taught from the power die directly to the busboard further enabling enable low parasitic interconnections. Integration of on-board high frequency bus capacitors provide extremely low loop inductance. An extreme environment gate driver board allows close physical proximity of gate driver and power stage to reduce overall volume and reduce impedance in the control circuit. Parallel spring-loaded pin gate driver PCB connections allows a reliable and reworkable power module to gate driver interconnections.

42 ENGINEERING↗

Cyber-Attack Detection for Photovoltaic Farms Based on Power-Electronics-Enabled Harmonic State Space Modeling

Here in this paper, a physics-data-based detection method is proposed to detect a variety of cyber-attacks in Photovoltaic (PV) farms using the power electronics-enabled harmonic state space (HSS) models, which, to our knowledge, is original. At the device level, HSS-based detection is developed to monitor harmonic vectors of individual PV converter with minimum sensor measurements, thus improving accuracy and robustness compared to Kalman Filter-based detection. At the system level that involves multiple PV converters, a clustering approach is developed to investigate attack propagation and accurately locate attack sources within a PV farm. The proposed approach is one of the first attempts to address PV security through interaction between the device and system, maximizing the accuracy and robustness at different levels. To verify the feasibility, a comprehensive attacks model is built, including single attack, coordinated attacks, and replay attacks. Besides, the impacts of irradiance changes are taken into consideration in the test scenarios. With the real-time data acquisition and hardware-in-the-loop testbed, comprehensive test results are provided to verify the feasibility of the proposed detection methodology.

42 ENGINEERING↗

Integrated three-dimensional module heat exchanger for power electronics cooling

Embodiments discussed herein are directed to a power semiconductor packaging that removes heat from a semiconductor package through one or more cooling zones that are located in a laterally oriented position with respect to the semiconductor package. Additional embodiments are directed to circuit elements that are constructed from one or more modular power semiconductor packages.

42 ENGINEERING↗

Regrowth and Selective Area Growth of GaN for Vertical Power Electronics

Gallium Nitride (GaN) has a great potential in high-power and high-frequency applications due to its wide energy gap and good transport property. So far all commercial GaN optoelectronic and electronic devices have planar junctions and heterostructures prepared by epitaxial growth. To take the advantage of the merits of GaN material properties, more sophisticated device configurations such as current-aperture vertical electron transistors (CAVETs), junction field-effect transistors (JFETs), and super-junction (SJ) devices require the ability to form in-plane, lateral junctions by selective area doping (SAD). In this project, we explored a novel approach of realizing SAD through selective-area etching (SAE) followed by selective-area growth (SAG).

36 MATERIALS SCIENCE↗

Noncured Graphene Thermal Interface Materials for High-Power Electronics: Minimizing the Thermal Contact Resistance

We report on experimental investigation of thermal contact resistance, RC, of the noncuring graphene thermal interface materials with the surfaces characterized by different degree of roughness, Sq. It is found that the thermal contact resistance depends on the graphene loading, ξ, non-monotonically, achieving its minimum at the loading fraction of ξ ~15 wt%. Decreasing the surface roughness by Sq~1 μm results in approximately the factor of ×2 decrease in the thermal contact resistance for this graphene loading. The obtained dependences of the thermal conductivity, KTIM, thermal contact resistance, RC, and the total thermal resistance of the thermal interface material layer on ξ and Sq can be utilized for optimization of the loading fraction of graphene for specific materials and roughness of the connecting surfaces. Our results are important for the thermal management of high-power-density electronics implemented with diamond and other wide-band-gap semiconductors.

36 MATERIALS SCIENCE↗

Regional Manufacturing Cost Structures and Supply Chain Considerations for SiC Power Electronics in Medium Voltage Motor Drives

With the growth in wide bandgap (WBG) semiconductors, specifically Silicon Carbide (SiC), the technology has matured enough to highlight a need to understand the drivers of manufacturing cost, regional manufacturing costs, and plant location decisions. Further, ongoing research and investment, necessitates analytical analysis to help inform development of wide bandgap technologies. The paper explores the anticipated device, module, and motor drive cost at volume manufacturing. It additional outlines the current regional contributors to the supply chain and proposes how the base models can be used to evaluate the cost reduction potential of proposed research advances.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

High-Temperature SiC Power Module with Integrated SiC Gate Drivers for Future High-Density Power Electronics Applications

This paper presents a high-temperature capable intelligent power module that contains SiC power devices and SiC gate driver integrated circuits (ICs). The high-temperature capability of the SiC gate driver ICs allows for them to be packaged into the power module and be located physically close to the power devices. This provides a distinct advantage by reducing the gate driver loop inductance, which promotes high frequency operation, while also reducing the overall volume of the system through higher levels of integration. The power module was tested in a bridgeless-boost converter (Fig. 1) to determine the performance of the module in a system level application. The converter was operated with a switching frequency of 200 kHz with a peak output power of approximately 5 kW. The peak efficiency was found to be 97.5% at 2.9 kW.

Whitaker, Mr. Bret↗

Ammonothermal Bulk GaN Substrates for Power Electronics

Soraa has developed a novel ammonothermal approach for growth of high quality, true bulk GaN crystals at a greatly reduced cost, known as SCoRA (Scalable Compact Rapid Ammonothermal). SCoRA GaN growth has been performed on seed crystals with diameters between 5 mm and 2" to thicknesses of 0.5-4 mm. The highest growth rates are greater than 40 um/h and rates in the 10-30 um/h range are routinely observed. Two-inch diameter, crack-free, free-standing, n-type bulk GaN crystals have been grown. The crystals have been characterized by a range of techniques, including x-ray diffraction rocking-curve (XRC) analysis, optical microscopy, cathodoluminescence (CL), optical spectroscopy, and capacitance-voltage measurements. The crystallinity of the grown crystals is very good, with FWHM values of 15-80 arc-sec and average dislocation densities below 5E5 cm -2 .

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Characterization and Failure Analysis of 650-V Enhancement-Mode GaN HEMT for Cryogenically Cooled Power Electronics

In order to evaluate the feasibility of newly developed gallium nitride (GaN) devices in a cryogenically cooled converter, this article characterizes a 650-V enhancement-mode GaN high-electron mobility transistor (GaN HEMT) at cryogenic temperatures. The characterization includes both static and dynamic behaviors. The results show that this GaN HEMT is an excellent device candidate to be applied in cryogenic-cooled applications. For example, transconductance at cryogenic temperature (93 K) is 2.5 times higher than one at room temperature (298 K), and accordingly, peak di / dt during turn-on transients at cryogenic temperature is around 2 times of that at room temperature. Moreover, the ON-resistance of the channel at the cryogenic temperature is only one-fifth of that at room temperature. The corresponding explanations of performance trends at cryogenic temperatures are also given from the view of semiconductor physics. In addition, several device failures were observed during the dynamic characterization of GaN HEMTs at cryogenic temperatures. Additionally, the ultrafast switching speed-induced high di / dt and dv / dt at cryogenic temperatures amplify the negative effects of parasitics inside the switching loop. Based on failure waveforms, two failure modes were classified, and detailed failure mechanisms caused by ultrafast switching speed are given in this article.

42 ENGINEERING↗

Thermal Performance of Triply Periodic Minimal Surface Lattice Structures in Single-Phase Dielectric Fluid Cooling of Power Electronics

Additive manufacturing has transformed thermal management by enabling the production of complex, optimized geometries that conventional manufacturing methods cannot achieve. This study investigates the single-phase convective heat transfer performance of gyroid triply periodic minimal surface (TPMS) lattice structures with functional porosity. TPMS structures provide high surface area to volume ratios and are amenable to 3D printing. A gyroid numerical model was created and validated against an existing experimental study with a similar feature size to the investigated geometries. The TPMS structure has a periodic width of 1.6 mm, a length of 10 mm, and a height of 4 mm, with a functional porosity ranging from 0.5 to 0.8, decreasing with distance from the heated surface. Three different flow configurations were examined for an inlet fluid temperature of 70 °C. The inlet velocities range from 0.01 to 1.2 m/s, corresponding to a Reynolds number range of 10–900 with a heat flux of 50 W/cm 2 applied at the base. AmpCool ® AC-110 dielectric fluid (Prandtl number 59.5) was used as the coolant. Thermal performance and friction characteristics were studied for the three flow orientations. The parallel flow configuration was identified as the most efficient for heat removal. A detailed analysis of the numerical results highlights the underlying physics behind the thermal performance differences among the flow configurations.

33 ADVANCED PROPULSION SYSTEMS↗