Reconfigurable Sensor Fusion Processing Hardware
The paper presents the concept and initial test from the hardware implementation of a low-power, high-speed reconfigurable sensor fusion processor.
Hardware implementation multisensor fusion data fu↗
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GPM Constellation Reconfiguration and Mission Status
The Global Precipitation Measurement (GPM) Mission is an international satellite mission that uses combined active and passive remote sensing techniques to improve global precipitation measurements derived from dedicated and operational passive microwave sensors. GPM is a science mission with integrated applications goals to (1) advance the knowledge of precipitation physics and the global water cycle variability, and (2) improve weather, climate, and hydrological prediction capabilities through more accurate and frequent measurements of global precipitation and innovative application methods. The GPM Mission is currently a partnership between NASA and the Japan Aerospace Exploration Agency (JAXA), with opportunities for additional domestic and international partners in satellite constellation buildup and ground validation activities. The GPM concept is centered on employing a dualfrequency precipitation radar and a microwave radiometer with high-frequency capabilities on a core satellite to serve as a physics observatory and calibration standard to provide a consistent framework for unifying precipitation measurements from a heterogeneous constellation of passive microwave sensors. Building on the siccess of TRMM, GPM extends combined radadradiometer precipitation measurements into the mid and high latitudes, with new science foci on improved capabilities for light-rain and snowfall measurements, as well as more accurate precipitation retrievals over land. With recent studies indicating that AMSU-B rainfall estimates are comparable in quality to those derived from conically-scanning radiometers over land, it is envisioned that cross-track microwave sounders with high-frequency channels on operational satellites such as the National Polar-orbiting Operational Environmental Satellite System (NPOESS), NPOESS Preparatory Project (NPP), NOAA-N', and MetOp satellites can play a significant role in augmenting conically-scanning microwave radiometers to achieve better sampling and coverage over land. Plans to reconfigure the baseline GPM constellation to include cross-track microwave sounders over land and the status of other GPM mission elements such as snowfall algorithm development and ground validation plans will be presented
Hou, Arthur Y.↗
Optically intraconnected computer employing dynamically reconfigurable holographic optical element
An optically intraconnected computer and a reconfigurable holographic optical element employed therein. The basic computer comprises a memory for holding a sequence of instructions to be executed; logic for accessing the instructions in sequence; logic for determining for each the instruction the function to be performed and the effective address thereof; a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing the instructions; and, element selection logic connected to the logic determining the function to be performed for each the instruction for determining the class of each function and for causing the instruction to be executed by those the elements which perform those associated the logical sequences affecting the instruction execution in an optimum manner. In the optically intraconnected version, the element selection logic is adapted for transmitting and switching signals to the elements optically.
Bergman, Larry A.↗
Reconfigurable data path processor
A reconfigurable data path processor comprises a plurality of independent processing elements. Each of the processing elements advantageously comprising an identical architecture. Each processing element comprises a plurality of data processing means for generating a potential output. Each processor is also capable of through-putting an input as a potential output with little or no processing. Each processing element comprises a conditional multiplexer having a first conditional multiplexer input, a second conditional multiplexer input and a conditional multiplexer output. A first potential output value is transmitted to the first conditional multiplexer input, and a second potential output value is transmitted to the second conditional multiplexer output. The conditional multiplexer couples either the first conditional multiplexer input or the second conditional multiplexer input to the conditional multiplexer output, according to an output control command. The output control command is generated by processing a set of arithmetic status-bits through a logical mask. The conditional multiplexer output is coupled to a first processing element output. A first set of arithmetic bits are generated according to the processing of the first processable value. A second set of arithmetic bits may be generated from a second processing operation. The selection of the arithmetic status-bits is performed by an arithmetic-status bit multiplexer selects the desired set of arithmetic status bits from among the first and second set of arithmetic status bits. The conditional multiplexer evaluates the select arithmetic status bits according to logical mask defining an algorithm for evaluating the arithmetic status bits.
Donohoe, Gregory↗
Two-Stage Path Planning Approach for Designing Multiple Spacecraft Reconfiguration Maneuvers
The paper presents a two-stage approach for designing optimal reconfiguration maneuvers for multiple spacecraft. These maneuvers involve well-coordinated and highly-coupled motions of the entire fleet of spacecraft while satisfying an arbitrary number of constraints. This problem is particularly difficult because of the nonlinearity of the attitude dynamics, the non-convexity of some of the constraints, and the coupling between the positions and attitudes of all spacecraft. As a result, the trajectory design must be solved as a single 6N DOF problem instead of N separate 6 DOF problems. The first stage of the solution approach quickly provides a feasible initial solution by solving a simplified version without differential constraints using a bi-directional Rapidly-exploring Random Tree (RRT) planner. A transition algorithm then augments this guess with feasible dynamics that are propagated from the beginning to the end of the trajectory. The resulting output is a feasible initial guess to the complete optimal control problem that is discretized in the second stage using a Gauss pseudospectral method (GPM) and solved using an off-the-shelf nonlinear solver. This paper also places emphasis on the importance of the initialization step in pseudospectral methods in order to decrease their computation times and enable the solution of a more complex class of problems. Several examples are presented and discussed.
Aoude, Georges S.↗
SELENE Translunar Trajectory Reconfiguration Plan Provided for the Case of Main Engine Anomaly
In this paper, the reconfiguration of translunar trajectory in case of main engine anomaly is investigated. The objectives of the trajectory design are to reduce the excessive velocity at the Lunar encounter as well as to reduce the total required Delta-v to complete the sequence. 3-impulse Hohmann transfer based trajectory is adopted and possible trajectories are categorized under 2-body approximation. The solutions obtained are applied to more sophisticated models (3-body approximation and 4-body) and yields feasible trajectory.
Kawakatsu, Yasuhiro↗
Reconfigurable Computing Concepts for Space Missions: Universal Modular Spares
Computing hardware for control, data collection, and other purposes will prove many times over crucial resources in NASA's upcoming space missions. Ability to provide these resources within mission payload requirements, with the hardiness to operate for extended periods under potentially harsh conditions in off-World environments, is daunting enough without considering the possibility of doing so with conventional electronics. This paper examines some ideas and options, and proposes some initial approaches, for logical design of reconfigurable computing resources offering true modularity, universal compatibility, and unprecedented flexibility to service all forms and needs of mission infrastructure.
Patrick, M. Clinton↗
Reconfigurable Optical Spectra from Perturbations on Elliptical Whispering Gallery Resonances
Elastic strain, electrical bias, and localized geometric deformations were applied to elliptical whispering-gallery-mode resonators fabricated with lithium niobate. The resultant perturbation of the mode spectrum is highly dependant on the modal indices, resulting in a discretely reconfigurable optical spectrum. Breaking of the spatial degeneracy of the whispering-gallery modes due to perturbation is also observed.
filters↗
High throughput reconfigurable data analysis system
The present invention relates to a system and method for performing rapid and programmable analysis of data. The present invention relates to a reconfigurable detector comprising at least one array of a plurality of pixels, where each of the plurality of pixels can be selected to receive and read-out an input. The pixel array is divided into at least one pixel group for conducting a common predefined analysis. Each of the pixels has a programmable circuitry programmed with a dynamically configurable user-defined function to modify the input. The present detector also comprises a summing circuit designed to sum the modified input.
Bearman, Greg↗
Reconfigurable Flight Control Design using a Robust Servo LQR and Radial Basis Function Neural Networks
This viewgraph presentation reviews the use of a Robust Servo Linear Quadratic Regulator (LQR) and a Radial Basis Function (RBF) Neural Network in reconfigurable flight control designs in adaptation to a aircraft part failure. The method uses a robust LQR servomechanism design with model Reference adaptive control, and RBF neural networks. During the failure the LQR servomechanism behaved well, and using the neural networks improved the tracking.
Burken, John J.↗
More About Reconfigurable Exploratory Robotic Vehicles
Modular exploratory robotic vehicles that will be able to reconfigure themselves in the field are undergoing development. Proposed for use in exploration of the surfaces of Mars and other remote planets, these vehicles and others of similar design could also be useful for exploring hostile terrain on Earth.
Howard, Ayanna↗
Reconfigurable, Bi-Directional Flexfet Level Shifter for Low-Power, Rad-Hard Integration
Two prototype Reconfigurable, Bi-directional Flexfet Level Shifters (ReBiLS) have been developed, where one version is a stand-alone component designed to interface between external low voltage and high voltage, and the other version is an embedded integrated circuit (IC) for interface between internal low-voltage logic and external high-voltage components. Targeting stand-alone and embedded circuits separately allows optimization for these distinct applications. Both ReBiLS designs use the commercially available 180-nm Flex fet Independently Double-Gated (IDG) SOI CMOS (silicon on insulator, complementary metal oxide semiconductor) technology. Embedded ReBiLS circuits were integrated with a Reed-Solomon (RS) encoder using CMOS Ultra-Low-Power Radiation Tolerant (CULPRiT) double-gated digital logic circuits. The scope of the project includes: creation of a new high-voltage process, development of ReBiLS circuit designs, and adjustment of the designs to maximize performance through simulation, layout, and manufacture of prototypes. The primary technical objectives were to develop a high-voltage, thick oxide option for the 180-nm Flexfet process, and to develop a stand-alone ReBiLS IC with two 8-channel I/O busses, 1.8 2.5 I/O on the low-voltage pins, 5.0-V-tolerant input and 3.3-V output I/O on the high-voltage pins, and 100-MHz minimum operation with 10-pF external loads. Another objective was to develop an embedded, rad-hard ReBiLS I/O cell with 0.5-V low-voltage operation for interface with core logic, 5.0-V-tolerant input and 3.3-V output I/O pins, and 100-MHz minimum operation with 10- pF external loads. A third objective was to develop a 0.5- V Reed-Solomon Encoder with embedded ReBilS I/O: Transfer the existing CULPRiT RS encoder from a 0.35-micron bulk-CMOS process to the ASI 180-nm Flexfet, rad-hard SOI Process. 0.5-V low-voltage core logic. 5.0-V-tolerant input and 3.3-V output I/O pins. 100-MHz minimum operation with 10- pF external loads. The stand-alone ReBiLS chip will allow system designers to provide efficient bi-directional communication between components operating at different voltages. Embedding the ReBiLS cells into the proven Reed-Solomon encoder will demonstrate the ability to support new product development in a commercially viable, rad-hard, scalable 180-nm SOI CMOS process.
DeGregorio, Kelly↗
Reconfigurable Fault Tolerance for FPGAs
The invention allows a field-programmable gate array (FPGA) or similar device to be efficiently reconfigured in whole or in part to provide higher capacity, non-redundant operation. The redundant device consists of functional units such as adders or multipliers, configuration memory for the functional units, a programmable routing method, configuration memory for the routing method, and various other features such as block RAM, I/O (random access memory, input/output) capability, dedicated carry logic, etc. The redundant device has three identical sets of functional units and routing resources and majority voters that correct errors. The configuration memory may or may not be redundant, depending on need. For example, SRAM-based FPGAs will need some type of radiation-tolerant configuration memory, or they will need triple-redundant configuration memory. Flash or anti-fuse devices will generally not need redundant configuration memory. Some means of loading and verifying the configuration memory is also required. These are all components of the pre-existing redundant FPGA. This innovation modifies the voter to accept a MODE input, which specifies whether ordinary voting is to occur, or if redundancy is to be split. Generally, additional routing resources will also be required to pass data between sections of the device created by splitting the redundancy. In redundancy mode, the voters produce an output corresponding to the two inputs that agree, in the usual fashion. In the split mode, the voters select just one input and convey this to the output, ignoring the other inputs. In a dual-redundant system (as opposed to triple-redundant), instead of a voter, there is some means to latch or gate a state update only when both inputs agree. In this case, the invention would require modification of the latch or gate so that it would operate normally in redundant mode, and would separately latch or gate the inputs in non-redundant mode.
Shuler, Robert, Jr.↗
Reconfigurable structure
A reconfigurable structure includes a plurality of selectively extensible and retractable limbs, at least one node pivotably receiving respective ends of at least two limbs, and an actuator associated with each limb for extending and retracting the limb. The structure may further include an addressable module associated with each actuator to control the actuator.
Curtis, Steven A.↗
Printed Antennas Made Reconfigurable by Use of MEMS Switches
A class of reconfigurable microwave antennas now undergoing development comprise fairly conventional printed-circuit feed elements and radiating patches integrated with novel switches containing actuators of the microelectromechanical systems (MEMS) type. In comparison with solid-state electronic control devices incorporated into some prior printed microwave antennas, the MEMS-based switches in these antennas impose lower insertion losses and consume less power. Because the radio-frequency responses of the MEMS switches are more nearly linear, they introduce less signal distortion. In addition, construction and operation are simplified because only a single DC bias line is needed to control each MEMS actuator.
Simons, Rainee N.↗
Flexible, reconfigurable, power efficient transmitter and method
A flexible, reconfigurable, power efficient transmitter device and method is provided. In one embodiment, the method includes receiving outbound data and determining a mode of operation. When operating in a first mode the method may include modulation mapping the outbound data according a modulation scheme to provide first modulation mapped digital data, converting the first modulation mapped digital data to an analog signal that comprises an intermediate frequency (IF) analog signal, upconverting the IF analog signal to produce a first modulated radio frequency (RF) signal based on a local oscillator signal, amplifying the first RF modulated signal to produce a first RF output signal, and outputting the first RF output signal via an isolator. In a second mode of operation method may include modulation mapping the outbound data according a modulation scheme to provide second modulation mapped digital data, converting the second modulation mapped digital data to a first digital baseband signal, conditioning the first digital baseband signal to provide a first analog baseband signal, modulating one or more carriers with the first analog baseband signal to produce a second modulated RF signal based on a local oscillator signal, amplifying the second RF modulated signal to produce a second RF output signal, and outputting the second RF output signal via the isolator. The digital baseband signal may comprise an in-phase (I) digital baseband signal and a quadrature (Q) baseband signal.
Bishop, James W.↗
Reconfigurable Microwave Phase Delay Element for Frequency Reference and Phase-Shifter Applications
A technique was developed to provide a reconfigurable high-precision micro - wave electrical phase delay for resonators and phase shifters. The invention employs multiple branches of transmission lines with open-ended or ground-ended terminations as configurable bits or digits. This technique minimizes the errors due to limited precision of switching devices. In addition, the proposed linear analytical approach significantly produces a much simpler design than that of other prior inventions at the time of this reporting. Microwave components such as filters, phase delay elements, or resonators require a method that can accurately adjust their frequency responses. Most tuning techniques offer very wide frequency tuning range; however, it is often difficult and expensive to tune their response in a very narrow operating frequency, especially when the tuning element reaches its minimum discrete step due to fabrication tolerances. The problem becomes worse as the operating frequency is in mm-wave frequency range (>26 GHz). The electrical tuning sensitivity of a microwave line is dependent on the position of the tuning element with respect to the reference termination. By placing this tuning element away from this reference with the main transmission line connecting the two elements together the sensitivity of the tuning element can change significantly. This concept can be used in the system that requires multiple tuning sensitivities. In this case, multiple tuning branches are superimposed in the main transmission line. The proposed invention allows the transmission-line electrical length to be accurately programmed using switching elements that have limited accuracy. The invention consists of multiple branches of transmission lines connected to discrete switching devices with open-ended terminations. They are used as discrete tuning elements. These elements are connected to the main microwave transmission line and are separated by a well-defined electrical degree spacing. Each branch is programmed to have different electrical degree sensitivity, such as a combination of discrete steps in each branch, which results in a reflective line with a unique effective phase response. To reduce the number of switching devices, it is desirable to program the devices in binary configuration where each branch represents one bit in the base-2 number system. This invention allows the transmission line electrical length to be tuned precisely with customizable sensitivity based on the known sensitivity of the base tuning circuit. The tuning resolution is dependent on the distance among tuning branches.
Hsieh, Wen-Ting↗
Dynamically Reconfigurable Systolic Array Accelerator
A polymorphic systolic array framework has been developed that works in conjunction with an embedded microprocessor on a field-programmable gate array (FPGA), which allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and a hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms, and is extendable to more complex applications in the area of aerospace embedded systems. FPGA chips can be responsive to realtime demands for changing applications needs, but only if the electronic fabric can respond fast enough. This systolic array framework allows for rapid partial and dynamic reconfiguration of the chip in response to the real-time needs of scalability, and adaptability of executables.
Dasu, Aravind↗