Variable digital processor including a register for shifting and rotating bits in either direction Patent
Data processor with plural register stages for selectively interconnecting with each other to effect multiplicity of operations
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Data processor with plural register stages for selectively interconnecting with each other to effect multiplicity of operations
Computer program is developed to interpret spectral data in order to assist chemist in identifying low resolution mass spectra. Two versions of program, using approximately same amount of core are available. In both programs, core requirements are roughly proportional to maximum number of unknowns to be handled on each pass through tape.
The partially populated oligatomic mass memory feasibility model is described and evaluated. A system was desired to verify the feasibility of the oligatomic (mirror) memory approach as applicable to large scale solid state mass memories.
An operation manual is presented for the oligatomic mass memory feasibility model. It includes a brief description of the memory and exerciser units, a description of the controls and their functions, the operating procedures, the test points and adjustments, and the circuit diagram.
Tape recorders employed to record and eventually reproduce digital data introduce errors into the data. It is desirable to understand the sources of these errors so that predictions may be made of the resultant error rate. While specific predictions are difficult to apply to whole classes of machines and their respective electronic systems, it is possible to make general predictions which give insight into the problems and processes involved. A heuristic viewpoint is developed for understanding the problems involved in machines and systems that now exist.
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The HDDR-II mass data storage system consists of a Leach MTR 7114 recorder reproducer, a wire wrapped, integrated circuit flat plane and necessary power supplies for the flat plane. These units, with interconnecting cables and control panel are enclosed in a common housing mounted on casters. The electronics used in the HDDR-II double density decoding and encoding techniques are described.
Synchronizer is not affected by severe noise environments. Device uses both analog and digital techniques in its tracking loop. It accommodates any one of three signal formats. Rapid acquisition sequences are used to minimize acquisition time.
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Statistical model, which consists of on/off binary system, assumes Poisson detection process and log-normal atmospheric scintillation. Based upon detection process and atmospheric ionization, piecewise linear model for adaptive threshold system is developed.
A hardware simulation which emulates an automatically acquiring transmit receive spread spectrum communication and tracking system and developed for use in future NASA programs involving digital communications is considered. The system architecture and tradeoff analysis that led to the selection of the system to be simulated is presented.
The acquisition behavior of the PN subsystem of an automatically acquiring spacecraft receiver was studied. A symbol synchronizer subsystem was constructed and integrated into the composite simulation of the receiver. The overall performance of the receiver when subjected to anomalies such as signal fades was evaluated. Potential problems associated with PN/carrier sweep interactions were investigated.
A detailed description of the design approach and tradeoffs encountered during the development of the 50 MBPS decoder system is presented. A functional analysis of each of the major logical functions is given, and the system's major components are listed.
Circuit measures phase error that exists in phase-locked loop between clock signal recorded in data on magnetic tape and reconstructed clock signal. Circuit presents error as digital word that can be compared with predetermined threshold to indicate lock status. With simple alterations, circuit can also be used as phase detector.
Procedure detects and corrects errors in data held for long term storage on magnetic tape.
Tests performed to determine accuracy and efficiency of bus separators used in microprocessors are presented. Functional, AC parametric, and DC parametric tests were performed in a Tektronix S-3260 automated test system. All the devices passed the functional tests and yielded nominal values in the parametric test.
Electrical characterization tests were performed on two different manufactured types of integrated circuits. The devices were subjected to functional and AC and DC parametric tests at ambient temperatures of -55 C, -20 C, 25 C, 85 C, and 125 C. The data were analyzed and tabulated to show the effect of operating conditions on performance and to indicate parameter deviations among devices in each group. Accuracy was given precedence over test time efficiency where practical, and tests were designed to measure worst case performance.
The significance of the various number of radiometric quantizing levels required for satellite monitoring of vegetation resources was evaluated by using in situ collected spectral reflectance data, an atmospheric radiative transfer simulation model, and a satellite sensor simulation model. Reflectance data were converted to radiance data; passed through a model atmosphere to an altitude of 706 km; and subsequently quantized at 16, 32, 64, 128, 256, and 512 digital count levels for Thematic Mapper bands TM3(0.63 - 0.69 microns) and TM4(0.76 - 0.90 microns). The simulated digital count data were regressed against the in situ biological data to quantify the relationship between quantizing levels.