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At least 253 records · Page 14

Global Positioning System Synchronized Active Light Autonomous Docking System

A Global Positioning System Synchronized Active Light Autonomous Docking System (GPSSALADS) for automatically docking a chase vehicle with a target vehicle comprises at least one active light emitting target which is operatively attached to the target vehicle. The target includes a three-dimensional array of concomitantly flashing lights which flash at a controlled common frequency. The GPSSALADS further comprises a visual tracking sensor operatively attached to the chase vehicle for detecting and tracking the target vehicle. Its performance is synchronized with the flash frequency of the lights by a synchronization means which is comprised of first and second internal clocks operatively connected to the active light target and visual tracking sensor, respectively, for providing timing control signals thereto, respectively. The synchronization means further includes first and second Global Positioning System receivers operatively connected to the first and second internal clocks, respectively, for repeatedly providing simultaneous synchronization pulses to the internal clocks, respectively. In addition, the GPSSALADS includes a docking process controller means which is operatively attached to the chase vehicle and is responsive to the visual tracking sensor for producing commands for the guidance and propulsion system of the chase vehicle.

Howard, Richard↗

Global Positioning System Synchronized Active Light Autonomous Docking System

A Global Positioning System Synchronized Active Light Autonomous Docking System (GPSSALADS) for automatically docking a chase vehicle with a target vehicle comprising at least one active light emitting target which is operatively attached to the target vehicle. The target includes a three-dimensional array of concomitantly flashing lights which flash at a controlled common frequency. The GPSSALADS further comprises a visual tracking sensor operatively attached to the chase vehicle for detecting and tracking the target vehicle. Its performance is synchronized with the flash frequency of the lights by a synchronization means which is comprised of first and second internal clocks operatively connected to the active light target and visual tracking sensor, respectively, for providing timing control signals thereto, respectively. The synchronization means further includes first and second Global Positioning System receivers operatively connected to the first and second internal clocks, respectively, for repeatedly providing simultaneous synchronization pulses to the internal clocks, respectively. In addition, the GPSSALADS includes a docking process controller means which is operatively attached to the chase vehicle and is responsive to the visual tracking sensor for producing commands for the guidance and propulsion system of the chase vehicle.

Howard, Richard T.↗

Optical Time Transfer for Bistatic SAR Spacecraft

A spacecraft-to-spacecraft optical time-transfer simulation has been developed as a tool for informing NASA’s Surface Deformation and Change (SDC) mission architecture. The SDC mission will combine radar images from multiple spacecraft to improve understanding of the Earth’s sea-level and landscape changes. Spacecraft must be precisely synchronized in order to create sharp radar images. Simulation of multiple spacecraft time-synchronizing via laser communication can inform technology choices of a mission by providing a picosecond-precision level estimate of clock error. This timing and ranging simulation has been combined with a radar system performance analysis pipeline. The simulated timing errors are used to predict performance of bistatic SAR systems in the presence of oscillator noise and time synchronization in accuracy. This analysis includes both analytic approximation equations from existing literature, and a numerical radar simulation to extract key system performance parameters like phase error and signal-to-noise ratio (SNR)degradation. Precision time-transfer techniques facilitate the accurate synchronization of clocks between any combination of terminals. Most time-transfer technology for comparing two clocks at different terminals use radio frequencies (RF) to measure the time delay between the sending and receiving of signals. Laser technology offers the capability to transmit high data rates with systems that are of smaller size and lower power than comparable RF systems. The clocks on independent spacecraft will have some phase and frequency errors between them that result in clock drift. The two clock models that are included in this bi-directional MATLAB simulation are a cesium-based Chip-Scale Atomic Clock (CSAC) and a rubidium-based Miniature Atomic Clock (MAC). The CSAC has flown as hardware for small satellite missions such as the University of Florida’s CHOMPTT mission. A study of example orbits, including that of NASA NASA-ISRO Synthetic Aperture Radar Mission (NISAR) mission, and lasing rates demonstrate the impact of flight configuration parameters on the synchronization error between two spacecraft. The MATLAB timing simulation uses a Runge-Kutta 4th-order method to propagate spacecraft orbits and computes the light-travel time estimate between them. The simulation outputs the estimated range and estimated clock error based on a user-defined spacecraft cluster configuration. The radar simulation and analytic approximations are applied to evaluate a potential future NASA bistatic SAR constellation architecture. In the proposed architecture, satellites follow each other in the same orbit at 800 km altitude, with a 210 km baseline. We also baseline the CSAC as an ultra stable oscillator, and use NASA’s NISAR for baseline radar system parameters to compute a clock-system introduced phase error of 5.6 degrees without synchronization by frequent time transfer. We build on this base case with a sensitivity analysis of radar performance over a proposed range of constellation and radar system parameters. With this analysis pipeline, we comment on which radar parameters should or should not be changed to minimize synchronization requirements. This analysis technique could be extended or modified to evaluate the timing requirements of other geometries for other future multistatic SAR missions, or other interferometric satellite missions.

Surface Deformation and Change↗

The Cable and Wireless approach to network synchronization

The philosophy adopted by Cable and Wireless for the synchronization of its world-wide network is presented. The architectures of some clock systems already deployed and how network synchronization had been implemented at selected locations are discussed. This includes some innovative designs as the network spans both first and third world countries with a combination of North Amercan and European hierarchy equipment. Different parts of the global network are linked together by a combination of terrestrial microwave, submarine cable and satellite technology. The impact of synchronization on Intelsat Intermediate Data Rate (IDR) operation and the restoration of submarine cable systems are addressed.

Calvert, Robert D.↗

Laser Communications Relay Demonstration Optimetrics Experiment

Within this paper, we report on an Optimetrics experiment conducted on the National Aeronautics and Space Administration (NASA) Laser Communication Relay Demonstration (LCRD). The high precision two-way ranging is conducted on the optical communications link between the LCRD space terminal in a geosynchronous orbit and the Optical Ground Station 1 (OGS1) at Table Mountain, California, and is referred to as optimetrics ranging. The receiver to transmitter clock loopback is implemented in the LCRD space modem. A digital dual mixer time difference phase meter (DDMTD) is implemented in the OGS1 ground modem. The round-trip time is measured with the DDMTD by counting the frame and data clock ticks between transmitter and receiver frame synchronization markers for coarse range, and the relative phase of the transmit and receive clock for high precision range. This approach provides coverage for all potential ranges with no ranging ambiguity. The flight modem FPGA code was modified for frame and data clock loopback and the OGS1 FPGA code was modified for the DDMTD phase meter implementation. The experiment team conducted a 36-hour continuous ranging measurement. Preliminary two-way optimetrics ranging data show a noise floor of 3cm (rms). Based on our theoretical noise analysis and ground tests with spare flight modems, we expected one order of magnitude improvement on ranging precision. We are conducting detailed post data processing to identify the differences to further reduce the noise level and formulating an improved implementation approach for future missions. For reference and comparison, traditional Radio Frequency (RF) ranging between LCRD and OGS1 was conducted at the same time and indicates a ranging noise floor of 30cm(rms). Other telemetry and relevant environmental parameters such as weather and atmosphere temperature were also collected for offline data processing. The high precision ranging and range rate measurements from the laser communications data link clock and clock phase are performed simultaneously with continuous optical communication. No extra hardware added to existing system. This high precision optimetrics measurement implementation provides alternative ranging and range rate measurements for orbit determination (OD) and flight dynamics calculations with higher precision. We see significant improvement on OD for navigation upon implementation in future optical communication systems.

Rafael Garcia↗

Synchronous transfer circuits for redundant systems

Circuit arrangements for flip-flops, counters, and clock drivers in redundant systems ensure that control is synchronously transferred to surviving components when failure occurs. In addition to original application to spacecraft systems, redundant circuits have terrestrial uses in power generators, solar-energy converters, computers, vehicle controllers, and other systems demanding high reliability.

Nagano, S.↗

TimeSet: A computer program that accesses five atomic time services on two continents

TimeSet is a shareware program for accessing digital time services by telephone. At its initial release, it was capable of capturing time signals only from the U.S. Naval Observatory to set a computer's clock. Later the ability to synchronize with the National Institute of Standards and Technology was added. Now, in Version 7.10, TimeSet is able to access three additional telephone time services in Europe - in Sweden, Austria, and Italy - making a total of five official services addressable by the program. A companion program, TimeGen, allows yet another source of telephone time data strings for callers equipped with TimeSet version 7.10. TimeGen synthesizes UTC time data strings in the Naval Observatory's format from an accurately set and maintained DOS computer clock, and transmits them to callers. This allows an unlimited number of 'freelance' time generating stations to be created. Timesetting from TimeGen is made feasible by the advent of Becker's RighTime, a shareware program that learns the drift characteristics of a computer's clock and continuously applies a correction to keep it accurate, and also brings .01 second resolution to the DOS clock. With clock regulation by RighTime and periodic update calls by the TimeGen station to an official time source via TimeSet, TimeGen offers the same degree of accuracy within the resolution of the computer clock as any official atomic time source.

Petrakis, P. L.↗

Self-Stabilizing Distributed Symmetric-Fault Tolerant Synchronization Protocol

A network system includes at least one node configured to exchange messages through a set of communication links. Each node includes a synchronizer, a set of monitors in communication with the synchronizer, a physical oscillator and a state timer clock and a local timer clock, each clock being driven by the physical oscillator and having a variable clock value that locally tracks passage of clock time for the node. The network system is configured to execute a synchronization process when a specified condition occurs. Upon receiving a Sync message, each of the nodes is configured to store an incoming Sync message, increment a local timer clock value, or ignore the Sync message based on a local timer clock value associated with an incoming Sync message.

Malekpour, Mahyar R.↗

Laser Doppler velocimeter multiplexer interface for simultaneous measured events

An Laser Doppler Velocimeter multiplexer interface (20) includes an event pulse synchronizer (162), which synchronizes data pulses from events A, B and C. Clock control (164) is connected to receive timing information on the data pushes from the synchronizer (162). Displays (24, 26, 28) are connected to receive clock signals from the clock control (164) for indicating a data rate for each of the measured events A, B and C. Display (3) is connected to receive clock signals form the clock control (164) to indicate a coincidence rate between data pulses for any selected combination of the measured events A, B and C. A multiplexer (156) receives the data pulses from the events A, B and C and rate data from the clock control (164). Multiplexer (156) has output (180) for supplying the data pulses and rate data to a single input of a data processing system. A multiplexer control (158) is connected to supply control signals to the multiplexer (156) for selecting the event data pulses and the rate data for output from the multiplexer (156). Multiplexer control (158) receives start signals from the pulse synchronizer (162) and user selected inputs for desired outputs from the multiplexer (156).

Dean R Harrison↗

Electronic phase-locked-loop speed control system is stable

Phase locked-loop circuit is used for playback motors in digital tape recorders where the reproducer output remains in exact synchronism with an external reference clock over extended periods. It removes the motor dynamics from the control loop so that the loop is stable without damping.

Stone, F. A.↗

Redundant operation of counter modules

A technique for the redundant operation of counter modules is described. Redundant operation is maintained by detecting the zero state of each counter and clearing the other to that state, thus periodically resynchronizing the counters, and obtaining an output from both counters through AC coupled diode-OR gates. Redundant operation of counter flip flops is maintained in a similar manner, and synchronous operation of redundant squarewave clock generators of the feedback type is effected by connecting together the feedback inputs of the squarewave generators through a coupling resistor, and obtaining an output from both generators through AC coupled diode-OR gates.

Nagano, S.↗

Highly parallel computer architecture for robotic computation

In a computer having a large number of single instruction multiple data (SIMD) processors, each of the SIMD processors has two sets of three individual processor elements controlled by a master control unit and interconnected among a plurality of register file units where data is stored. The register files input and output data in synchronism with a minor cycle clock under control of two slave control units controlling the register file units connected to respective ones of the two sets of processor elements. Depending upon which ones of the register file units are enabled to store or transmit data during a particular minor clock cycle, the processor elements within an SIMD processor are connected in rings or in pipeline arrays, and may exchange data with the internal bus or with neighboring SIMD processors through interface units controlled by respective ones of the two slave control units.

Fijany, Amir↗

Personal communications via ACTS satellite HBR transponders

The concept of a fully meshed network of briefcase-sized terminals is presented for personal communications over Ka-band satellite transponders. In this concept, undesirable double-hop delays are avoided for voice communications. The bandwidth and power resources of the transponder are efficiently shared by users in a simple demand-assigned manner via code-division multiple access (CDMA). Voice, data, and facsimile are statistically multiplexed at each terminal. In order to minimize terminal costs, frequency-precorrected, and level-preadjusted continuous-wave tones are sent from the central network control station in each beam so that the terminals in each down-link beam can use these pilots as references for antenna acquisition and tracking, as reliable frequency sources, and as indicators of signal fade for up-link power control (ULPC). The potential CDMA 'near-far' problem due to up-link fades is mitigated by using ULPC. Quasi-burst mode transmission is employed to minimize the potential clock and pseudorandom number code synchronization.

Fang, Russell J. F.↗

A gallium-arsenide digital phase shifter for clock and control signal distribution in high-speed digital systems

The design, implementation, testing, and applications of a gallium-arsenide digital phase shifter and fan-out buffer are described. The integrated circuit provides a method for adjusting the phase of high-speed clock and control signals in digital systems, without the need for pruning cables, multiplexing between cables of different lengths, delay lines, or similar techniques. The phase of signals distributed with the described chip can be dynamically adjusted in eight different steps of approximately 60 ps per step. The IC also serves as a fan-out buffer and provides 12 in-phase outputs. The chip is useful for distributing high-speed clock and control signals in synchronous digital systems, especially if components are distributed over a large physical area or if there is a large number of components.

Fouts, Douglas J.↗

Asynchronous timing and Doppler recovery in DSP based DPSK modems for fixed and mobile satellite applications

While conventional analog modems employ some kind of clock wave regenerator circuit for synchronous timing recovery, in sampled modem receivers the timing is recovered asynchronously to the incoming data stream, with no adjustment being made to the input sampling rate. All timing corrections are accomplished by digital operations on the sampled data stream, and timing recovery is asynchronous with the uncontrolled, input A/D system. A good timing error measurement algorithm is a zero crossing tracker proposed by Gardner. Digital, speech rate (2400 - 4800 bps) M-PSK modem receivers employing Gardner's zero crossing tracker were implemented and tested and found to achieve BER performance very close to theoretical values on the AWGN channel. Nyguist pulse shaped modem systems with excess bandwidth factors ranging from 100 to 60 percent were considered. We can show that for any symmetric M-PSK signal set Gardner's NDA algorithm is free of pattern jitter for any carrier phase offset for rectangular pulses and for Nyquist pulses having 100 percent excess bandwidth. Also, the Nyquist pulse shaped system is studied on the mobile satellite channel, where Doppler shifts and multipath fading degrade the pi/4-DQPSK signal. Two simple modifications to Gardner's zero crossing tracker enable it to remain useful in the presence of multipath fading.

Koblents, B.↗

Highly parallel reconfigurable computer architecture for robotic computation having plural processor cells each having right and left ensembles of plural processors

In a computer having a large number of single-instruction multiple data (SIMD) processors, each of the SIMD processors has two sets of three individual processor elements controlled by a master control unit and interconnected among a plurality of register file units where data is stored. The register files input and output data in synchronism with a minor cycle clock under control of two slave control units controlling the register file units connected to respective ones of the two sets of processor elements. Depending upon which ones of the register file units are enabled to store or transmit data during a particular minor clock cycle, the processor elements within an SIMD processor are connected in rings or in pipeline arrays, and may exchange data with the internal bus or with neighboring SIMD processors through interface units controlled by respective ones of the two slave control units.

Fijany, Amir↗

Inter-Symbol Guard Time for Synchronizing Optical PPM

An inter-symbol guard time has been proposed as a means of synchronizing the symbol and slot clocks of an optical pulse-position modulation (PPM) receiver with the symbol and slot periods of an incoming optical PPM signal.The proposal is applicable to the low-flux case in which the receiver photodetector operates in a photon-counting mode and the count can include contributions from incidental light sources and dark current.

Far, William↗

International Space Station Future Correlation Analysis Improvements

Ongoing modal analyses and model correlation are performed on different configurations of the International Space Station (ISS). These analyses utilize on-orbit dynamic measurements collected using four main ISS instrumentation systems: External Wireless Instrumentation System (EWIS), Internal Wireless Instrumentation System (IWIS), Space Acceleration Measurement System (SAMS), and Structural Dynamic Measurement System (SDMS). Remote Sensor Units (RSUs) are network relay stations that acquire flight data from sensors. Measured data is stored in the Remote Sensor Unit (RSU) until it receives a command to download data via RF to the Network Control Unit (NCU). Since each RSU has its own clock, it is necessary to synchronize measurements before analysis. Imprecise synchronization impacts analysis results. A study was performed to evaluate three different synchronization techniques: (i) measurements visually aligned to analytical time-response data using model comparison, (ii) Frequency Domain Decomposition (FDD), and (iii) lag from cross-correlation to align measurements. This paper presents the results of this study.

time synchronization↗