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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 253 records · Page 14

Performance of Two Battery Prognostic Applications used by Two Octocopters for Safe Low Altitude Autonomous Flight Operations

This paper addresses the problem of building trust in online predictions of the remaining available flying time for two different electric Unmanned Aerial Vehicles (eUAVs) powered by lithium-ion-polymer batteries. Flight tests for various automation research missions for the two vehicles were monitored using two on-board battery health management applications to make predictions of the remaining flying time (RFT) for each eUAV and to predict the state of the battery. Playback of the voltage, current and temperature profiles of the battery discharge were used to assess the accuracy of the estimation of the voltage and the charge states of the models as well as the estimate of the RFT. The reference ground truth values were the observed landing time and the measured battery pack resting pack voltage 20 minutes after the flight. The predicted RFT, state of charge (SoC), and state of energy (SoE) were compared with the observed results. Noise values of one standard deviation from the mean values of the internal charge states of the battery model during a reference run were used to vary the states during simulation. One application used an equivalent circuit model of the electrical dynamics of the battery pack, and the other application used a reduced-order electrochemistry model. The variation of the model state components was compared to the variation in the estimate of the RFT and the variation in the SoE to estimate a confidence factor. Variation in the estimates caused by factors affecting the off-line laboratory parameter identification experiments is considered. Variation in the estimates due to environmental factors are discussed.

Assurance↗

Comparison and Application of Battery Modeling Methods for Conceptual Electric Aircraft

Growing interest in design and optimization of electrified aircraft propulsion concepts prompts the need for accurate, flexible, and efficient methods to model battery systems. Presented in this paper are three battery modeling methods that have been used at NASA’s Glenn Research Center, each representing different mathematical or electrical approaches. Thévenin equivalent circuit, normalization, and curve-fitting methods are compared against battery cell test data for the X-57 Maxwell electric aircraft technology demonstrator. The methods are then applied in a simple multidisciplinary optimization context using NASA’s Six-Passenger Electric Quadrotor concept to determine their applicability and performance. The normalization method achieves the highest accuracy for steady and unsteady discharge rates with a voltage mean error percentage of 0.423% and 1.186%, respectively. Optimal quadrotor mission range between the models varies up to 0.5 nmi, identifying current battery modeling methods as a potentially significant contributor to mission analysis error. A set of relevant tools and techniques for conceptual battery modeling are identified in this paper, with conclusions made on the utility of each modeling approach for various design challenges.

power↗

Operating Stresses and Their Effects on Degradation of LSM-Based SOFC Cathodes

The performance of solid oxides fuel cells (SOFCs) with four different Mn excess of lanthanum strontium manganite (LSM) -based cathodes were examined under different temperatures (1,000 °C, 900 °C), current densities (0, 380, and 760 mA cm -2 ), and cathode atmospheres (p O 2 )=0.1,0.15,0.21) for durations ranging from 58 to 1,008 h. Each yttria-stabilized zirconia (YSZ) electrolyte-supported “button” cell had a porous Ni/YSZ composite anode and a porous LSM/YSZ composite cathode. The cells’ output voltage versus time were recorded and electrochemical impedance spectroscopy (EIS) and linear sweep voltammetry (LSV) measurements were performed every 24 hours. The total area specific resistance (ASR) was calculated from these measurements. The values of ASR from both EIS and LSV were comparable between each other but lower than that from durability test. Distribution of relaxation times (DRT) analysis was performed to investigate the electrochemical processes and their corresponding relaxation frequencies as well as their attributions to the total ASR. The series resistance and parallel resistance that obtained from the equivalent circuit fit of the Nyquist plot were higher at low temperature and low p O 2 regardless of LSM compositions. The area of the peaks derived from DRT analysis increased with time during individual tests. The microstructures of the tested cells were examined using scanning electron microscopy and energy-dispersive x-ray spectroscopy (SEM/EDS). Manganese oxide particles were observed near the cathode-electrolyte interface after prolonged (1,008 h) testing in air of a cell with LSM of 11% manganese excess, and after a short test (58 h) under low oxygen (p O 2 = 0.10) in a cell with LSM of 5% manganese excess. However, the role of MnOx in cell degradation is still unknown.

08 HYDROGEN↗

Lithium-Ion Battery Diagnostics Using Electrochemical Impedance via Machine-Learning

Diagnosing battery states such as health, state-of-charge, or temperature is crucial for ensuring the safety and reliability of electrochemical energy storage systems. While some states, such as temperature, may be measured using cheap sensors, accurate diagnosis of battery health metrics usually requires time-consuming performance measurements, making them infeasible for use in real-world operation. These health metrics can be measured during lab-testing and then estimated on-line using predictive life models or via state observer algorithms such as Kalman filters, but these predictive methods should be supplemented by actual measurement of battery health whenever possible to ensure reliability. Rapid measurement of battery health may be done by various types of fast diagnostic techniques such as electrochemical impedance spectroscopy (EIS), which can be performed in only a few minutes and require only a fraction of the energy and power needed for a full charge and discharge measurement. But there is a substantial challenge for estimating battery health using EIS data, as EIS is sensitive to cell temperature, state-of-charge, current, and resting time in addition to health. Thus, utilizing EIS data to predict battery capacity requires correcting for all these additional variables, a task that is extremely difficult to handle analytically. This talk utilizes machine-learning methods to estimate the effectiveness of battery capacity prediction from EIS data, leveraging a data set of hundreds of EIS measurements recorded at varying temperature and state-of-charge throughout a 500-day aging study of 32 commercial, large-format NMC-Graphite lithium-ion batteries. Using EIS as input to machine-learning models is complicated by the nonlinear response of impedance to battery health, temperature, and state-of-charge, as well as the collinearity between the impedance response at neighboring frequencies, which can easily lead to overfit models. To train robust models, features from EIS data need to be extracted from the data or some subset of critical frequencies selected. Many approaches for extracting and selecting features from EIS data from electrochemical analysis and machine-learning fields were identified for analysis: using the entire raw spectra; selection of one, two, or many frequencies from the entire spectra; selecting interesting points from the EIS measurement using domain knowledge; fitting EIS with an equivalent-circuit model; calculating statistics on the raw impedance values; and reducing the dimensionality of the data using unsupervised linear (principal component analysis) and non-linear (uniform manifold approximation and projection) methods. These approaches were rigorously compared using a machine-learning pipeline approach, training linear, Gaussian process, and random forest regression models and quantifying performance using cross-validation as well as a held-out test set. An artificial neural network model trained on the raw spectra was also tested. Promising pipelines were fine-tuned via Bayesian hyperparameter optimization using cross-validation loss and training with class-specific weights to counter data set imbalance. The most reliable method for utilizing impedance in this work was the selection of two optimal frequencies through an exhaustive search, resulting in about 2% mean absolute error on test data for both Gaussian process and random forest model architectures. Interrogation of a variety of models reveals critical frequencies of 100 Hz and 103 Hz for this data set, though the optimal set of frequencies is not necessarily intuitive, i.e., the best performing models are not simply those that use impedance at frequencies that have the highest correlation to the relative discharge capacity. The best performing model is an ensemble model, which is able to predict battery capacity with 1.9% mean absolute error for unseen cells using impedance recorded at a variety of temperatures and states-of-charge.

battery↗

Biconjugate Impedance Matching Control of the HERO WEC: Preprint

Effective control strategies are essential for maximizing the power output of wave energy converters (WECs). In this study, we explore the methodology of port-based modelling which can be used for bi-conjugate impedance matching, a type of reactive control that involves maximizing power transfer by setting the load (PTO) impedance to be the complex conjugate of the source impedance (WEC). Despite its foundational role in electrical engineering, this method has seen limited application in wave energy and has not yet been demonstrated in wave-powered desalination systems. We represent our complex multidisciplinary system as an equivalent circuit to explore frequency-based relations. The HERO WEC, a small-scale, modular point absorber (PA) designed for reverse osmosis desalination is used as a case study to demonstrate port-based modelling for control applications. Improving the performance of wave-powered water desalination systems could play a critical role in addressing freshwater scarcity for coastal communities, especially those in remote or disaster-prone regions.

16 TIDAL AND WAVE POWER↗

Grid Strength Assessment for High Levels of Inverter-based Resources in the Puerto Rico Power

A system-wide assessment of the Puerto Rico power system grid strength is studied when considering high levels of inverter-based resource penetration. This study is carried out in PSSE and assesses the impact of inverter-based resource (IBR) contributions in response to three-phase ground faults. A hypothetical 100% inverter-based generation scenario is created to assess the extreme impact on short circuit levels and a realistic scenario is considered to assess the impact to short circuit ratios. The overall conclusion is that short circuit capacity and current will drastically decrease in a high IBR scenario, an effect that is quantified in this paper. The short circuit ratio metric is typically used to assess the impact of IBR but generally overestimates grid strength due to not accounting for the impact from multiple IBRs. Other methods such as equivalent circuit based short circuit ratio and weighted short circuit ratio offer a more comprehensive consideration for multiple IBRs and can better account for their mutual interactions. The work presented in this paper is part of the PR100 study.

inverter based resources, PR100, grid strength↗

Efficient G(sup 4)FET-Based Logic Circuits

A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

Vatan, Farrokh↗

Efficient Multiplexer FPGA Block Structures Based on G4FETs

Generic structures have been conceived for multiplexer blocks to be implemented in field-programmable gate arrays (FPGAs) based on four-gate field-effect transistors (G(sup 4)FETs). This concept is a contribution to the continuing development of digital logic circuits based on G4FETs and serves as a further demonstration that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. Results in this line of development at earlier stages were summarized in two previous NASA Tech Briefs articles: "G(sup 4)FETs as Universal and Programmable Logic Gates" (NPO-41698), Vol. 31, No. 7 (July 2007), page 44, and "Efficient G4FET-Based Logic Circuits" (NPO-44407), Vol. 32, No. 1 ( January 2008), page 38 . As described in the first-mentioned previous article, a G4FET can be made to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer components than are required for conventional transistor-based circuits performing the same logic functions. The second-mentioned previous article reported results of a comparative study of NOT-majority-gate (G(sup 4)FET)-based logic-circuit designs and equivalent NOR- and NAND-gate-based designs utilizing conventional transistors. [NOT gates (inverters) were also included, as needed, in both the G(sup 4)FET- and the NOR- and NAND-based designs.] In most of the cases studied, fewer logic gates (and, hence, fewer transistors), were required in the G(sup 4)FET-based designs. There are two popular categories of FPGA block structures or architectures: one based on multiplexers, the other based on lookup tables. In standard multiplexer- based architectures, the basic building block is a tree-like configuration of multiplexers, with possibly a few additional logic gates such as ANDs or ORs. Interconnections are realized by means of programmable switches that may connect the input terminals of a block to output terminals of other blocks, may bridge together some of the inputs, or may connect some of the input terminals to signal sources representing constant logical levels 0 or 1. The left part of the figure depicts a four-to-one G(sup 4)FET-based multiplexer tree; the right part of the figure depicts a functionally equivalent four-to-one multiplexer based on conventional transistors. The G(sup 4)FET version would contains 54 transistors; the conventional version contains 70 transistors.

Vatan, Farrokh↗

Bootstrap unloader

Circuit can sample a number of transducers in sequence without drawing from them. This bootstrap unloader uses a differential amplifier with one input connected to a circuit which is the equivalent of the circuit to be unloaded, and the other input delivering the proper unloading currents.

Pfiffner, H. J.↗

Current distribution in a three-dimensional IC analyzed by a perturbation method. Part 1: A simple steady state theory

The steady state current distribution in a three dimensional integrated circuit is presented. A device physics approach, based on a perturbation method rather than an equivalent lumped circuit approach, is used. The perturbation method allows the various currents to be expressed in terms of elementary solutions which are solutions to very simple boundary value problems. A Simple Steady State Theory is the subtitle because the most obvious limitation of the present version of the analysis is that all depletion region boundary surfaces are treated as equipotential surfaces. This may be an adequate approximation in some applications but it is an obvious weakness in the theory when applied to latched states. Examples that illustrate the use of these analytical methods are not given because they will be presented in detail in the future.

Edmonds, Larry D.↗

Time-resolved electrical potential pump – X-ray photoelectron spectroscopy probe developments for investigating dynamic processes occurring at electrochemical interfaces

Electrode–electrolyte interfaces are of critical importance in several fields, including renewable energy, corrosion, and environmental chemistry. However, investigating these interfaces under operational conditions poses considerable challenges due to the limitations of the instrumentation employed. While recent advancements in in situ and operando techniques have enhanced our comprehension of the steady-state properties of solid-liquid interfaces, the dynamic behaviors of these systems remain inadequately explored. This study introduces a time-resolved X-ray photoelectron spectroscopy (XPS) technique designed to capture transient reaction intermediates and charging dynamics at electrified interfaces. The presented proof-of-principle study demonstrates that electrochemical processes, represented by an equivalent electrical circuit (EEC) model, can be probed and understood using square wave voltage pulses of a potentiostat synchronized to the modified data acquisition of an XPS setup. This method offers a valuable alternative to traditional pump–probe techniques, facilitating the investigation of a broader range of electrochemical systems. A dedicated software package for analyzing time- and energy-resolved XPS with a focus on extracting parameters of the EEC is geared towards benchmarking different EECs in future real-world electrochemical experiments.

Electrochemistry↗

Resonant electrodynamic heating of stellar coronal loops: An LRC circuit analogue

The electrodynamic coupling of stellar coronal loops to underlying beta velocity fields. A rigorous analysis revealed that the physics can be represented by a simple yet equivalent LRC circuit analogue. This analogue points to the existence of global structure oscillations which resonantly excite internal field line oscillations at a spatial resonance within the coronal loop. Although the width of this spatial resonance, as well as the induced currents and coronal velocity field, explicitly depend upon viscosity and resistivity, the resonant form of the generalized electrodynamic heating function is virtually independent of irreversibilities. This is a classic feature of high quality resonators that are externally driven by a broad band source of spectral power. Applications to solar coronal loops result in remarkable agreement with observations.

Ionson, J. A.↗

State Preparation of Antisymmetrized Geminal Power on a Quantum Computer without Number Projection

The antisymmetrized geminal power (AGP) is equivalent to the number projected Bardeen–Cooper–Schrieffer (PBCS) wave function. It is also an elementary symmetric polynomial (ESP) state. We generalize previous research on deterministically implementing the Dicke state to a state preparation algorithm for an ESP state, or equivalently AGP, on a quantum computer. Our method is deterministic and has polynomial cost, and it does not rely on number symmetry breaking and restoration. We also show that our circuit is equivalent to a disentangled unitary paired coupled cluster operator and a layer of unitary Jastrow operator acting on a single Slater determinant. Here, the method presented herein highlights the ability of disentangled unitary coupled cluster to capture nontrivial entanglement properties that are hardly accessible with traditional Hartree–Fock based electronic structure methods.

97 MATHEMATICS AND COMPUTING↗

Resonant electrodynamic heating of stellar coronal loops - An LRC circuit analog

The problem of electrodynamic coupling of stellar coronal loops where beta is less than 1 to underlying velocity fields where beta is greater than approximately 1 is treated. A rigorous analysis reveals that the physics can be represented by a simple yet equivalent LRC circuit analog. This derived analog suggests the existence of global structure oscillations which resonantly excite internal field line oscillations at a spatial resonance within the coronal loop. Even though the width of this spatial resonance, as well as the induced currents and coronal velocity field, within the resonance region explicitly depends on viscosity and resistivity, the resonant form of the generalized electrodynamic heating functions is virtually independent of irreversibilities. This is a classic feature of high-quality resonators that are driven externally by a broad-band source of spectral power.

Ionson, J. A.↗

CMOS output buffer wave shaper

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

Albertson, L.↗

HSPICE modelling of a solar array circuit controlled by a fet switch

This paper presents a method of modeling a solar array circuit controlled by a hexfet switch on HSPICE. HSPICE models are developed for the solar array current voltage (IV) characteristic and the IRF150 hexfet. Computer simulations are made to verify rate of current change at the load. The equivalent LC circuit for the same current control is modeled to show savings in weight and power in choosing the fet switch over an LC circuit.

Cox, Deanna D.↗