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At least 271 records · Page 15

Low-cost connectors for inverters and converters and methods of manufacturing and using the same

In some embodiments, systems and methods for connector assembly for use with an AC or DC power interface of a power conversion device, such as a converter and an inverter, are provided. The connector assembly can include a circuit board, a power connector, and a pin. The power connector can have a base configured to be secured relative to the circuit board and define a first channel extending through the power connector along a first channel axis. The first pin can have a first pin body that extends along a first pin axis and a first connection element that extends along the first pin axis from the first pin body to a first terminal end that is skewed relative to the first pin axis.

Khaligh, Alireza↗

Device and method to manipulate ions in multi-level system

An apparatus includes multiple levels of ion transport channels, with successive levels coupled by elevator channels. Efficient three dimensional packing provides long path lengths in practical volumes for ion mobility separation with high resolving power. Disclosed elevator configurations provide efficient routing of ion transport channels across levels with low ion loss, enabling ion mobility separation over 100 levels or more. Elevator configurations include (i) opposed traveling waves meeting at an elevator entrance, (ii) external elevator with a wrap-around electrode bank, (iii) external elevator with electrode banks on parallel extension plates, or (iv) elevator operating in surfing mode, in various combinations. Manufacture is aided by printed wiring boards, with interchangeable boards. Assembly with motherboard, spacer block(s), and alignment pins provides efficient distribution of electrode excitations and accurate reproducible positioning.

Ibrahim, Yehia M.↗

Conductive trace interconnection tape

A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer. The bottom insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on the printed circuit board or flexible circuit substrate.

Hatch, Stephen McGarry↗

An Experimental Feasibility Study on Applying Neutron Tomography to Encapsulated Spent Nuclear Fuel - 20050

Visual inspection makes easier to ensure the integrity and safety of spent nuclear fuel (SNF) than any classical techniques. Various classical techniques have been applied but there are no reliable methods to qualitatively and quantitatively verify spent fuel in dry storage. Thus, the present authors have developed the prototype safeguards apparatus for dry storage employing the array of He-4 gas scintillation detectors (S670E, Arktis Radiation Detectors Ltd., Switzerland), newly designed to simultaneously measure thermal and fast neutrons without any moderators. The S670E detector has a cylindrical shape with a diameter of 52 mm and active length of 600 mm (total length: 875 mm). The detector is filled by He-4 gas with an approximate pressure of 180 bar for fast neutron detection, and its inner wall is coated by Li-6 for thermal neutron detection. The scintillation lights generated via Li-6 nuclear reaction and elastic scattering are collected by 24 SiPMs linearly paired at the center of the detector. The detector delivers a TTL (Transistor-Transistor Logic) output for pulse readout and UART (Universal Asynchronous Receiver Transmitter) for device control. In order to assess feasibility of the apparatus, an experimental system has been designed, built, and optimized via computational studies. Cf-252 neutron sources and linearly arrayed detectors, working as a single detector, were occupied for this study due to the difficulties in working with SNF. The laboratory scale cask (diameter: 0.67 m, height: 1.5 m), minimized by a factor of 10 compared to the actual thickness of a commercial TN-32 cask, was also manufactured. The detector array was designed to rotate the lab-scale cask and obtain 36 image profiles at every 10 degrees. All profiles were aligned in single frame image called a sinogram, and the cross-sectional image was then fabricated by the inverse radon transform algorithm. These experiments have been repeated with different configurations and numbers of sources. Some gamma-ray sources were also measured with neutron sources in order to distinguish between neutron and gamma-ray pulses. Basically, a He-4 detector is designed to run on Linux OS so it is difficult to directly apply to Windows-based equipment widely used in S. Korea. Therefore, a new data acquisition board working on Windows OS was designed and built. The board mainly consists of FPGA (Field Programmable Gate Array) and SoC (System on Chip) for TTL pulse readout, sorting measured data, and transferring data to a user interface. In conclusion, the tomographic system at lab-scale has shown considerable potential to detect a partial or gross defect of encapsulated assemblies in dry storage. Next steps of this study will be to 1) repeatedly carry out experiments to demonstrate scientific reliability and validity, and 2) numerically integrate signals with weight factors to enhance the image quality since the suggested system based on passive interrogation method requires longer measurement time. Finally, the system will apply to a commercial dry storage phased out soon in S. Korea. (authors)

07 ISOTOPE AND RADIATION SOURCES↗

ANS-8 Nuclear Criticality Safety Consensus Standards - Current Initiatives

The nuclear criticality safety (NCS) consensus standards are developed as using rigorous procedures of the Standards Board of the American Nuclear Society. These procedures have been accredited by the American National Standards Institute, Inc., as meeting the criteria for American National Standards. The Nuclear Criticality Safety Consensus Committee (NCSCC) that approved all 18 NCS consensus standards is balanced to ensure that competent, concerned, and varied interests have had an opportunity to participate. The ANS-8 subcommittee (ANS-8) consists of 17 NCS experts with many years of experience as end users of ANS standards who serve on standard working groups to develop and maintain standards. ANS-8 ensures that the technical content of the standards is adequate for NCS community use. Attempts are made to ensure that ANS-8 consists of NCS professionals with a diverse range of experience such that all standards are applicable to as many sites as possible. ANS-8 is a very active subcommittee, and some active projects in progress are discussed in this paper: basis statement development for all standards, development of a glossary for consistency of definitions across all ANS-8 standards, and Considering the Criticality Safety Support Group (CSSG) Recommendation 2016-04 to the ANS Standards Board for changes in several ANS-8 standards.

96 KNOWLEDGE MANAGEMENT AND PRESERVATION↗

A Real-Time ANPC Inverter Digital Twin with Integrated Design-For-Trust

The demand for renewable energy has increased over the last few years, and so has the demand for greater expectations within the energy market. This increasing trend has been accompanied by more significant usage of internet-connected devices (IoT), leading to critical electrical infrastructure being connected to the internet. Implementing internet connectivity with such devices and systems provides benefits such as improving the system's performance, facilitating irregularity and anomaly mitigation, and providing additional situational awareness for enhanced decision-making. However, enhancing the connected system with IoT introduces a drawback – a greater vulnerability to cyber-attacks. Cyber-attacks targeting critical infrastructure in the electrical sector have occurred in the United States and Ukraine. These cyber-attacks highlight and expose vulnerabilities that a system inherits when connecting to the internet. These attacks left thousands of customers without electricity for hours until operators could regain control of the electric utility grid. Therefore, to address the vulnerabilities of an internet-connected power electronic device, this work focused on the hardware layer of the system. Implementing a cyber-control system inside the hardware layer can significantly reduce the possibility of an attacker patching malicious controller firmware into a photovoltaic grid-connected inverter, thus mitigating the likelihood that the inverter becomes inactive a cyber-attack scenario. With this mitigation technique, if a cyberattack is successful and an attacker gains control of the network, a cyber-defense technique is in place to mitigate the impact of the cyber-attack. This additional protection layer was developed based on an innovative concept known as Digital Twin (DT). A DT, in this case, replicates an Active-Neutral Point Clamped (ANPC) inverter and was designed using a hardware language known as VHDL (Very High-Speed Integrated Circuit Hardware Description Language) and applied to Field-Programmable-GateArray (FPGA). The DT is embedded within the FPGA and contained in a controller board, the UCB (Unified Controller Board), developed by the University of Arkansas electrical engineering team. This UCB also contains two Digital Signal Processors (DSPs) responsible for generating associated signals to control an authentic physical inverter. These DSP signals are received and processed by the FPGA that implements the DT of an ANPC; in other words, it simulates in realtime the expected output of an actual ANPC inverter using the signals from the DSP. When a new firmware is ready to be patched, the DT provides output signals simulating behavior that a real ANPC inverter would generate with the new firmware. The new firmware is tested to check if it meets all the operational requirements established using a Design-For-Trust technique (DFTr). If the new firmware fails in at least one of the DFT tests, it is considered malicious and must be rejected. This work is divided into sections, such as Background, which explains the pieces that were used and the strategy behind this work; Process and Procedure, which explains the methodology that was adopted to prove the reliability and effectiveness of this work; Results and Discussion, where the simulations and results are described and explained; followed by Conclusion and Future work section, which concludes this work and adds possible future projects to continue this work further.

do Amaral Custodio, Paulo Vitor↗

Examining the Feasibility of Identifying Tau Neutrino Charged Current Events in the DUNE Far Detector

Neutrinos began as theoretical, massless particles, and since their first detection they have continued to be the subject of various experiments. One such experiment is DUNE, which is a long baseline neutrino experiment with the goal of studying neutrino properties, such as neutrino oscillation parameters. In this work, two projects were completed, one dealing with the hardware of DUNE and the other dealing with neutrino simulations. For the hardware project, we designed a quality control method for testing adaptor boards which make up part of the Far Detector circuit boards. This method was completed and prototyped, however was not implemented as planned due to funding changes. For the simulation project, we simulated ντ , νµ, and νe CC interactions using two simulation methods (stand alone GENIE and a full detector simulation) in order to begin to understand what a ντ CC event would look like in the Far Detector and create an initial list of kinematic properties that can be used for this purpose. We found that there is not a complete understanding of what is occurring in the full detector simulation. We also found that there is promise in using kinematic properties to be able to differentiate ντ CC events, however properties beyond those covered here, as well as a more accurate simulation, will be required for any definitive statistical statements.

Choate, Sarah↗

Smart Charge Management

This session will discuss "on-board" electric vehicle (EV) technology, its availability, and benefits. Learn about how these tools can empower agencies to further adopt EVs and aid in fleet electrification efforts. We will explore the evolving advancements of managed charging, available telematics, on-board technology and how to incorporate them into your overall EV adoption strategy. Furthermore, we'll discuss what to expect in the near future; and how to future proof your investments to make the technology work for you.

ADVANCED PROPULSION SYSTEMS,ENGINEERING↗

High-data throughput reconfigurable computing platform

A reconfigurable computing platform includes a reconfigurable computing device, electro-optical transceiver, and first voltage converter disposed on a multilayer board. The electro-optical transceiver converts an optical signal at least one of to and from an electrical signal, and the electrical signal is operatively coupled to the reconfigurable computing device. The electro-optical transceiver is disposed in proximity to the reconfigurable computing device, and the first voltage converter is operatively coupled to a common voltage distributed around a periphery of the multilayer board. The first voltage converter converts the common voltage to a first operating voltage, and the first voltage converter is disposed in proximity to the reconfigurable computing device. The first operating voltage is provided to the reconfigurable computing device as a first power source. A reconfigurable computing system includes a plurality of reconfigurable computing platforms operatively coupled together using an optical signal. A corresponding method of providing a reconfigurable computing platform is also disclosed.

Tang, Shaochun↗

Status of the Mu2e calorimeter readout electronics

The Mu2e experiment [1] at Fermilab will search for the neutrino-less coherent conversion of a muon into an electron in the field of a nucleus. Mu2e detectors comprise a straw tracker, an electromagnetic calorimeter and a veto for cosmic rays. The calorimeter employs 1348 Cesium Iodide crystals readout by silicon photomultipliers and fast front-end and digitization electronics. The front-end electronics consists of two discrete readout circuits (AMP-HV) for each crystal. These provide the amplification, shaping stage and linear regulation of the SiPM bias voltage and monitoring. The SiPM and front-end control electronics is implemented in a battery of mezzanine boards each equipped with an ARM processor that controls a group of 20 Amp-HV circuits distributing the low voltage and the high-voltage. The electronic is hosted in crates located on the external surface of calorimeter disks. The crates also host the waveform digitizer board (DIRAC) that performs digitization of the front end signals and transmit the digitized data to the Mu2e DAQ. Calorimeter electronic is hosted inside the cryostat and must sustain very high radiation and magnetic field so it was necessary to fully qualify it. The system design and quality assurance procedures will be reviewed.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

CAPTAN+X Data Converter Integration

Fermi National Accelerator Laboratory's CAPTAN (Compact And Programmable daTa Acquisition Node) series provides a flexible hardware platform for data acquisition across a range of experiments and facilities. The latest iteration, CAPTAN+X, is built around a Kintex-7 FPGA supporting four FPGA Mezzanine Card (FMC) connections. As part of a broader laboratory effort to bring facility systems under a Model-Based Systems Engineering (MBSE) framework, CAPTAN+X is one of several systems slated to be incorporated into this modeling environment in the near term. A necessary step toward that goal is incorporating the platform's core functionality, which centers on integration with the LXD31K4 FMC, a data converter module combining dual AD9652 analog-to-digital converters and dual AD9142A digital-to-analog converters. Achieving compatibility required resolving pin-mapping conflicts between the LXD31K4's High Pin Count connector and the CAPTAN+X's available pin types, adapting a Board Support Project originally written for an UltraScale-class evaluation board to the Kintex-7 architecture, replacing incompatible primitives, restructuring clock distribution, and manually configuring chip initialization in place of an unsupported soft-processor-based approach. Functional verification of the ADC and DAC channels, followed by closed-loop testing combining both converters with real-time filtering, confirmed correct operation of the integrated system. These results establish a working hardware and firmware baseline for the CAPTAN+X platform, positioning it for future inclusion in the laboratory's growing MBSE modeling effort.

Espinoza, David [Illinois U., Urbana (main)]↗

Economic analysis of precious metal recovery from electronic waste through gas-assisted microflow extraction

The recycling of end-of-life (EoL) electronic products is motivated by the enormous investment of resources in their creation and the environmental concerns associated with electronic waste (e-waste). Hydrometallurgical methods that utilize conventional leaching and solvent extraction are often applied to extract target materials from e-waste; however, these techniques have significant technical and economic limitations when extracting high-value, low concentration metals from complex waste streams. This study proposes and evaluates a novel process based on gas-assisted microflow extraction (GAME) that efficiently recovers precious metals from waste printed circuit boards (WPCBs). Further, an economic analysis is conducted to verify the economic feasibility of the GAME-based process at an industrial scale. The economic outputs are further investigated to identify the most cost-effective production strategies, particularly with respect to the plant feedstock rate. It is envisioned that this study may establish a paradigm for making economically-informed decisions for sustainable technologies.

42 ENGINEERING↗

Sedimentation and Nonlinear Trapping in Texas Reservoirs Identified Using Remote Sensing and Bathymetric Survey Records

Decreasing reservoir storage capacity due to sedimentation poses great challenges to aging U.S. reservoirs, as it reduces the efficacy and reliability of their socio‐economic services. However, systematic assessments of reservoir sedimentation rates and associated issues remain limited because of sparse and infrequent bathymetry survey data. In this study, we use remote sensing‐driven estimates of sediment concentrations to identify regions experiencing rapid reservoir capacity loss, as observed in repeated bathymetry surveys. Our analysis focuses on Texas, where one of the most reliable state‐level reservoir capacity loss data sets is available through a unique long‐term monitoring program by the Texas Water Development Board. We find that reservoirs with large storage capacities and high sedimentation rate are concentrated in Northeast Texas. We also show that reduced forest, increased barren land, and erosive soil properties are co‐varying with high reservoir sedimentation rates. Temporal changes in the longitudinal gradient of the remotely sensed sediment flux highlight the nonlinear nature of sediment trapping processes, and can be used to estimate the reservoir storage capacity loss over time. In combination with standard bathymetry surveys, our approach shows potential for more cost‐effective and frequent assessment of reservoir storage loss.

Lee, Jiyong [ORNL] (ORCID:0000000198957406)↗

Intrinsic thermal interfacial resistance measurement in bonded metal–polymer foils

Heat conduction through bonded metal–polymer interfaces often limits the overall heat transfer in electronic packaging, batteries, and heat recovery systems. To design the thermal circuit in such systems, it is essential to measure the thermal interfacial resistance (TIR) across ~1 µm to 100 µm junctions. Previously reported TIR of metal–polymer junctions utilize ASTM E1530-based two-block systems that measure the TIR by applying pressure across the interface through external heating and cooling blocks. Here, we report a novel modification of the ASTM-E1530 technique that employs integrated heaters and sensors to provide an intrinsic TIR measurement of an adhesively bonded metal–polymer junction. We design the measurement technique using finite element simulations to either passively suppress or actively compensate the lateral heat diffusion through the polymer, which can minimize the systematic error to ≲5%. Through proof-of-concept experiments, we report the TIR of metal–polymer interfaces made from DuPont’s Pyralux double-side copper-clad laminates, commonly used in flexible printed circuit boards. Our TIR measurement errors are <10%. We highlight additional sources of errors due to non-idealities in the experiment and discuss possible ways to overcome them. Our measurement technique is also applicable to interfaces that are electrically insulating such as adhesively joined metal–metal junctions and sputter-coated or welded metal–polymer junctions. Altogether, the technique is capable of measuring TIR ≳10 –5 m 2 KW –1 in bonded metal–polymer foils and can be tailored for in situ measurements in flexible electronics, circuit packaging, and other hybrid metal–polymer systems.

47 OTHER INSTRUMENTATION↗

The ultrafast pixel array camera system and its applications in high energy density physics

Diagnostics in high energy density physics, shock physics, and related fields are primarily driven by a need to record rapidly time-evolving signals in single-shot events. These measurements are often limited by channel count and signal degradation issues on cable links between the detector and digitizer. Here we present the Ultrafast Pixel Array Camera (UPAC), a compact and flexible detector readout system with 32 waveform-recording channels at up to 10 Gsample/s and 1.8 GHz analog bandwidth. The compact footprint allows the UPAC to be directly embedded in the detector environment. A key enabling technology is the PSEC4A chip, an eight-channel switch-capacitor array sampling device with up to 1056 samples/channel. The UPAC system includes a high-density input connector that can plug directly into an application-specific detector board, programmable control, and serial readout, with less than 5 W of power consumption in full operation. We present the UPAC design and characterization, including a measured timing resolution of ~20 ps or better on acquisitions of sub-nanosecond pulses with minimal system calibrations. Example applications of the UPAC are also shown to demonstrate operation of a solid-state streak camera, an ultrafast imaging array, and a neutron time-of-flight spectrometer.

47 OTHER INSTRUMENTATION↗

Flexible PCB Windings Size Optimization for Winding AC Resistance Minimization Under the Sinusoidal Voltage Regime

In this paper, optimization of the winding AC resistance of the flexible printed circuit board (FPCB) wire windings is performed. A one-dimensional model of the FPCB winding is introduced and an equation for the FPCB winding AC resistance and its low and medium frequency approximation are derived. The approximate FPCB winding AC resistance equation is used to derive optimum thickness of the FPCB winding conductor thickness at which minimum of winding AC resistance (global optimum) is achieved. The Finite Element Method analysis and experimental verification of derived equations (winding resistance, impedance, power loss, and temperature measurements) is performed in order validate derived model and winding resistance equation.

42 ENGINEERING↗

Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks

Malicious modifications to printed circuit boards (PCBs) are known as hardware Trojans. These may arise when malafide third parties alter PCBs premanufacturing or postmanufacturing and are a concern in safety-critical applications, such as industrial control systems. In this research, we examine how data-driven detection can be utilized to detect such Trojans at run-time. We develop a flexible and reconfigurable PCB test bed derived from the popular open-source programmable logic controller (PLC) platform “OpenPLC.” We then develop a Trojan detection framework, which utilizes and analyzes multimodal side channels (e.g., timing, magnetic signals, power, and hardware performance counters). We consider defender-configurable input/output (I/O) loopback test, comparison with design-document baselines, and magnetometer-aided monitoring of system behavior under defender-chosen excitations. Our approach can extend to golden-free environments. Golden (known-good) versions of the PCBs are assumed not available, but design information, datasheets, and component-level data are available. We demonstrate the efficacy of our approach on a range of Trojans instantiated in the test bed.

42 ENGINEERING↗

Long Beach Transit BEB Progress Report (Jan-Jun 2019)[Slides]

This report summarizes results of a battery electric bus (BEB) evaluation at Long Beach Transit, located in Southern California. Long Beach Transit is collaborating with the California Air Resources Board and the U.S. Department of Energy’s National Renewable Energy Laboratory (NREL) to evaluate the buses in revenue service. The focus of this evaluation is to compare the performance and the operating costs of the BEBs to that of conventional technology buses and to track progress over time. NREL completed a previous report funded by the Federal Transit Administration that documented results from January 2018 through December 2018. This report extends the data analysis through June 2019. The data period focus of this report is January 2019–June 2019. NREL plans to publish another written report on the Long Beach Transit fleet covering all of 2019.

33 ADVANCED PROPULSION SYSTEMS↗