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At least 271 records · Page 15

Method and apparatus for decoding compatible convolutional codes

This invention relates to learning decoders for decoding compatible convolutional codes. The decoder decodes signals which have been encoded by a convolutional coder and allows performance near the theoretical limit of performance for coded data systems. The decoder includes a sub-bit shift register wherein the received sub-bits are entered after regeneration and shifted in synchronization with a clock signal recovered from the received sub-bit stream. The received sub-bits are processed by a sub-bit decision circuit, entered into a sub-bit shift register, decoded by a decision circuit, entered into a data shift register, and updated to reduce data errors. The bit decision circuit utilizes stored sub-bits and stored data bits to determine subsequent data-bits. Data errors are reduced by using at least one up-date circuit.

Doland, G. D.↗

Instrumentation for one-way satellite PTTI applications

A review of general principles and operational procedures illustrates how the typical passive user and omni receiving antenna can recover Precise Time and Time Interval (PTTI) information from a low altitude navigation satellite system for clock calibration and synchronization. Detailed discussions of concepts and theory of the receiver design are presented. The importance of RF correlation of the received and local PN encoded sequences is emphasized as a means of reducing delay uncertainties of the instrumentation to values compatible with nanosecond to submicrosecond PTTI objectives. Two receiver configurations were fabricated for use in satellite-to-laboratory experiments. In one receiver the delay-locked loop for PN signals synchronization used a dithered amplitude detection process while the second receiver used a complex sums phase detection method for measurement of delay error. The necessity for compensation of Doppler shift is discussed. Differences in theoretical signal acquisition and tracking performance of the design concepts are noted.

Osborne, A. E.↗

Time code dissemination experiment via the SIRIO-1 VHF transponder

An experiment to evaluate the possibility of disseminating a time code via the SIRIO-1 satellite, by using the onboard VHF repeater is described. The precision in the synchronization of remote clocks was expected to be of the order of 0.1 to 1 ms. The RF carrier was in the VHF band, so that low cost receivers could be used and then a broader class of users could be served. An already existing repeater, even if not designed specifically for communications could be utilized; the operation of this repeater was not intended to affect any other function of the spacecraft (both the SHF repeater and the VHF telemetry link were active during the time code dissemination via the VHF transponder).

Detoma, E.↗

Synchronization for Optical PPM Signals

Method based on statistical properties of weak pulse-positionmodulated (PPM) signal enables synchronization of receiver clock with received-signal time base. Method applies to weak optical M-ary PPM signals, for which there is only one pulse of length Tp transmitted during one of timeslots of length T in each successive interval of M timeslots. Method requires small dead time, Td, at beginning and end of each timeslot, during which pulse amplitude is zero.

Vilnrotter, V. A.↗

Satellite range delay simulator for a matrix-switched time division multiple-access network simulator

The Systems Integration, Test, and Evaluation (SITE) facility at NASA Lewis Research Center is presently configured as a satellite-switched time division multiple access (SS-TDMA) network simulator. The purpose of SITE is to demonstrate and evaluate advanced communication satellite technologies, presently embodied by POC components developed under NASA contracts in addition to other hardware, such as ground terminals, designed and built in-house at NASA Lewis. Each ground terminal in a satellite communications system will experience a different aspect of the satellite's motion due mainly to daily tidal effects and station keeping, hence a different duration and rate of variation in the range delay. As a result of this and other effects such as local oscillator instability, each ground terminal must constantly adjust its transmit burst timing so that data bursts from separate ground terminals arrive at the satellite in their assigned time slots, preventing overlap and keeping the system in synchronism. On the receiving end, ground terminals must synchronize their local clocks using reference transmissions received through the satellite link. A feature of the SITE facility is its capability to simulate the varying propagation delays and associated Doppler frequency shifts that the ground terminals in the network have to cope with. Delay is achieved by means of two NASA Lewis designed and built range delay simulator (RDS) systems, each independently controlled locally with front panel switches or remotely by an experiment control and monitor (EC/M) computer.

Nagy, Lawrence A.↗

Satellite range delay simulator for a matrix-switched time division multiple-access network simulation system

The Systems Integration, Test, and Evaluation (SITE) facility at NASA Lewis Research Center is presently configured as a satellite-switched time division multiple access (SS-TDMA) network simulator. The purpose of SITE is to demonstrate and evaluate advanced communication satellite technologies, presently embodied by POC components developed under NASA contracts in addition to other hardware, such as ground terminals, designed and built in-house at NASA Lewis. Each ground terminal in a satellite communications system will experience a different aspect of the satellite's motion due mainly to daily tidal effects and station keeping, hence a different duration and rate of variation in the range delay. As a result of this and other effects such as local oscillator instability, each ground terminal must constantly adjust its transmit burst timing so that data bursts from separate ground terminals arrive at the satellite in their assigned time slots, preventing overlap and keeping the system in synchronism. On the receiving end, ground terminals must synchronize their local clocks using reference transmissions received through the satellite link. A feature of the SITE facility is its capability to simulate the varying propagation delays and associated Doppler frequency shifts that the ground terminals in the network have to cope with. Delay is ahcieved by means of two NASA Lewis designed and built range delay simulator (RDS) systems, each independently controlled locally with front panel switches or remotely by an experiment control and monitor (EC/M) computer.

Nagy, Lawrence A.↗

Control Circuit For Reed-Solomon Encoder

Control circuit designed for use with commercially available AHA4610 Reed-Solomon encoder. Needed to select depth of interleaving and to synchronize input and output blocks of data and parity bits with suitable clock signals. Circuit provides synchronizing and control signals for Reed-Solomon encoder. Encoder can operate with asynchronous input and output data streams at rates up to 80 Mb/s. Interleaving depth selectable, and accommodation to input data rate automatic.

Ross, Douglas↗

Time Distribution Using SpaceWire in the SCaN Testbed on ISS

A paper describes an approach for timekeeping and time transfer among the devices on the CoNNeCT project s SCaN Testbed. It also describes how the clocks may be synchronized with an external time reference; e.g., time tags from the International Space Station (ISS) or RF signals received by a radio (TDRSS time service or GPS). All the units have some sort of counter that is fed by an oscillator at some convenient frequency. The basic problem in timekeeping is relating the counter value to some external time standard such as UTC. With SpaceWire, there are two approaches possible: one is to just use SpaceWire to send a message, and use an external wire for the sync signal. This is much the same as with the RS- 232 messages and l pps line from a GPS receiver. However, SpaceWire has an additional capability that was added to make it easier - it can insert and receive a special "timecode" word in the data stream.

Lux, James P.↗

A Methodology for the Design and Verification of Globally Asynchronous/Locally Synchronous Architectures

Recent advanced in model-checking have made it practical to formally verify the correctness of many complex synchronous systems (i.e., systems driven by a single clock). However, many computer systems are implemented by asynchronously composing several synchronous components, where each component has its own clock and these clocks are not synchronized. Formal verification of such Globally Asynchronous/Locally Synchronous (GA/LS) architectures is a much more difficult task. In this report, we describe a methodology for developing and reasoning about such systems. This approach allows a developer to start from an ideal system specification and refine it along two axes. Along one axis, the system can be refined one component at a time towards an implementation. Along the other axis, the behavior of the system can be relaxed to produce a more cost effective but still acceptable solution. We illustrate this process by applying it to the synchronization logic of a Dual Fight Guidance System, evolving the system from an ideal case in which the components do not fail and communicate synchronously to one in which the components can fail and communicate asynchronously. For each step, we show how the system requirements have to change if the system is to be implemented and prove that each implementation meets the revised system requirements through modelchecking.

Miller, Steven P.↗

Synchronization tracking in pulse position modulation receiver

A clock pulse generator for decoding pulse position modulation in an optical communication receiver is synchronized by a delay tracking loop which multiplies impulses of a data pulse by the square wave clock pulses from the generator to produce positive impulses when the clock pulse is of one level, and negative impulses when the clock pulse is of another level. A delay tracking loop integrates the impulses and produces an error signal that adjusts the delay so the clock pulses will be synchronized with data pulses. A dead-time tau sub d is provided between data pulses of an interval tau sub p in the data pulse period tau. When synchronized, the average number of positive impulses integrated will equal the average number of negative impulses over the continuous stream of data pulses.

Vilnrotter, Victor A.↗

Gigabit Ethernet Asynchronous Clock Compensation FIFO

Clock compensation for Gigabit Ethernet is necessary because the clock recovered from the 1.25 Gb/s serial data stream has the potential to be 200 ppm slower or faster than the system clock. The serial data is converted to 10-bit parallel data at a 125 MHz rate on a clock recovered from the serial data stream. This recovered data needs to be processed by a system clock that is also running at a nominal rate of 125 MHz, but not synchronous to the recovered clock. To cross clock domains, an asynchronous FIFO (first-in-first-out) is used, with the write pointer (wprt) in the recovered clock domain and the read pointer (rptr) in the system clock domain. Because the clocks are generated from separate sources, there is potential for FIFO overflow or underflow. Clock compensation in Gigabit Ethernet is possible by taking advantage of the protocol data stream features. There are two distinct data streams that occur in Gigabit Ethernet where identical data is transmitted for a period of time. The first is configuration, which happens during auto-negotiation. The second is idle, which occurs at the end of auto-negotiation and between every packet. The identical data in the FIFO can be repeated by decrementing the read pointer, thus compensating for a FIFO that is draining too fast. The identical data in the FIFO can also be skipped by incrementing the read pointer, which compensates for a FIFO draining too slowly. The unique and novel features of this FIFO are that it works in both the idle stream and the configuration streams. The increment or decrement of the read pointer is different in the idle and compensation streams to preserve disparity. Another unique feature is that the read pointer to write pointer difference range changes between compensation and idle to minimize FIFO latency during packet transmission.

Duhachek, Jeff↗

Using GPS and VLBI technology to maintain 14 digit synchronization

To facilitate the navigation of spacecraft to the outer planets, Jupiter and beyond, the JPL-NASA Deep Space Network (DSN) has implemented three ensembles of atomic clocks at widely separated locations. These clocks must be maintained, synchronized, to with a few parts in 10 to the 13th power of each other and, the entire group must be maintained, to a lesser degree, in synchronism with Coordinated Universal Time (UTC)NBS/USNO. Over the last 1 1/2 years the DSN has been using Global Positioning Satellites (GPS) and Very Long Baseline Interferometry (VLBI) technology to perform these critical Frequency and Time (F&T) synchronization tasks. A year of F&T synchronization data collected from the intercomparison of 3 sets of cesium and hydrogen maser driven clock ensembles through the use of GPS and VLBI techniques are covered. Also covered, are some of the problems met and limitations of these two techniques at their present level of technology.

Ward, S. C.↗

Experimental comparison of time synchronization techniques by means of light signals and clock transport on the rotating earth

An experiment was conducted to investigate the equivalence of two methods of time transfer in a noninertial reference frame: by means of an electromagnetic signal using laser light pulses and by means of the slow ground transport of a hydrogen maser atomic clock. The experiment may also be interpreted as an investigation of whether the one-way speeds of light in the east-west and west-east directions on the rotating earth are the same. The light pulses were sent from a laser coupled to a telescope at the NASA Goddard Optical Research Facility (GORF) in Greenbelt, Maryland to the U.S. Naval Observatory (USNO) in Washington, DC. The optical path was made possible by a 30-cm flat mirror on a water tower near GORF and a 25-cm flat mirror on top of the Washington National Cathedral near USNO. The path length was 26.0 km with an east-west component of 20.7 km. The pulses were reflected back over the same path by a portable array of corner cube reflectors. The transmission and return times were measured with a stationary Sigma Tau hydrogen maser and a University of Maryland event timer at GORF, while the times of reflection were measured with a similar maser and event timer combination carefully transported to USNO. Both timekeeping systems were housed in highly insulated enclosures and were maintained at constant temperatures to within +/- 0.1 C by microprocessor controllers. The portable system was also protected from shock and vibration by pneumatic supports. The difference delta(T) between the directly measured time of reflection according to the portable clock and the time of reflection calculated from the light pulse signal times measured by the stationary clock was determined. For a typical trip delta(T) is less than 100 ps and the corresponding limit on an anisotropy of the one-way speed of light is delta(c/c) is less than 1.5 x 10(exp -6). This the only experiment to date in which two atomic clocks were calibrated at one location, one was slowly transported to the other end of a path, and the times of transmission, reflection, and return of short light pulses sent in different directions along the path were registered.

Nelson, R. A.↗

Dual transponder time synchronization at C band using ATS-3.

The use of artificial satellites for time synchronization of geographically distant clocks is hindered by problems due to satellite motion or equipment delay measurements. The ATS-3 satellite with its two C-band transponder channels helps solve these problems through techniques for synchronization to accuracies of tenths of microseconds. Portable cesium clocks were used to verify the accuracy of the described system.

Mazur, W. E., Jr.↗

Dual Event Generator (dual-evg) v1.0

The dual event generator is a event-based timing system implementation capable of synchronizing (with respect to clock, events and triggers) hundreds of downstreams devices. This has been in use by ALS for many years and this is a similar implementation, but with a synchronized dual-master frequency , as opposed to just one in a more conventional approach.

Russo, Lucas↗

Timing subsystem development: Network synchronization experiments

This paper describes a program in which several experimental timing subsystem prototypes were designed, fabricated, and field tested using a small network of troposcatter and microwave digital communication links. This equipment was responsible for modem/radio interfacing, time interval measurement, clock adjustment and distribution, synchronization technique, and node to node information exchange. Presented are discussions of the design approach, measurement plan, and performance assessment methods. Recommendations are made based on the findings of the test program and an evaluation of the design of both the hardware and software elements of the timing subsystem prototypes.

Backe, K. R.↗