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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 271 records · Page 15
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

B-ISBN Onboard Processing Fast Packet Switch Developed

Future satellite communications applications will require a packet-switched onboard satellite processing system to route packets at very high speeds from uplink beams to different downlink beams. The rapid emergence of point-to-multipoint services, and the important role of satellites in a national and global information infrastructure, makes the multicast function essential to a fast packet switch (FPS). NASA Lewis Research Center's Digital System Technology Branch has been studying possible architectures for high-speed onboard-processing satellite systems. As part of this research, COMSAT Laboratories developed a broadband integrated services digital network (B-ISDN) fast packet switch for Lewis that was delivered on December 1994. The fast packet switch consists of eight inputs and eight outputs that can receive and transmit data, respectively, at a rate of 155 Mbps. The switch features multiple priorities (three) and multiple-size (three) satellite virtual cells that are similar to ATM cells in length (52 bytes). In addition, the fast packet switch features a congestion-control algorithm that allows users to set different thresholds for individual destination ports, thus throttling back the traffic from the transmitting port.

Source record↗
NASA NTRS2005

Ka-Band, MEMS Switched Line Phase Shifters Implemented in Finite Ground Coplanar Waveguide

Ka-band MEMS switched line phase shifters implemented in finite ground coplanar waveguide are described in this paper. The phase shifters are constructed of single-pole double-throw (SPDT) switches with additional reference and phase offset transmission line lengths. The one- and two-bit phase shifters are fabricated on high resistivity (HR) silicon with a dielectric constant, Epsilon(sub T) = 11.7 and a substrate thickness, t = 500microns. The switching architectures integrated within the phase shifters consist of MEMS switches that are doubly anchored cantilever beam capacitive switches with additional high inductive sections (MEMS LC device). The SPDT switch is composed of a T-junction with a MEMS LC device at each output port. The one-bit phase shifter described in this paper has an insertion loss (IL) and return loss (RL) of 0.9 dB and 30 dB while the two-bit described has an IL and RL of 1.8 dB and 30 dB respectively. The one-bit phase shifter's designed offset phase is 22.5deg and actual measured phase shift is 21.8deg. The two-bit phase shifter's designed offset phase is 22.5deg, 45deg, and 67.5deg and the actual measured phase shifts are 21.4deg, 44.2deg, and 65.8deg, respectively.

Scardelletti, Maximilian C.↗
NASA NTRS2008

Circuit with a Switch for Charging a Battery in a Battery Capacitor Circuit

A circuit for charging a battery combined with a capacitor includes a power supply adapted to be connected to the capacitor, and the battery. The circuit includes an electronic switch connected to the power supply. The electronic switch is responsive to switch between a conducting state to allow current and a non-conducting state to prevent current flow. The circuit includes a control device connected to the switch and is operable to generate a control signal to continuously switch the electronic switch between the conducting and non-conducting states to charge the battery.

Stuart, Thomas A.↗
NASA NTRS2009

MEMS switches having non-metallic crossbeams

A RF MEMS switch comprising a crossbeam of SiC, supported by at least one leg above a substrate and above a plurality of transmission lines forming a CPW. Bias is provided by at least one layer of metal disposed on a top surface of the SiC crossbeam, such as a layer of chromium followed by a layer of gold, and extending beyond the switch to a biasing pad on the substrate. The switch utilizes stress and conductivity-controlled non-metallic thin cantilevers or bridges, thereby improving the RF characteristics and operational reliability of the switch. The switch can be fabricated with conventional silicon integrated circuit (IC) processing techniques. The design of the switch is very versatile and can be implemented in many transmission line mediums.

Scardelletti, Maximillian C↗
NASA NTRS2011

MOSFET Switching Circuit Protects Shape Memory Alloy Actuators

A small-footprint, full surface-mount-component printed circuit board employs MOSFET (metal-oxide-semiconductor field-effect transistor) power switches to switch high currents from any input power supply from 3 to 30 V. High-force shape memory alloy (SMA) actuators generally require high current (up to 9 A at 28 V) to actuate. SMA wires (the driving element of the actuators) can be quickly overheated if power is not removed at the end of stroke, which can damage the wires. The new analog driver prevents overheating of the SMA wires in an actuator by momentarily removing power when the end limit switch is closed, thereby allowing complex control schemes to be adopted without concern for overheating. Either an integral pushbutton or microprocessor-controlled gate or control line inputs switch current to the actuator until the end switch line goes from logic high to logic low state. Power is then momentarily removed (switched off by the MOSFET). The analog driver is suited to use with nearly any SMA actuator.

Gummin, Mark A.↗
NASA NTRSDate not supplied

Asymmetric Flow State Switching in the Space Launch System Block 2 Liftoff Environment

An in-depth investigation was conducted at the NASA Langley Research Center 14- by 22-Foot Subsonic Tunnel to evaluate flow state switching in the liftoff flow environment of the Space Launch System Block 2 Crew launch vehicle using force measurements, two-component particle image velocimetry, and tuft flow visualization. Multimodal flow states were observed in the gap flow between the centerbody and solid rocket boosters at a range of incoming flow angles and were characterized for the relative strength of state switches. When flow switches occur, the flow is predominantly bimodal, but trimodal flow states are observed with the launch tower downstream of the vehicle. Tuft visualization indicates three-dimensionality during flow state switching, which initiates at one part of the gap and quickly transitions throughout the length of the booster. Due to the long time scales between switches, statistics such as frequency of flow state switches and converged state probabilities cannot be established without significantly increased acquisition times.

Lee J. Mears↗
NASA NTRSDate not supplied

Asymmetric Flow State Switching on the Space Launch System (SLS) Block 2 Crew Vehicle

An in-depth investigation was conducted at the NASA Langley Research Center 14- by 22-Foot Subsonic Tunnel to evaluate flow state switching in the liftoff flow environment of the Space Launch System Block 2 Crew launch vehicle using side force measurements, two-component particle image velocimetry, and tufts flow visualization. Multimodal flow states were observed in the gap flow between the centerbody and solid rocket boosters at a range of incoming flow angles and were characterized for the relative strength of state switches. When flow switches occur, the flow is predominantly bimodal, but trimodal flow states are observed with the launch tower downstream of the vehicle. Tufts visualization indicates three-dimensionality during flow state switching, which initiates at one part of the gap and quickly transitions throughout the length of the booster. Due to the long time scales between switches, statistics such as frequency of flow state switches and converged state probabilities cannot be established without significantly increased acquisition times.

Lee J. Mears↗
DOE OSTI2016

Method and system for a gas tube switch-based voltage source high voltage direct current transmission system

A voltage source converter based high-voltage direct-current (HVDC) transmission system includes a voltage source converter (VSC)-based power converter channel. The VSC-based power converter channel includes an AC-DC converter and a DC-AC inverter electrically coupled to the AC-DC converter. The AC-DC converter and a DC-AC inverter include at least one gas tube switching device coupled in electrical anti-parallel with a respective gas tube diode. The VSC-based power converter channel includes a commutating circuit communicatively coupled to one or more of the at least one gas tube switching devices. The commutating circuit is configured to "switch on" a respective one of the one or more gas tube switching devices during a first portion of an operational cycle and "switch off" the respective one of the one or more gas tube switching devices during a second portion of the operational cycle.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2019

Rotating switching strategy for power converters

Systems and methods for operating a power converter with a plurality of inverter blocks with silicon carbide MOSFETs are provided. A DC to AC converter can include a plurality of inverter blocks. Each inverter block can include a plurality of switching devices. A control method can include identifying one of a plurality of switching patterns for operation of the inverter block for each inverter block. Each switching pattern can include a plurality of switching commands. The control method can further include controlling each inverter block based on the identified switching pattern for the inverter block. The control method can further include rotating the switching patterns among the plurality of inverter blocks.

Dong, Dong↗
DOE OSTI2019

Converter with phase-offset switching

Various examples are directed to electrical converters and systems for operating the same. An electrical converter may comprise a first converter module configured to receive a first direct current (DC) input and provide a first output. The first converter module may comprise a first switch modulated according to a first switch control signal. A second converter module may be configured to receive a second DC input and provide a second output. The second converter module may be connected in series with the first converter module. The second converter module may comprise a second switch modulated according to a second switch control signal. A phase of the first switch control signal may be offset from a phase of the second switch control signal by a first phase offset.

Bhowmik, Shibashis↗
DOE OSTI2021

Three-phase, three-level inverters and methods for performing soft switching with phase synchronization

A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2021

Soft-switching voltage-edge-rate-limiting power inverter

An auxiliary resonant soft-edge pole inverter circuit is provided. The power inverter circuitry may include a first pair of capacitors in parallel with a corresponding pair of main power switching modules, each power switching module comprising a switch and a diode in parallel and sharing a common central node with the first pair of capacitors. The power inverter circuit may further include a first pair of auxiliary switches connected in series with a first pair of inductors, respectively, to generate resonant current from a DC power source, the first pair of inductors also sharing the common central node. The power inverter circuitry may further include a second pair of auxiliary switches connected in series with a second pair of capacitors, respectively, the second pair of auxiliary switches also sharing the common central node, the circuit producing an alternating current output at the common central node.

Wasynczuk, Oleg↗
DOE OSTI2022

Drivers for paralleled semiconductor switches

An apparatus includes a plurality of parallel-connected semiconductor switches (e.g., silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) or other wide-bandgap semiconductor switches) and a plurality of driver circuits having outputs configured to be coupled to control terminals of respective ones of the plurality of semiconductor switches and configured to drive the parallel-connected semiconductor switches responsive to a common switch state control signal. The driver circuits may have respective different power supplies, which may be adjustable. Respective output resistors may couple respective ones of the driver circuits to respective ones of the semiconductor switches. The output resistors may be adjustable.

Nojima, Geraldo↗
DOE OSTI2021

Operando characterization of conductive filaments during resistive switching in Mott VO 2

Significance To perform hardware-based neuromorphic computing, novel materials exhibiting a wide variety of electronic properties are currently being explored. VO 2 is well known to exhibit an insulator-to-metal transition as well as volatile resistive switching. Many questions regarding the basic mechanism of the nonvolatile switching in this material are unanswered. In this work, the formation and relaxation of conductive filaments through nonvolatile resistive switching in VO 2 devices have been realized. The V 5 O 9 Magnéli phase conductive filament has been identified. Our results demonstrate that both resistive switching behaviors can be achieved in a single material, crucial for future technology like resistive switching memories or neuromorphic logic.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2024

PWM for Simultaneous Minimization of Switching Losses and CM Voltage in Current Source Inverters

This article proposes a new pulsewidth modulation (PWM) scheme that reduces common-mode (CM) voltage and switching losses simultaneously in CSI. The proposed PWM [i.e., reduced voltages PWM (RVM)] reduces CM voltages and switching losses by selecting the optimal zero current vector and PWM sequence based on the CSI output voltage conditions. This article also proves the proposed RVM achieves both objectives (i.e., reduced CM voltage and switching losses) simultaneously for all CSI operating conditions without compromising the other objective. The proposed RVM inherently achieves zero-voltage switching (ZVS) conditions during the zero current vector transitions, further reducing the switching losses. Experimental results demonstrate significant reductions in CM voltage, reaching up to approximately 95%, accompanied by an increase of up to about 5.5% in CSI efficiency across a wide operating range compared to alternative PWM methods, confirming the predicted advantages of the proposed RVM.

42 ENGINEERING↗
DOE OSTI2025

Design and Commission of Solid State Switch Driver in SLAC Subbooster Modulator

The LINAC sub-booster modulator is a pulsed power supply to provide a 30kV pulse to drive a klystron in SLAC LINAC. It has utilized vacuum tetrode as pulse switch for more than 60 years. With the vacuum tetrode availability becoming less and its cost surging, a natural choice is to use solid state switch in this pulsed power modulator. To commission solid state switch in LINAC sub-booster modulator, a driver board is designed to drive a BEHLKE HTS-LC2 series MOSFET based switches. The design concept and some concerns in design will be presented. The driver board is universal for all HTS-LC2 series switches because they share the same driver signals and connections. After the driver is commissioned, two AI systems are introduced to design one core part of the driver, the results are presented here. During the commission of the driver board in the LINAC sub-booster modulators, some problems happened and were addressed.

AI Circuit Design↗
DOE OSTI2023

PV Inverter Systems Enabled by Monolithically Integrated SiC based Four Quadrant Power Switch (4-QPS) [BiDFET]

The purpose of this project was to develop a new breed of Power Conversion Systems (PCS) for PV integration that is enabled by the newly developed 4-Quadrant Single Die SiC Power Semiconductor Switches (4-QPS) or also referred to as “Bidirectional FET (BIDFET)”. This work includes semiconductor die development, advanced packaging, converter design, development, and testing of 4-QPS enabled hardware prototypes at 1 kW (for single phase residential application) and 10 kW (for three phase commercial application). The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Reliability Improvement and Effective Switching Layer Model of Thin-Film MoS 2 Memristors

2D memristors have demonstrated attractive resistive switching characteristics recently but also suffer from the reliability issue, which limits practical applications. Previous efforts on 2D memristors have primarily focused on exploring new material systems, while damage from the metallization step remains a practical concern for the reliability of 2D memristors. Here, the impact of metallization conditions and the thickness of MoS 2 films on the reliability and other device metrics of MoS 2 -based memristors is carefully studied. The statistical electrical measurements show that the reliability can be improved to 92% for yield and improved by ≈16× for average DC cycling endurance in the devices by reducing the top electrode (TE) deposition rate and increasing the thickness of MoS 2 films. Intriguing convergence of switching voltages and resistance ratio is revealed by the statistical analysis of experimental switching cycles. An “effective switching layer” model compatible with both monolayer and few-layer MoS 2 , is proposed to understand the reliability improvement related to the optimization of fabrication configuration and the convergence of switching metrics. In conclusion, the Monte Carlo simulations help illustrate the underlying physics of endurance failure associated with cluster formation and provide additional insight into endurance improvement with device fabrication optimization.

36 MATERIALS SCIENCE↗