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At least 271 records · Page 15
All sourcesNASA NTRSDOE OSTI
NASA NTRS2000

Radio Frequency (RF) Micro-Electromechanical Systems (MEMS) Switches for Space Communications

Micro-electromechanical systems (MEMS) is an emerging technology for radio frequency (RF) systems because it has the potential to dramatically decrease loss and improve efficiency. In this paper, we address the design and fabrication of novel MEMS switches being developed at NASA Glenn Research Center. Two types of switches are being developed: a microstrip series single pole single throw (SPST) switch and a coplanar waveguide (CPW) series SPST and single pole double throw (SPDT) switches. These are being fabricated as an integral part of 50 Ohm microstrip and CPW RF integrated circuits using microfabrication techniques. The construction of the switch relies on a cantilever beam that is partially supported by a dielectric post. The cantilever beam is electro-magnetically actuated. To decrease stiction, a Si3N4 thin film is deposited over the contact area. Thus, when the switch is closed, the ON-state insertion loss is governed by the parallel plate capacitance formed by the two contacts. The isolation in the OFF-state is governed by the parasitic capacitance when the cantilever is in the up position. RF MEMS switches have been demonstrated with 80% lower insertion loss than conventional solid state devices (GaAs Metal Semiconductor Field Effect Transistors (MESFETs) and Silicon PIN diodes) based switches. For example, a conventional GaAs five-bit phase shifter which is required for beam steering in a phased array antenna has approximately 7 dB of insertion loss at 26.5 GHz where as a comparable MEMS based phase shifter is expected to have only 2 dB of insertion loss. This translates into 56% lower power dissipation and therefore decreases the thermal load on the spacecraft and also reduces the power amplifier requirements. These benefits will enable NASA to build the next generation of deep space science crafts and micro/nano satellites.

Simons, Rainee N.↗
NASA NTRS1999

Electrically-Tunable Group Delays Using Quantum Wells in a Distributed Bragg Reflector

There is a growing interest in the fabrication of semiconductor optical group delay lines for the development of phased arrays of Vertical-Cavity Surface-Emitting Lasers (VCSELs). We present a novel structure incorporating In(x)GA(1-x)As quantum wells in the GaAs quarter-wave layers of a GaAs/AlAs distributed Bragg reflector (DBR). Application of an electric field across the quantum wells leads to red shifting and peak broadening of the el-hhl exciton peak via the quantum-confined Stark effect. Resultant changes in the index of refraction thereby provide a means for altering the group delay of an incident laser pulse. We discuss the tradeoffs between the maximum amount of change in group delay versus absorption losses for such a device. We also compare a simple theoretical model to experimental results, and discuss both angle and position tuning of the BDR band edge resonance relative to the exciton absorption peak. The advantages of such monolithically grown devices for phased-array VCSEL applications will be detailed.

Nelson, Thomas R., Jr.↗
NASA NTRS2006

NASA Solar Array Demonstrates Commercial Potential

A state-of-the-art solar-panel array demonstration site at NASA's Dryden Flight Research Center provides a unique opportunity for studying the latest in high-efficiency solar photovoltaic cells. This five-kilowatt solar-array site (see Figure 1) is a technology-transfer and commercialization success for NASA. Among the solar cells at this site are cells of a type that was developed in Dryden Flight Research Center s Environmental Research Aircraft and Sensor Technology (ERAST) program for use in NASA s Helios solar-powered airplane. This cell type, now denoted as A-300, has since been transferred to SunPower Corporation of Sunnyvale, California, enabling mass production of the cells for the commercial market. High efficiency separates these advanced cells from typical previously commercially available solar cells: Whereas typical previously commercially available cells are 12 to 15 percent efficient at converting sunlight to electricity, these advanced cells exhibit efficiencies approaching 23 percent. The increase in efficiency is due largely to the routing of electrical connections behind the cells (see Figure 2). This approach to increasing efficiency originated as a solution to the problem of maximizing the degree of utilization of the limited space available atop the wing of the Helios airplane. In retrospect, the solar cells in use at this site could be used on Helios, but the best cells otherwise commercially available could not be so used, because of their lower efficiencies. Historically, solar cells have been fabricated by use of methods that are common in the semiconductor industry. One of these methods includes the use of photolithography to define the rear electrical-contact features - diffusions, contact openings, and fingers. SunPower uses these methods to produce the advanced cells. To reduce fabrication costs, SunPower continues to explore new methods to define the rear electrical-contact features. The equipment at the demonstration site includes two fixed-angle solar arrays and one single-axis Sun-tracking array. One of the fixed arrays contains typical less-efficient commercial solar cells and is being used as a baseline for comparison of the other fixed array, which contains the advanced cells. The Sun-tracking array tilts to follow the Sun, using an advanced, real-time tracking device rather than customary pre-programmed mechanisms. Part of the purpose served by the demonstration is to enable determination of any potential advantage of a tracking array over a fixed array. The arrays are monitored remotely on a computer that displays pertinent information regarding the functioning of the arrays.

Creech, Gray↗
NASA NTRS2005

In Situ Electrochemical Deposition of Microscopic Wires

A method of fabrication of wires having micron and submicron dimensions is built around electrochemical deposition of the wires in their final positions between electrodes in integrated circuits or other devices in which the wires are to be used. Heretofore, nanowires have been fabricated by a variety of techniques characterized by low degrees of controllability and low throughput rates, and it has been necessary to align and electrically connect the wires in their final positions by use of sophisticated equipment in expensive and tedious post-growth assembly processes. The present method is more economical, offers higher yields, enables control of wire widths, and eliminates the need for post-growth assembly. The wires fabricated by this method could be used as simple electrical conductors or as transducers in sensors. Depending upon electrodeposition conditions and the compositions of the electroplating solutions in specific applications, the wires could be made of metals, alloys, metal oxides, semiconductors, or electrically conductive polymers. In this method, one uses fabrication processes that are standard in the semiconductor industry. These include cleaning, dry etching, low-pressure chemical vapor deposition, lithography, dielectric deposition, electron-beam lithography, and metallization processes as well as the electrochemical deposition process used to form the wires. In a typical case of fabrication of a circuit that includes electrodes between which microscopic wires are to be formed on a silicon substrate, the fabrication processes follow a standard sequence until just before the fabrication of the microscopic wires. Then, by use of a thermal SiO-deposition technique, the electrodes and the substrate surface areas in the gaps between them are covered with SiO. Next, the SiO is electron-beam patterned, then reactive-ion etched to form channels having specified widths (typically about 1 m or less) that define the widths of the wires to be formed. Drops of an electroplating solution are placed on the substrate in the regions containing the channels thus formed, then the wires are electrodeposited from the solution onto the exposed portions of the electrodes and into the channels. The electrodeposition is a room-temperature, atmospheric-pressure process. The figure shows an example of palladium wires that were electrodeposited into 1-mm-wide channels between gold electrodes.

Yun, Minhee↗
NASA NTRS1977

Properties of TiO2 thin films and a study of the TiO2-GaAs interface

Titanium dioxide (TiO2) films prepared by chemical vapor deposition were investigated in this study for the purpose of the application in the GaAs metal-insulator-semiconductor field-effect transistor. The degree of crystallization increases with the deposition temperature. The current-voltage study, utilizing an Al-TiO2-Al MIM structure, reveals that the d-c conduction through the TiO2 film is dominated by the bulk-limited Poole-Frenkel emission mechanism. The dependence of the resistivity of the TiO2 films on the deposition environment is also shown. The results of the capacitance-voltage study indicate that an inversion layer in an n-type substrate can be achieved in the MIS capacitor if the TiO2 films are deposited at a temperature higher than 275 C. A process of low temperature deposition followed by the pattern definition and a higher temperature annealing is suggested for device fabrications. A model, based on the assumption that the surface state densities are continuously distributed in energy within the forbidden band gap, is proposed to interpret the lack of an inversion layer in the Al-TiO2-GaAs MIS structure with the TiO2 films deposited at 200 C.

Chen, C. Y.↗
NASA NTRS1995

Metal colloids and semiconductor quantum dots: Linear and nonlinear optical properties

One aspect of this project involves a collaborative effort with the Solid State Division of ORNL. The thrust behind this research is to develop ion implantion for synthesizing novel materials (quantum dots wires and wells, and metal colloids) for applications in all optical switching devices, up conversion, and the synthesis of novel refractory materials. In general the host material is typically a glass such as optical grade silica. The ions of interest are Au, Ag, Cd, Se, In, P, Sb, Ga and As. An emphasis is placed on host guest interactions between the matrix and the implanted ion and how the matrix effects and implantation parameters can be used to obtain designer level optical devices tailored for specific applications. The specific materials of interest are: CdSe, CdTe, InAs, GaAs, InP, GaP, InSb, GaSb and InGaAs. A second aspect of this research program involves using porous glass (25-200 A) for fabricating materials of finite size. In this part of the program, we are particularly interested in characterizing the thermodynamic and optical properties of these non-composite materials. We also address how phase diagram of the confined material is altered by the interfacial properties between the confined material and the pore wall.

Henderson, D. O.↗
NASA NTRS2009

Evaluation of a Programmable Voltage-Controlled MEMS Oscillator, Type SiT3701, Over a Wide Temperature Range

Semiconductor chips based on MEMS (Micro-Electro-Mechanical Systems) technology, such as sensors, transducers, and actuators, are becoming widely used in today s electronics due to their high performance, low power consumption, tolerance to shock and vibration, and immunity to electro-static discharge. In addition, the MEMS fabrication process allows for the miniaturization of individual chips as well as the integration of various electronic circuits into one module, such as system-on-a-chip. These measures would simplify overall system design, reduce parts count and interface, improve reliability, and reduce cost; and they would meet requirements of systems destined for use in space exploration missions. In this work, the performance of a recently-developed MEMS voltage-controlled oscillator was evaluated under a wide temperature range. Operation of this new commercial-off-the-shelf (COTS) device was also assessed under thermal cycling to address some operational conditions of the space environment

Patterson, Richard↗
NASA NTRS1995

A 32-bit Ultrafast Parallel Correlator using Resonant Tunneling Devices

An ultrafast 32-bit pipeline correlator has been implemented using resonant tunneling diodes (RTD) and hetero-junction bipolar transistors (HBT). The negative differential resistance (NDR) characteristics of RTD's is the basis of logic gates with the self-latching property that eliminates pipeline area and delay overheads which limit throughput in conventional technologies. The circuit topology also allows threshold logic functions such as minority/majority to be implemented in a compact manner resulting in reduction of the overall complexity and delay of arbitrary logic circuits. The parallel correlator is an essential component in code division multi-access (CDMA) transceivers used for the continuous calculation of correlation between an incoming data stream and a PN sequence. Simulation results show that a nano-pipelined correlator can provide and effective throughput of one 32-bit correlation every 100 picoseconds, using minimal hardware, with a power dissipation of 1.5 watts. RTD plus HBT based logic gates have been fabricated and the RTD plus HBT based correlator is compared with state of the art complementary metal oxide semiconductor (CMOS) implementations.

Kulkarni, Shriram↗
NASA NTRS1984

Recent developments in monolithic phase-locked semiconductor laser arrays

Coherent combination of the power of several semiconductor lasers fabricated on the same substrate has been the subject of an intense research effort in recent years, the main motivation being to obtain higher power levels than those available from a single laser in a stable radiation pattern. Best results reported so far include 2.6 Watts CW emitted power and less than 1 deg far-field angle (in the array plane) in arrays where all the lasers are electrically connected in parallel. A different type of coherent array, where each element has a separate contact, has been recently demonstrated. While requiring the more complex two-level metallization technology, applying a separate contact to each laser provides an additional degree of freedom in the design and the operation of monolithic arrays. The separate contacts can be employed to tailor the near-field and far-field distributions and to compensate for device-to-device nonuniformities. Furthermore, the control of the currents of the array elements allows the performance of a variety of other functions, such as beam scanning, spectral mode control, wavelength tuning and control of the mutual coherence between array elements.

Katz, J.↗
NASA NTRS1984

Recent developments in monolithic phase-locked semiconductor laser arrays

Coherent combination of the power of several semiconductor lasers fabricated on the same substrate has been the subject of an intense research effort in recent years, the main motivation being to obtain higher power levels than those available from a single laser in a stable radiation pattern. Best results reported so far include 2.6 watts CW emitted power and less than 1 deg far-field angle (in the array plane) in arrays where all the lasers are electrically connected in parallel. A different type of coherent array, where each element has a separate contact, has been recently demonstrated. While requiring the more complex two-level metallization technology, applying a separate contact to each laser provides an additional degree of freedom in the design and the operation of monolithic arrays. The separate contacts can be employed to tailor the near-field and far-field distributions and to compensate for device-to-device nonuniformities. Furthermore, the control of the currents of the array elements allows the performance of a variety of other functions, such as beam scanning, spectral mode control, wavelength tuning and control of the mutual coherence between array elements.

Katz, J.↗
NASA NTRS1995

Silicon Micromachined Sensor for Broadband Vibration Analysis

The development of a family of silicon based integrated vibration sensors capable of sensing mechanical resonances over a broad range of frequencies with minimal signal processing requirements is presented. Two basic general embodiments of the concept were designed and fabricated. The first design was structured around an array of cantilever beams and fabricated using the ARPA sponsored multi-user MEMS processing system (MUMPS) process at the Microelectronics Center of North Carolina (MCNC). As part of the design process for this first sensor, a comprehensive finite elements analysis of the resonant modes and stress distribution was performed using PATRAN. The dependence of strain distribution and resonant frequency response as a function of Young's modulus in the Poly-Si structural material was studied. Analytical models were also studied. In-house experimental characterization using optical interferometry techniques were performed under controlled low pressure conditions. A second design, intended to operate in a non-resonant mode and capable of broadband frequency response, was proposed and developed around the concept of a cantilever beam integrated with a feedback control loop to produce a null mode vibration sensor. A proprietary process was used to integrat a metal-oxide semiconductor (MOS) sensing device, with actuators and a cantilever beam, as part of a compatible process. Both devices, once incorporated as part of multifunction data acquisition and telemetry systems will constitute a useful system for NASA launch vibration monitoring operations. Satellite and other space structures can benefit from the sensor for mechanical condition monitoring functions.

Gutierrez, Adolfo↗
NASA NTRS2013

Fast, Large-Area, Wide-Bandgap UV Photodetector for Cherenkov Light Detection

Due to limited resources available for power and space for payloads, miniaturizing and integrating instrumentation is a high priority for addressing the challenges of manned and unmanned deep space missions to high Earth orbit (HEO), near Earth objects (NEOs), Lunar and Martian orbits and surfaces, and outer planetary systems, as well as improvements to high-altitude aircraft safety. New, robust, and compact detectors allow future instrumentation packages more options in satisfying specific mission goals. A solid-state ultraviolet (UV) detector was developed with a theoretical fast response time and large detection area intended for application to Cherenkov detectors. The detector is based on the wide-bandgap semiconductor zinc oxide (ZnO), which in a bridge circuit can detect small, fast pulses of UV light like those required for Cherenkov detectors. The goal is to replace the role of photomultiplier tubes in Cherenkov detectors with these solid-state devices, saving on size, weight, and required power. For improving detection geometry, a spherical detector to measure high atomic number and energy (HZE) ions from any direction has been patented as part of a larger space radiation detector system. The detector will require the development of solid-state UV photodetectors fast enough (2 ns response time or better) to detect the shockwave of Cherenkov light emitted as the ions pass through a quartz, sapphire, or acrylic ball. The detector must be small enough to fit in the detector system structure, but have an active area large enough to capture enough Cherenkov light from the sphere. The detector is fabricated on bulk single-crystal undoped ZnO. Inter - digitated finger electrodes and contact pads are patterned via photolithography, and formed by sputtered metal of silver, platinum, or other high-conductivity metal.

Wrbanek, John D.↗
NASA NTRS2006

A Novel, Free-Space Optical Interconnect Employing Vertical-Cavity Surface Emitting Laser Diodes and InGaAs Metal-Semiconductor-Metal Photodetectors for Gbit/s RF/Microwave Systems

Emerging technologies and continuing progress in vertical-cavity surface emitting laser (VCSEL) diode and metal-semiconductor-metal (MSM) photodetector research are making way for novel, high-speed forms of optical data transfer in communication systems. VCSEL diodes operating at 1550 nm have only recently become commercially available, while MSM photodetectors are pushing the limits of contact lithography with interdigitated electrode widths reaching sub micron levels. We propose a novel, free-space optical interconnect operating at about 1Gbit/s utilizing VCSEL diodes and MSM photodetectors. We report on development, progress, and current work, which are as follows: first, analysis of the divergent behavior of VCSEL diodes for coupling to MSM photodetectors with a 50 by 50 m active area and second, the normalized frequency response of the VCSEL diode as a function of the modulating frequency. Third, the calculated response of MSM photodetectors with varying electrode width and spacing on the order of 1 to 3 m as well as the fabrication and characterization of these devices. The work presented here will lead to the formation and characterization of a fully integrated 1Gbit/s free-space optical interconnect at 1550 nm and demonstrates both chip level and board level functionality for RF/microwave digital systems.

Savich, Gregory R.↗
NASA NTRS1995

Applications of Silicon Carbide for High Temperature Electronics and Sensors

Silicon carbide (SiC) is a wide bandgap material that shows great promise in high-power and high temperature electronics applications because of its high thermal conductivity and high breakdown electrical field. The excellent physical and electronic properties of SiC allows the fabrication of devices that can operate at higher temperatures and power levels than devices produced from either silicon or GaAs. Although modern electronics depends primarily upon silicon based devices, this material is not capable of handling may special requirements. Devices which operate at high speeds, at high power levels and are to be used in extreme environments at high temperatures and high radiation levels need other materials with wider bandgaps than that of silicon. Many space and terrestrial applications also have a requirement for wide bandgap materials. SiC also has great potential for high power and frequency operation due to a high saturated drift velocity. The wide bandgap allows for unique optoelectronic applications, that include blue light emitting diodes and ultraviolet photodetectors. New areas involving gas sensing and telecommunications offer significant promise. Overall, the properties of SiC make it one of the best prospects for extending the capabilities and operational regimes of the current semiconductor device technology.

Silicon Carbide↗
NASA NTRS1991

Silicon dioxide with a silicon interfacial layer as an insulating gate for highly stable indium phosphide metal-insulator-semiconductor field effect transistors

A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution X-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2-V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3 percent in 10,000 sec, as compared to 15-18 percent drift in 10,000 sec for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/mm gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24 percent power added efficiency.

Kapoor, V. J.↗
NASA NTRS2002

Ordered nanoparticle arrays formed on engineered chaperonin protein templates

Traditional methods for fabricating nanoscale arrays are usually based on lithographic techniques. Alternative new approaches rely on the use of nanoscale templates made of synthetic or biological materials. Some proteins, for example, have been used to form ordered two-dimensional arrays. Here, we fabricated nanoscale ordered arrays of metal and semiconductor quantum dots by binding preformed nanoparticles onto crystalline protein templates made from genetically engineered hollow double-ring structures called chaperonins. Using structural information as a guide, a thermostable recombinant chaperonin subunit was modified to assemble into chaperonins with either 3 nm or 9 nm apical pores surrounded by chemically reactive thiols. These engineered chaperonins were crystallized into two-dimensional templates up to 20 microm in diameter. The periodic solvent-exposed thiols within these crystalline templates were used to size-selectively bind and organize either gold (1.4, 5 or 10nm) or CdSe-ZnS semiconductor (4.5 nm) quantum dots into arrays. The order within the arrays was defined by the lattice of the underlying protein crystal. By combining the self-assembling properties of chaperonins with mutations guided by structural modelling, we demonstrate that quantum dots can be manipulated using modified chaperonins and organized into arrays for use in next-generation electronic and photonic devices.

Chaperonins/chemistry/ultrastructure↗
NASA NTRS1994

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

Sewell, James S.↗
NASA NTRS2010

Biasable, Balanced, Fundamental Submillimeter Monolithic Membrane Mixer

This device is a biasable, submillimeter-wave, balanced mixer fabricated using JPL s monolithic membrane process a simplified version of planar membrane technology. The primary target application is instrumentation used for analysis of atmospheric constituents, pressure, temperature, winds, and other physical and chemical properties of the atmospheres of planets and comets. Other applications include high-sensitivity gas detection and analysis. This innovation uses a balanced configuration of two diodes allowing the radio frequency (RF) signal and local oscillator (LO) inputs to be separated. This removes the need for external diplexers that are inherently narrowband, bulky, and require mechanical tuning to change frequency. Additionally, this mixer uses DC bias-ability to improve its performance and versatility. In order to solve problems relating to circuit size, the GaAs membrane process was created. As much of the circuitry as possible is fabricated on-chip, making the circuit monolithic. The remainder of the circuitry is precision-machined into a waveguide block that holds the GaAs circuit. The most critical alignments are performed using micron-scale semiconductor technology, enabling wide bandwidth and high operating frequencies. The balanced mixer gets superior performance with less than 2 mW of LO power. This can be provided by a simple two-stage multiplier chain following an amplifier at around 90 GHz. Further, the diodes are arranged so that they can be biased. Biasing pushes the diodes closer to their switching voltage, so that less LO power is required to switch the diodes on and off. In the photo, the diodes are at the right end of the circuit. The LO comes from the waveguide at the right into a reduced-height section containing the diodes. Because the diodes are in series to the LO signal, they are both turned on and off simultaneously once per LO cycle. Conversely, the RF signal is picked up from the RF waveguide by the probe at the left, and flows rightward to the diodes. Because the RF is in a quasi- TEM (suspended, microstrip-like) mode, it impinges on the diodes in an anti-parallel mode that does not couple to the waveguide mode. This isolates the LO and RF signals. This operation is similar to a cross-bar mixer used at low frequencies, except the RF signal enters through the back-short end of the waveguide rather than through the side. The RF probe also conveys the down-converted intermediate frequency (IF) signal out to an off-chip circuit board through a simple LC low-pass filter to the left as indicated. The bias is brought to the diodes through a bypass capacitor at the top.

Siegel, Peter↗