128 x 128 CMOS Photodiode-Type Active Pixel Sensor with On-Chip Timing, Control and Signal
A 128 x 128 element CMOS active pixel image sensor (APS) with on-chip timing, control, and.
CMS Photodiode↗
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Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology
A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.
Space Microelectronics Image Sensors APS Digital I↗
Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology
A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.
Space Microelectronics Image Sensors APS Digital I↗
High-Density Vertical Bloch Line Data Storage Chips for Small Satellite Applications
Vertical Bloch Line storage is an emerging technology which has the potential for offering a number of desired data storage attributes in a single chip for space and commercial applications.
Vertical Bloch Line high areal storage density rap↗
Design of a Low-Light-Level Image Sensor with On-Chip Sigma-Delta Analog-to- Digital Conversion
The design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometer CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 x 128 array of active pixels at a 50 micrometer pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta (Sigma-Delta) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi-parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e^- rms noise performance.
Mendis, Sunetra K.↗
MEMS based sun sensor on a chip
A prototype sun sensor has been developed. The accuracy of the MEMS based sun sensor on a chip is estimated to be 1 arcminute.
MEMS sun sensor APS attitude determination↗
Catastrophic Fault Recovery with Self-Reconfigurable Chips
Mission critical systems typically employ multi-string redundancy to cope with possible hardware failure. Such systems are only as fault tolerant as there are many redundant strings. Once a particular critical component exhausts its redundant spares, the multi-string architecture cannot tolerate any further hardware failure. This paper aims at addressing such catastrophic faults through the use of 'Self-Reconfigurable Chips' as a last resort effort to 'repair' a faulty critical component.
fault tolerance↗
Near Field Radiation Characteristics of Implantable Square Spiral Chip Inductor Antennas for Bio-Sensors
The near field radiation characteristics of implantable Square Spiral Chip Inductor Antennas (SSCIA) for Bio-Sensors have been measured. Our results indicate that the measured near field relative signal strength of these antennas agrees with simulated results and confirm that in the near field region the radiation field is fairly uniform in all directions. The effects of parameters such as ground-plane, number of turns and microstrip-gap width on the performance of the SSCIA are presented. Furthermore, the SSCIA antenna with serrated ground plane produce a broad radiation pattern, with a relative signal strength detectable at distances within the range of operation of hand-held devices for self-diagnosis.
Nessel, James A.↗
Effect of Mechanical Stresses on Characteristics of Chip Tantalum Capacitors
The effect of compressive mechanical stresses on chip solid tantalum capacitors is investigated by monitoring characteristics of different part types under axial and hydrostatic stresses. Depending on part types, an exponential increase of leakage currents was observed when stresses exceeded 10 MPa to 40 MPa. For the first time, reversible variations of leakage currents (up to two orders of magnitude) with stress have been demonstrated. Mechanical stresses did not cause significant changes of AC characteristics of the capacitors, whereas breakdown voltages measured during the surge current testing decreased substantially indicating an increased probability of failures of stressed capacitors in low impedance applications. Variations of leakage currents are explained by a combination of two mechanisms: stress-induced scintillations and stress-induced generation of electron traps in the tantalum pentoxide dielectric.
Teverovsky, Alexander A.↗
Single chip camera device having double sampling operation
A single chip camera device is formed on a single substrate including an image acquisition portion for control portion and the timing circuit formed on the substrate. The timing circuit also controls the photoreceptors in a double sampling mode in which are reset level is first read and then after an integration time a charged level is read.
Fossum, Eric R.↗
Fiber optic to integrated optical chip coupler
Optical fibers are clamped by a block onto a substrate. Thereupon, metal is plated over the fibers to hold them in place upon the substrate. The clamp block is removed and the opening, resulting from the clamp block's presence, is then plated in. The built-up metallic body is a coupling which holds the fibers in position so that the ends can be polished for coupling to an integrated optical chip upon a coupling fixture.
Pikulski, Joseph I.↗
Sensor chip and apparatus for tactile and/or flow sensing
A sensor chip, comprising a flexible, polymer-based substrate, and at least one microfabricated sensor disposed on the substrate and including a conductive element. The at least one sensor comprises at least one of a tactile sensor and a flow sensor. Other embodiments of the present invention include sensors and/or multi-modal sensor nodes.
Liu, Chang↗
Lab-on-a-Chip: From Astrobiology to the International Space Station
The continual and long-term habitation of enclosed environments, such as Antarctic stations, nuclear submarines and space stations, raises unique engineering, medical and operational challenges. There is no easy way out and no easy way to get supplies in. This situation elevates the importance of monitoring technology that can rapidly detect events within the habitat that affect crew safety such as fire, release of toxic chemicals and hazardous microorganisms. Traditional methods to monitor microorganisms on the International Space Station (ISS) have consisted of culturing samples for 3-5 days and eventual sample return to Earth. To augment these culture methods with new, rapid molecular techniques, we developed the Lab-on-a-Chip Application Development - Portable Test System (LOCAD-PTS). The system consists of a hand-held spectrophotometer, a series of interchangeable cartridges and a surface sampling/dilution kit that enables crew to collect samples and detect a range of biological molecules, all within 15 minutes. LOCAD-PTS was launched to the ISS aboard Space Shuttle Discovery in December 2006, where it was operated for the first time during March-May 2007. The surfaces of five separate sites in the US Lab and Node 1 of ISS were analyzed for endotoxin, using cartridges that employ the Limulus Amebocyte Lysate (LAL) assay; results of these tests will be presented. LOCAD-PTS will remain permanently onboard ISS with new cartridges scheduled for launch in February and October of 2008 for the detection of fungi (Beta-glucan) and Gram-positive bacteria (lipoteichoic acid), respectively.
Maule, Jake↗
Apparatus and methods for packaging integrated circuit chips with antenna modules providing closed electromagnetic environment for integrated antennas
Apparatus and methods are provided for packaging IC chips together with integrated antenna modules designed to provide a closed EM (electromagnetic) environment for antenna radiators, thereby allowing antennas to be designed independent from the packaging technology.
Gaucher, Brian P.↗
Scintillation Breakdowns in Chip Tantalum Capacitors
Scintillations in solid tantalum capacitors are momentarily local breakdowns terminated by a self-healing or conversion to a high-resistive state of the manganese oxide cathode. This conversion effectively caps the defective area of the tantalum pentoxide dielectric and prevents short-circuit failures. Typically, this type of breakdown has no immediate catastrophic consequences and is often considered as nuisance rather than a failure. Scintillation breakdowns likely do not affect failures of parts under surge current conditions, and so-called "proofing" of tantalum chip capacitors, which is a controllable exposure of the part after soldering to voltages slightly higher than the operating voltage to verify that possible scintillations are self-healed, has been shown to improve the quality of the parts. However, no in-depth studies of the effect of scintillations on reliability of tantalum capacitors have been performed so far. KEMET is using scintillation breakdown testing as a tool for assessing process improvements and to compare quality of different manufacturing lots. Nevertheless, the relationship between failures and scintillation breakdowns is not clear, and this test is not considered as suitable for lot acceptance testing. In this work, scintillation breakdowns in different military-graded and commercial tantalum capacitors were characterized and related to the rated voltages and to life test failures. A model for assessment of times to failure, based on distributions of breakdown voltages, and accelerating factors of life testing are discussed.
Teverovsky, Alexander↗
A One Chip Hardened Solution for High Speed SpaceWire System Implementations. Session: Components
An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASIC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a router with 4 SpaceWire ports and two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, and a memory controller for additional external memory use. The SpaceWire cores are also reused in other ASICs under development. The SpaceWire ASIC is planned for use on the Geostationary Operational Environmental Satellites (GOES)-R, the Lunar Reconnaissance Orbiter (LRO) and other missions. Engineering and flight parts have been delivered to programs and users. This paper reviews the SpaceWire protocol and those elements of it that have been built into the current and next SpaceWire reusable cores and features within the core that go beyond the current standard and can be enabled or disabled by the user. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be reviewed and highlighted. Optional configurations within user systems and test boards will be shown. The physical implementation of the design will be described and test results from the hardware will be discussed. Application of this ASIC and other ASICs containing the SpaceWire cores and embedded microcontroller to Plug and Play and reconfigurable implementations will be described. Finally, the BAE Systems roadmap for SpaceWire developments will be updated, including some products already in design as well as longer term plans.
Marshall, Joseph R.↗
Astable Oscillator Circuits using Silicon-on-Insulator Timer Chip for Wide Range Temperature Sensing
Two astable oscillator circuits were constructed using a new silicon-on-insulator (SOI) 555 timer chip for potential use as a temperature sensor in harsh environments encompassing jet engine and space mission applications. The two circuits, which differed slightly in configuration, were evaluated between -190 and 200 C. The output of each circuit was made to produce a stream of rectangular pulses whose frequency was proportional to the sensed temperature. The preliminary results indicated that both circuits performed relatively well over the entire test temperature range. In addition, after the circuits were subjected to limited thermal cycling over the temperature range of -190 to 200 C, the performance of either circuit did not experience any significant change.
Patterson, Richard L.↗
T/R Multi-Chip MMIC Modules for 150 GHz
Modules containing multiple monolithic microwave integrated-circuit (MMIC) chips have been built as prototypes of transmitting/receiving (T/R) modules for millimeter-wavelength radar systems, including phased-array radar systems to be used for diverse purposes that could include guidance and avoidance of hazards for landing spacecraft, imaging systems for detecting hidden weapons, and hazard-avoidance systems for automobiles. Whereas prior landing radar systems have operated at frequencies around 35 GHz, the integrated circuits in this module operate in a frequency band centered at about 150 GHz. The higher frequency (and, hence, shorter wavelength), is expected to make it possible to obtain finer spatial resolution while also using smaller antennas and thereby reducing the sizes and masses of the affected systems.
Samoska, Lorene A.↗