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At least 271 records · Page 15

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NASA NTRS1990

Verifying an interactive consistency circuit: A case study in the reuse of a verification technology

The work done at ORA for NASA-LRC in the design and formal verification of a hardware implementation of a scheme for attaining interactive consistency (byzantine agreement) among four microprocessors is presented in view graph form. The microprocessors used in the design are an updated version of a formally verified 32-bit, instruction-pipelined, RISC processor, MiniCayuga. The 4-processor system, which is designed under the assumption that the clocks of all the processors are synchronized, provides software control over the interactive consistency operation. Interactive consistency computation is supported as an explicit instruction on each of the microprocessors. An identical user program executing on each of the processors decides when and on what data interactive consistency must be performed. This exercise also served as a case study to investigate the effectiveness of reusing the technology which was developed during the MiniCayuga effort for verifying synchronous hardware designs. MiniCayuga was verified using the verification system Clio which was also developed at ORA. To assist in reusing this technology, a computer-aided specification and verification tool was developed. This tool specializes Clio to synchronous hardware designs and significantly reduces the tedium involved in verifying such designs. The tool is presented and how it was used to specify and verify the interactive consistency circuit is described.

Bickford, Mark↗

NASA NTRS1991

The formal verification of generic interpreters

The task assignment 3 of the design and validation of digital flight control systems suitable for fly-by-wire applications is studied. Task 3 is associated with formal verification of embedded systems. In particular, results are presented that provide a methodological approach to microprocessor verification. A hierarchical decomposition strategy for specifying microprocessors is also presented. A theory of generic interpreters is presented that can be used to model microprocessor behavior. The generic interpreter theory abstracts away the details of instruction functionality, leaving a general model of what an interpreter does.

Windley, P.↗

NASA NTRS1993

System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

Hall, William A.↗

NASA NTRS1991

Experience with custom processors in space flight applications

The Applied Physics Laboratory (APL) has developed a magnetometer instrument for a swedish satellite named Freja with launch scheduled for August 1992 on a Chinese Long March rocket. The magnetometer controller utilized a custom microprocessor designed at APL with the Genesil silicon compiler. The processor evolved from our experience with an older bit-slice design and two prior single chip efforts. The architecture of our microprocessor greatly lowered software development costs because it was optimized to provide an interactive and extensible programming environment hosted by the target hardware. Radiation tolerance of the microprocessor was also tested and was adequate for Freja's mission -- 20 kRad(Si) total dose and very infrequent latch-up and single event upset events.

Fraeman, M. E.↗

NASA NTRS1998

Anti-Hassle Chip

With assistance from NASA's Ames Research Center, the iTV Corporation has developed a full custom microprocessor that enables access to the Internet through a $49 device. The microprocessor is supported with a compliment of design tools for customization and adaptation as either a licensable core or as a complete microprocessor. Other uses include cell phones, DVD (digital versatile disk) players, cable modems, video conferencing equipment, digital cameras, wireless LANs (Local Area Network) and WANs (Wide Area Network). iTV continues to design new, low-cost consumer products.

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NASA NTRS2002

Personal Cabin Pressure Monitor and Warning System

A cabin pressure altitude monitor and warning system provides a warning when a detected cabin pressure altitude has reached a predetermined level. The system is preferably embodied in a portable, pager-sized device that can be carried or worn by an individual. A microprocessor calculates the pressure altitude from signals generated by a calibrated pressure transducer and a temperature sensor that compensates for temperature variations in the signals generated by the pressure transducer. The microprocessor is programmed to generate a warning or alarm if a cabin pressure altitude exceeding a predetermined threshold is detected. Preferably, the microprocessor generates two different types of warning or alarm outputs, a first early warning or alert when a first pressure altitude is exceeded. and a second more serious alarm condition when either a second. higher pressure altitude is exceeded, or when the first pressure altitude has been exceeded for a predetermined period of time. Multiple types of alarm condition indicators are preferably provided, including visual, audible and tactile. The system is also preferably designed to detect gas concentrations and other ambient conditions, and thus incorporates other sensors, such as oxygen, relative humidity, carbon dioxide, carbon monoxide and ammonia sensors, to provide a more complete characterization and monitoring of the local environment.

Jan A Zysko↗

NASA NTRS2004

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Savich, Gregory R.↗

NASA NTRS1980

Automated quantitative muscle biopsy analysis system

An automated system to aid the diagnosis of neuromuscular diseases by producing fiber size histograms utilizing histochemically stained muscle biopsy tissue. Televised images of the microscopic fibers are processed electronically by a multi-microprocessor computer, which isolates, measures, and classifies the fibers and displays the fiber size distribution. The architecture of the multi-microprocessor computer, which is iterated to any required degree of complexity, features a series of individual microprocessors P.sub.n each receiving data from a shared memory M.sub.n-1 and outputing processed data to a separate shared memory M.sub.n+1 under control of a program stored in dedicated memory M.sub.n.

Castleman, Kenneth R.↗

NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗

NASA NTRS1976

Development of single cell protectors for sealed silver-zinc cells, phase 1

A single cell protector (SCP) assembly capable of protecting a single silver-zinc (Ag Zn) battery cell was designed, fabricated, and tested. The SCP provides cell-level protection against overcharge and overdischarge by a bypass circuit. The bypass circuit consists of a magnetic-latching relay that is controlled by the high and low-voltage limit comparators. Although designed specifically for secondary Ag-Zn cells, the SCP is flexible enough to be adapted to other rechargeable cells. Eighteen SCPs were used in life testing of an 18-cell battery. The cells were sealed Ag-Zn system with inorganic separators. For comparison, another 18-cell battery was subjected to identical life test conditions, but with battery-level protection rather than cell-level. An alternative approach to the SCP design in the form of a microprocessor-based system was conceptually designed. The comparison of SCP and microprocessor approaches is also presented and a preferred approach for Ag-Zn battery protection is discussed.

Imamura, M. S.↗

NASA NTRS1975

Recent advances in strapdown inertial navigation

The computational requirements and basic features of strapdown gyroscopes for inertial navigation are discussed. Strapdown navigators currently require 20 to 50% of the available time of a minicomputer with a capability of several hundred thousand operations per second; memory requirements are 2000 to 3000 16-bit words. A system in which these computational demands are met by three limited capability microcomputers is described. A technique using dedicated microprocessors in the place of analog electronics in the gyroscope control loops is discussed, and attention is given to applications of microprocessor technology in redundant strapdown navigation systems and associated flight control systems.

Napjus, G. A.↗

NASA NTRS1975

The revolution in data gathering systems

This paper gives a review of the data-acquisition systems used in NASA's wind tunnels from the 1950's to the present as a basis for assessing the impact of minicomputers and microcomputers on data acquisition and processing. The operation and disadvantages of wind-tunnel data systems are summarized for the period before 1950, the early 1950's, the early and late 1960's, and the early 1970's. Some significant advances discussed include the use or development of solid-state components, minicomputer systems, large central computers, on-line data processing, autoranging DC amplifiers, MOS-FET multiplexers, MSI and LSI logic, computer-controlled programmable amplifiers, solid-state remote multiplexing, integrated circuits, and microprocessors. The distributed system currently in use with the 40-ft by 80-ft wind tunnel at Ames Research Center is described in detail. The expected employment of distributed systems and microprocessors in the next decade is noted.

Cambra, J. M.↗

NASA NTRS1976

Programmable data collection platform study

The results of a feasibility study incorporating microprocessors in data collection platforms in described. An introduction to microcomputer hardware and software concepts is provided. The influence of microprocessor technology on the design of programmable data collection platform hardware is discussed. A standard modular PDCP design capable of meeting the design goals is proposed, and the process of developing PDCP programs is examined. A description of design and construction of the UT PDCP development system is given.

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NASA NTRS1977

Nuclear Science Symposium, 23rd, Scintillation and Semiconductor Counter Symposium, 15th, and Nuclear Power Systems Symposium, 8th, New Orleans, La., October 20-22, 1976, Proceedings

The volume includes papers on semiconductor radiation detectors of various types, components of radiation detection and dosimetric systems, digital and microprocessor equipment in nuclear industry and science, and a wide variety of applications of nuclear radiation detectors. Semiconductor detectors of X-rays, gamma radiation, heavy ions, neutrons, and other nuclear particles, plastic scintillator arrays, drift chambers, spark wire chambers, and radiation dosimeter systems are reported on. Digital and analog conversion systems, digital data and control systems, microprocessors, and their uses in scientific research and nuclear power plants are discussed. Large-area imaging and biomedical nucleonic instrumentation, nuclear power plant safeguards, reactor instrumentation, nuclear power plant instrumentation, space instrumentation, and environmental instrumentation are dealt with. Individual items are announced in this issue.

Wagner, L. J.↗

NASA NTRS1977

The sun-tracking control of solar collectors using high-performance step motors

Sun-tracking solar energy-focusing devices involving a central receiver, thermionic conversion, or a distributed solar thermal collector system are described. The Perkins solar collector uses a fixed focal point about which an 18 m-diameter parabolic dish moves on tracks. The elevation axis also moves on a circular track. A microprocessor manipulates sun sensor information and sun ephemeris data to ensure correct placement. Stepper motors are digital devices which provide direct interface with digital electronics and a wide dynamic range, and could easily be associated with the microprocessors. Design philosophy, performance criteria, wind load analysis, and control system requirements are also discussed.

Hughes, R. O.↗

NASA NTRS1977

The indirect binary n-cube array

The array is built from a large number (hundreds or thousands) of microprocessors or microcomputers linked through a switching network into an indirect binary n-cube array. Control is two level, the array operating synchronously, or in lock step, at the higher level, and with the broadcast commands being locally interpreted into rewritable microinstruction streams in the microprocessors and in the switch control units. The key to the design is the switching array. By properly programming it, the array can be made into a wide variety of virtual arrays which are well adapted to a wide range of applications. It is believed that the flexibility of the switching array can be used to obtain fault avoidance, which appears necessary in any highly parallel design.

Pease, M. C.↗

NASA NTRS1978

Stand-alone development system using a KIM-1 microcomputer module

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Nickum, J. D.↗

NASA NTRS1978

Application of digital control to a magnetic model suspension and balance model

The feasibility of using a digital computer for performing the automatic control functions for a magnetic suspension and balance system (MSBS) for use with wind tunnel models was investigated. Modeling was done using both a prototype MSBS and a one dimensional magnetic balance. A microcomputer using the Intel 8080 microprocessor is described and results are given using this microprocessor to control the one dimensional balance. Hybrid simulations for one degree of freedom of the MSBS were also performed and are reported. It is concluded that use of a digital computer to control the MSBS is eminently feasible and should extend both the accuracy and utility of the system.

Luh, P. B.↗