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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 271 records · Page 15

The use of real-time, hardware-in-the-loop simulation in the design and development of the new Hughes HS601 spacecraft attitude control system

Realtime simulation and hardware-in-the-loop testing is being used extensively in all phases of the design, development, and testing of the attitude control system (ACS) for the new Hughes HS601 satellite bus. Realtime, hardware-in-the-loop simulation, integrated with traditional analysis and pure simulation activities is shown to provide a highly efficient and productive overall development program. Implementation of high fidelity simulations of the satellite dynamics and control system algorithms, capable of real-time execution (using applied Dynamics International's System 100), provides a tool which is capable of being integrated with the critical flight microprocessor to create a mixed simulation test (MST). The MST creates a highly accurate, detailed simulated on-orbit test environment, capable of open and closed loop ACS testing, in which the ACS design can be validated. The MST is shown to provide a valuable extension of traditional test methods. A description of the MST configuration is presented, including the spacecraft dynamics simulation model, sensor and actuator emulators, and the test support system. Overall system performance parameters are presented. MST applications are discussed; supporting ACS design, developing on-orbit system performance predictions, flight software development and qualification testing (augmenting the traditional software-based testing), mission planning, and a cost-effective subsystem-level acceptance test. The MST is shown to provide an ideal tool in which the ACS designer can fly the spacecraft on the ground.

Slafer, Loren I.↗

Charge-coupled device /CCD/ trackers for high accuracy guidance applications

Recent advances in large area charge coupled device (CCD) imaging detectors and high speed microprocessors have prompted the development of a new class of electro-optical tracking instruments at the Jet Propulsion Laboratory (JPL). These instruments are designed for standardized NASA-wide usage and are characterized by their extremely high pointing accuracy and stability and performance capabilities which are largely software defined and thus easily adapted to a variety of mission requirements. This paper presents an examination of the methods by which CCD detectors are being incorporated in star tracker instruments and the performance capabilities that can be expected from currently available devices. The multi-function sensor concept, in which a single sensor can function in a variety of guidance applications, is described. Software algorithms designed to provide efficient extraction of guidance information from both point and extended images are also presented. CCD star tracker implementations currently underway at JPL are described, and performance data obtained during laboratory testing is presented and discussed.

Salomon, P. M.↗

Development of closed loop roll control for magnetic balance systems

This research was undertaken with the goal of demonstrating closed loop control of the roll degree of freedom on the NASA prototype magnetic suspension and balance system at the MIT Aerophysics Laboratory, thus, showing feasibility for a roll control system for any large magnetic balance system which might be built in the future. During the research under this grant, study was directed toward the several areas of torque generation, position sensing, model construction and control system design. These effects were then integrated to produce successful closed loop operation of the analogue roll control system. This experience indicated the desirability of microprocessor control for the angular degrees of freedom.

Covert, E. E.↗

VLSI high speed packet processor

The Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a packet processor card utilizing semicustom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multichannel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the packet processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semicustom VLSI logic.

Grebowsky, Gerald J.↗

Open-source Wireless Sensor Network (Wi-Se Net) for Flexible Deployment

Wireless sensors, especially if battery powered, have a number of advantages over wired sensors for flexible or temporary diagnostic deployment in a field or lab setting. Recent advances in wireless technology and microprocessor boards have produced a variety of inexpensive off-the shelf chips which can communicate wirelessly with simple protocols. This paper describes the design and implementation of a highly customizable wireless sensor network (called WiSe Net) using inexpensive open-source hardware components as wireless nodes. These wireless sensor nodes can transmit data at a rate <250 Hz, can be battery powered, and have a small footprint (2x5 cm). In addition, a preliminary over-the-air programming system was developed to allow for simple wireless configuration when active. The network performance was demonstrated by taking distributed and electrically isolated temperature measurements on a high-voltage lab apparatus. Although this test case is in a laboratory setting, this network architecture could be easily repurposed for various other forms of monitoring

Wireless Sensor Network↗

Open-source Wireless Sensor Network (Wi-Se Net) for Flexible Deployment

Wireless sensors, especially if battery powered, have a number of advantages over wired sensors for flexible or temporary diagnostic deployment in a field or lab setting. Recent advances in wireless technology and microprocessor boards have produced a variety of inexpensive off-the shelf chips which can communicate wirelessly with simple protocols. This paper describes the design and implementation of a highly customizable wireless sensor network (called Wi-Se Net) using inexpensive open-source hardware components as wireless nodes. These wireless sensor nodes can transmit data at a rate <250 Hz, can be battery powered, and have a small footprint (2x5 cm). In addition, a preliminary over-the-air programming system was developed to allow for simple wireless configuration when active. The network performance was demonstrated by taking distributed and electrically isolated temperature measurements on a high-voltage lab apparatus. Although this test case is in a laboratory setting, this network architecture could be easily repurposed for various other forms of monitoring.

Wireless Sensor Network↗

Open-source Wireless Sensor Network (Wi-Se Net) for Flexible Deployment

Wireless sensors, especially if battery powered, have a number of advantages over wired sensors for flexible or temporary diagnostic deployment in a field or lab setting. Recent advances in wireless technology and microprocessor boards have produced a variety of inexpensive off-the shelf chips which can communicate wirelessly with simple protocols. This paper describes the design and implementation of a highly customizable wireless sensor network (called WiSe Net) using inexpensive open-source hardware components as wireless nodes. These wireless sensor nodes can transmit data at a rate <250 Hz, can be battery powered, and have a small footprint (2x5 cm). In addition, a preliminary over-the-air programming system was developed to allow for simple wireless configuration when active. The network performance was demonstrated by taking distributed and electrically isolated temperature measurements on a high-voltage lab apparatus. Although this test case is in a laboratory setting, this network architecture could be easily repurposed for various other forms of monitoring.

Wireless Sensor Network↗

Microprocessor Control For Liquid-Cooled Garment

Automatic control system maintains temperature of water-cooled garment within comfort zone while wearer's level of physical activity varies. Uncomfortable overshoots and undershoots of temperature eliminated. Designed for use in space suit, adaptable to other protective garments and to enclosed environments operating according to similar principles.

Weaver, Charles S.↗

Intelligent redundant actuation system requirements and preliminary system design

Several redundant actuation system configurations were designed and demonstrated to satisfy the stringent operational requirements of advanced flight control systems. However, this has been accomplished largely through brute force hardware redundancy, resulting in significantly increased computational requirements on the flight control computers which perform the failure analysis and reconfiguration management. Modern technology now provides powerful, low-cost microprocessors which are effective in performing failure isolation and configuration management at the local actuator level. One such concept, called an Intelligent Redundant Actuation System (IRAS), significantly reduces the flight control computer requirements and performs the local tasks more comprehensively than previously feasible. The requirements and preliminary design of an experimental laboratory system capable of demonstrating the concept and sufficiently flexible to explore a variety of configurations are discussed.

Defeo, P.↗

Low cost Czochralski crystal growing technology. Near implementation of the flat plate photovoltaic cost reduction of the low cost solar array project

Equipment developed for the manufacture of over 100 kg of silicon ingot from one crucible by rechanging from another crucible is described. Attempts were made to eliminate the cost of raising the furnace temperature to 250 C above the melting point of silicon by using an RF coil to melt polycrystalline silicon rod as a means of rechanging the crucible. Microprocessor control of the straight growth process was developed and domonstrated for both 4 inch and 6 inch diameter. Both meltdown and melt stabilization processes were achieved using operator prompting through the microprocessor. The use of the RF work coil in poly rod melting as a heat sink in the accelerated growth process was unsuccessful. The total design concept for fabrication and interfacing of the total cold crucible system was completed.

Roberts, E. G.↗

DSS 13 Microprocessor Antenna Controller

A microprocessor based antenna controller system developed as part of the unattended station project for DSS 13 is described. Both the hardware and software top level designs are presented and the major problems encounted are discussed. Developments useful to related projects include a JPL standard 15 line interface using a single board computer, a general purpose parser, a fast floating point to ASCII conversion technique, and experience gained in using off board floating point processors with the 8080 CPU.

Gosline, R. M.↗

Assurance of Complex Electronics. What Path Do We Take?

Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled in software, such as communication protocols. For instance, Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of "software-like" bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and "bugs" can be detected earlier in the development cycle, thus creating a development process for CE that will be easily maintained and configurable based on the device used.

FROM↗

Software Process Assurance for Complex Electronics

Complex Electronics (CE) now perform tasks that were previously handled in software, such as communication protocols. Many methods used to develop software bare a close resemblance to CE development. Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. With CE devices obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications in the development of these devices. Software Process Assurance for Complex Electronics (SPACE) is a research project that used standardized S/W Assurance/Engineering practices to provide an assurance framework for development activities. Tools such as checklists, best practices and techniques were used to detect missing requirements and bugs earlier in the development cycle creating a development process for CE that was more easily maintained, consistent and configurable based on the device used.

Plastow, Richard A.↗

Filling the Assurance Gap on Complex Electronics

Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled by software, such as communication protocols. For example, the James Webb Space Telescope will use Field Programmable Gate Arrays (FPGAs), which can have over a million logic gates, to send telemetry. System-on-chip (SoC) devices, another type of complex electronics, can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, mature software methodologies have been proposed, with slight modifications, to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and bugs can be detected earlier in the development cycle, thus creating a development process for CE that can be easily maintained and configurable based on the device used.

Plastow, Richard A.↗

Software Process Assurance for Complex Electronics (SPACE)

Complex Electronics (CE) are now programmed to perform tasks that were previously handled in software, such as communication protocols. Many of the methods used to develop software bare a close resemblance to CE development. For instance, Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications in the development of these devices. Software Process Assurance for Complex Electronics (SPACE) is a research project that looks at using standardized S/W Assurance/Engineering practices to provide an assurance framework for development activities. Tools such as checklists, best practices and techniques can be used to detect missing requirements and bugs earlier in the development cycle creating a development process for CE that will be more easily maintained, consistent and configurable based on the device used.

Plastow, Richard A.↗

Reconfigurable Processing for Satellite On-Board Automatic Cloud Cover Assessment (ACCA)

Clouds have a critical role in many studies such as weather- and climate-related investigations. However, they represent a source of errors in many applications, and the presence of cloud contamination can hinder the use of satellite data. In addition, sending cloudy data to ground stations can result in an inefficient utilization of the communication bandwidth. This requires satellite on-board cloud detection capability to mask out cloudy pixels from further processing. Remote sensing satellite missions have always required smaller size, lower cost, more flexibility, and higher computational power. Reconfigurable Computers (RCs) combine the flexibility of traditional microprocessors with the power of Field Programmable Gate Arrays (FPGAs). Therefore, RCs are a promising candidate for on-board preprocessing. This paper presents the design and implementation of an RC-based real-time cloud detection system. We investigate the potential of using RCs for on-board preprocessing by prototyping the Landsat 7 ETM+ ACCA algorithm on one of the state-of-the-art reconfigurable platforms, SRC-6. It will be shown that our work provides higher detection accuracy and over one order of magnitude improvement in performance when compared to previously reported investigations.

El-Araby, Esam↗

Towards the formal specification of the requirements and design of a processor interface unit: HOL listings

This technical report contains the HOL listings of the specification of the design and major portions of the requirements for a commercially developed processor interface unit (or PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU specification as it currently exists. Section two of this report contains general-purpose HOL theories that support the PIU specification. These theories include definitions for the hardware components used in the PIU, our implementation of bit words, and our implementation of temporal logic. Section three contains the HOL listings for the PIU design specification. Aside from the PIU internal bus (I-Bus), this specification is complete. Section four contains the HOL listings for a major portion of the PIU requirements specification. Specifically, it contains most of the definition for the PIU behavior associated with memory accesses initiated by the local processor.

Fura, David A.↗

Design, development, and field demonstration of a remotely deployable water quality monitoring system

A prototype water quality monitoring system is described which offers almost continuous in situ monitoring. The two-man portable system features: (1) a microprocessor controlled central processing unit which allows preprogrammed sampling schedules and reprogramming in situ; (2) a subsurface unit for multiple depth capability and security from vandalism; (3) an acoustic data link for communications between the subsurface unit and the surface control unit; (4) eight water quality parameter sensors; (5) a nonvolatile magnetic bubble memory which prevents data loss in the event of power interruption; (6) a rechargeable power supply sufficient for 2 weeks of unattended operation; (7) a water sampler which can collect samples for laboratory analysis; (8) data output in direct engineering units on printed tape or through a computer compatible link; (9) internal electronic calibration eliminating external sensor adjustment; and (10) acoustic location and recovery systems. Data obtained in Saginaw Bay, Lake Huron are tabulated.

Wallace, J. W.↗