Search NASA⌕ Search

SEARCH · Search NASA

Results for “processor”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 271 records · Page 15

The calibration of photographic and spectroscopic films. The utilization of the digital image processor in the determination of aging of the surf clam (Spisula solidissima)

The age of the surf clam (Spisula solidissima) can be determined with the use of the Digital Image Processor. This technique is used in conjunction with a modified method for aging, refined by John Ropes of the Woods Hole Laboratory, Massachusetts. This method utilizes a thinned sectioned chondrophore of the surf clam which contains annual rings. The rings of the chondrophore are then counted to determine age. By digitizing the chondrophore, the Digital Image Processor is clearly able to separate these annual rings more accurately. This technique produces an easier and more efficient way to count annual rings to determine the age of the surf clam.

Peters, Kevin A.↗

Frequency domain laser velocimeter signal processor

A new laser velocimeter signal processor is described which uses advanced digital circuitry to configure itself to maximize measurement accuracy based on the characteristics of the input signals. This processor maintains measurement independence from burst to burst and yields measurement accuracies better than 0.2 percent for signal frequencies up to 100 MHz.

Meyers, James F.↗

Real-Time Processor For Synthetic-Aperture Radar

Images formed aboard airplane. Data processor for synthetic-aperture radar (SAR) operates aboard airplane with radar equipment to produce images of scanned terrain in real time. Providing images immediately, new processor enables SAR operator to monitor scanning activity. Processed images recorded on tape or transmitted to ground stations.

Liu, Kuang Y.↗

Hardware realization of a baseband processor for a SS-FDMA/TDMA/DAMA system

Hardware implementation of the NASA ACTS baseband processor is described which achieves the system message data handling performance required to perform satellite switching of high-rate baseband data. The hardware meets payload specifications for size, weight, and power. Hardware redundancy applied to critical paths in several functional areas insures that the reliability and life expectancy requirements are fulfilled. The remote reprogrammability of the processor message data handling and routing functions provides system flexibility for dynamic reconfiguration during rapidly changing traffic loads.

Moat, Richard L.↗

Development and implementation of a programmable telemetry processor

A programmable telemetry processor was designed for the NASA Goddard Space Flight Center in support of the Systems Utilization Enhancement (SUE) upgrade of the NASA tracking stations at Merritt Island, FL, and Bermuda. The processor is an integrated hardware and software system that performs the front-end telemetry synchronization and decommutation functions and provides for application-specific data processing. This paper presents the design, architecture, and features of the microprocessor controlled unit.

Flagg, Howard S.↗

Optimal mapping of irregular finite element domains to parallel processors

Mapping the solution domain of n-finite elements into N-subdomains that may be processed in parallel by N-processors is an optimal one if the subdomain decomposition results in a well-balanced workload distribution among the processors. The problem is discussed in the context of irregular finite element domains as an important aspect of the efficient utilization of the capabilities of emerging multiprocessor computers. Finding the optimal mapping is an intractable combinatorial optimization problem, for which a satisfactory approximate solution is obtained here by analogy to a method used in statistical mechanics for simulating the annealing process in solids. The simulated annealing analogy and algorithm are described, and numerical results are given for mapping an irregular two-dimensional finite element domain containing a singularity onto the Hypercube computer.

Flower, J.↗

Development of an adaptive LDV signal processor

Recent attempts at realization of a frequency domain signal processor exhibit practical drawbacks such as manual gain, filter and sampling adjustments, and simplistic adaptations of frequency domain techniques. This paper introduces an adaptive LDV signal processor, one which requires no operator intervention under any circumstances by adapting dynamically to burst characteristics, while surpassing all previous techniques in range and accuracy.

Baker, Glenn D.↗

Remotely controllable real-time optical processor

An optical processor is provided which facilitates selection of any of a variety of patterns or images which are to be compared with a Fourier transform of a template image, wherein the processor can be constructed at low cost. One of the two images that are to be compared is formed by generating video signals representing the image and using those signals to drive a liquid crystal array through which light passes.

Hua-Kuang Liu↗

Frequency domain laser velocimeter signal processor

A laser velocimeter signal processor for measuring the signal frequency within a signal burst. The input signal is converted to digital by an ADC 16 and then shifted into shift registers 30 and 31. An automatic gain circuit 15 controls the gain of the input signal. A signal integration circuit 32 determines when a signal burst has been captured by the shift registers and then transfers the contents of the registers to data latches 33 and 34. The data in data latches 33 and 34 is processed by digital bandpass filters 57-63, square law detectors 64-70, burst counters 71-77 and signal processor 78 to determine the frequency of the signal within the captured signal burst.

James F Meyers↗

An optical processor for object recognition and tracking

The design and development of a miniaturized optical processor that performs real time image correlation are described. The optical correlator utilizes the Vander Lugt matched spatial filter technique. The correlation output, a focused beam of light, is imaged onto a CMOS photodetector array. In addition to performing target recognition, the device also tracks the target. The hardware, composed of optical and electro-optical components, occupies only 590 cu cm of volume. A complete correlator system would also include an input imaging lens. This optical processing system is compact, rugged, requires only 3.5 watts of operating power, and weighs less than 3 kg. It represents a major achievement in miniaturizing optical processors. When considered as a special-purpose processing unit, it is an attractive alternative to conventional digital image recognition processing. It is conceivable that the combined technology of both optical and ditital processing could result in a very advanced robot vision system.

Sloan, J.↗

Generic element processor (application to nonlinear analysis)

The focus here is on one aspect of the Computational Structural Mechanics (CSM) Testbed: finite element technology. The approach involves a Generic Element Processor: a command-driven, database-oriented software shell that facilitates introduction of new elements into the testbed. This shell features an element-independent corotational capability that upgrades linear elements to geometrically nonlinear analysis, and corrects the rigid-body errors that plague many contemporary plate and shell elements. Specific elements that have been implemented in the Testbed via this mechanism include the Assumed Natural-Coordinate Strain (ANS) shell elements, developed with Professor K. C. Park (University of Colorado, Boulder), a new class of curved hybrid shell elements, developed by Dr. David Kang of LPARL (formerly a student of Professor T. Pian), other shell and solid hybrid elements developed by NASA personnel, and recently a repackaged version of the workhorse shell element used in the traditional STAGS nonlinear shell analysis code. The presentation covers: (1) user and developer interfaces to the generic element processor, (2) an explanation of the built-in corotational option, (3) a description of some of the shell-elements currently implemented, and (4) application to sample nonlinear shell postbuckling problems.

Stanley, Gary↗

The design of an onboard digital Doppler processor for a spaceborne scatterometer

A digital Doppler processor, which will permit the Doppler center frequency of the measurement cell bandwidths to be adjusted to compensate for the effects of the earth's rotation, will be used in the next NASA spaceborn scatterometer known as NSCAT. The authors describe the design and genesis of the NSCAT digital Doppler processor and discusses the performance tradeoff issues that were evaluated during the design phase. In this FFT (fast Fourier transform)-based technique, computation of the adjustment to the cell center frequencies will be done onboard using an approximate expression for the Doppler shift of the cell center versus orbit time. This technique also permits modification of the parameters used to locate the radar-backscatter-coefficient measurement cells by ground command in response to orbit changes.

Long, David G.↗

The role of specialized processors in the NAS program - Retrospective/prospective

The Numerical Aerodynamic Simulation (NAS) Program was initiated by NASA to establish a national resource for scientific research and engineering applications of computational fluid dynamics. This paper examines the changing views of the roles of general purpose and special purpose processors in this program in response to changes in technology as well as changes in perceived needs. The time period covered extends from more than 10 years ago, through the present, and concludes with some speculative concepts for the future roles of specialized processors in the advanced NAS system.

Levin, Eugene↗

Application of the hypercube parallel processor to a large-scale moment method code

The applicability of a parallel computing architecture to the solution of a large-scale moment-method code is investigated. Specifically, the NEC (Numerical Electromagnetics Code) method-of-moments scattering program is implemented on a hypercube parallel processor. The accuracy and the increase in the speed of execution on this parallel architecture are demonstrated. The results show a very large reduction in execution time for large problems. The great potential of this parallel processor is shown for interactive solution of large NEC problems as well as other moment-method techniques such as the finite-element method.

Manshadi, Farzin↗

VLSI high speed packet processor

The Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a packet processor card utilizing semicustom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multichannel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the packet processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semicustom VLSI logic.

Grebowsky, Gerald J.↗

LARP - An adaptive LDV signal processor

Recent attempts at realization of a frequency domain signal processor exhibit practical drawbacks such as manual gain, filter and sampling adjustments, and simplistic adaptations of frequency domain techniques. This paper introduces an adaptive LDV signal processor, one which requires no operator intervention under any circumstances by adapting dynamically to burst characteristics, while surpassing all previous techniques in range and accuracy.

Baker, Glenn D.↗

Frequency-Domain Signal Processor For Laser Velocimeter

Dynamic range and accuracy increased. New signal processor for laser-velocimeter (LV) applications overcomes major limitations of present signal processors. System requires no input-signal conditioning other than that provided by amplifiers; it operates in instantaneous mode at signal levels from bursts containing as few as 150 photons down to photon-resolved regime in averaging mode. Digital value of signal-burst frequency sent to external computer system for conversion to value of absolute frequency. Residual turbulence intensity 0.2 percent, with little dependence on signal-to-noise ratio.

Meyers, James F.↗