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At least 271 records · Page 15

Development of UItra-Low Temperature Motor Controllers: Ultra Low Temperatures Evaluation and Characterization of Semiconductor Technologies For The Next Generation Space Telescope

Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).

Elbuluk, Malik E.↗

Semiconductor Crystal Growth in Static and Rotating Magnetic fields

Magnetic fields have been applied during the growth of bulk semiconductor crystals to control the convective flow behavior of the melt. A static magnetic field established Lorentz forces which tend to reduce the convective intensity in the melt. At sufficiently high magnetic field strengths, a boundary layer is established ahead of the solid-liquid interface where mass transport is dominated by diffusion. This can have a significant effect on segregation behavior and can eliminate striations in grown crystals resulting from convective instabilities. Experiments on dilute (Ge:Ga) and solid solution (Ge-Si) semiconductor systems show a transition from a completely mixed convective state to a diffusion-controlled state between 0 and 5 Tesla. In HgCdTe, radial segregation approached the diffusion limited regime and the curvature of the solid-liquid interface was reduced by a factor of 3 during growth in magnetic fields in excess of 0.5 Tesla. Convection can also be controlled during growth at reduced gravitational levels. However, the direction of the residual steady-state acceleration vector can compromise this effect if it cannot be controlled. A magnetic field in reduced gravity can suppress disturbances caused by residual transverse accelerations and by random non-steady accelerations. Indeed, a joint program between NASA and the NHMFL resulted in the construction of a prototype spaceflight magnet for crystal growth applications. An alternative to the suppression of convection by static magnetic fields and reduced gravity is the imposition of controlled steady flow generated by rotating magnetic fields (RMF)'s. The potential benefits of an RMF include homogenization of the melt temperature and concentration distribution, and control of the solid-liquid interface shape. Adjusting the strength and frequency of the applied magnetic field allows tailoring of the resultant flow field. A limitation of RMF's is that they introduce deleterious instabilities above a critical magnetic field value. Growth conditions in which static magnetic fields rotational magnetic fields, and reduced gravitational levels can have a beneficial role will be described.

Volz, Martin↗

Temperature Dependence of Density, Viscosity and Electrical Conductivity for Hg-Based II-VI Semiconductor Melts

The relaxation phenomenon of semiconductor melts, or the change of melt structure with time, impacts the crystal growth process and the eventual quality of the crystal. The thermophysical properties of the melt are good indicators of such changes in melt structure. Also, thermophysical properties are essential to the accurate predication of the crystal growth process by computational modeling. Currently, the temperature dependent thermophysical property data for the Hg-based II-VI semiconductor melts are scarce. This paper reports the results on the temperature dependence of melt density, viscosity and electrical conductivity of Hg-based II-VI compounds. The melt density was measured using a pycnometric method, and the viscosity and electrical conductivity were measured by a transient torque method. Results were compared with available published data and showed good agreement. The implication of the structural changes at different temperature ranges was also studied and discussed.

Li, C.↗

Maxwell-Bloch Equations Modeling of Ultrashort Optical Pulse Propagation in Semiconductor Materials

An algorithm has been developed that solves the semiconductor Maxwell-Bloch equations, without making the standard slowly-varying envelope (SVEA) and rotating-wave (RWA) approximations. It is applied to study the propagation of ultrashort pulses in semiconductor materials. The results include many-body effects due to the Coulomb interaction among the charge carriers as well as the nonlinear effects resulting from spectral hole-burning.

Goorjian, Peter M.↗

Ring resonator based narrow-linewidth semiconductor lasers

The present invention is a method and apparatus for using ring resonators to produce narrow linewidth hybrid semiconductor lasers. According to one embodiment of the present invention, the narrow linewidths are produced by combining the semiconductor gain chip with a narrow pass band external feedback element. The semi conductor laser is produced using a ring resonator which, combined with a Bragg grating, acts as the external feedback element. According to another embodiment of the present invention, the proposed integrated optics ring resonator is based on plasma enhanced chemical vapor deposition (PECVD) SiO.sub.2 /SiON/SiO.sub.2 waveguide technology.

Ksendzov, Alexander↗

Polycrystalline or amorphous semiconductor photovoltaic device having improved collection efficiency

A body of semiconductor material having a first surface and a second surface spaced from the first surface includes a first layer along the first surface, a second layer along the second surface, a third layer between and contiguous to the first and second layers. The third layer is of a conductivity type opposite that of the first and second layers so as to form first and second P-N junctions respectively therebetween. The thickness of the third layer is at least twice the minority carrier diffusion length of the semiconductor material, so that carriers generated within the third layer have a high probability of being collected by one of the P-N junctions. The body includes means for electrically connecting the first and second P-N junctions and means for transferring the carriers collected at the first P-N junction to a portion of the first surface.

Kressel, Henry↗

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗

Enhanced adhesion of films to semiconductors or metals by high energy bombardment

Films (12) of a metal such as gold or other non-insulator materials are firmly bonded to other non-insulators such as semiconductor substrates (10), suitably silicon or gallium arsenide by irradiating the interface with high energy ions. The process results in improved adhesion without excessive doping and provides a low resistance contact to the semiconductor. Thick layers can be bonded by depositing or doping the interfacial surfaces with fissionable elements or alpha emitters. The process can be utilized to apply very small, low resistance electrodes (78) to light-emitting solid state laser diodes (60) to form a laser device 70.

Tombrello, Thomas A.↗

Method for fabricating semiconductor devices

A process for fabricating gold/gallium arsenide structures, in situ, on molecular beam epitaxially grown gallium arsenide. The resulting interface proves to be Ohmic, an unexpected result which is interpreted in terms of increased electrode interdiffusion. More importantly, the present invention surprisingly permits the fabrication of Ohmic contacts in a III-V semiconductor material at room temperature. Although it may be desireable to heat the Ohmic contact to a temperature of, for example, 200 degrees Centigrade if one wishes to further decrease the resistance of the contact, such low temperature annealing is much less likely to have any deleterious affect on the underlying substrate. The use of the term in situ herein, contemplates continuously maintaining an ultra-high vacuum, that is a vacuum which is at least 10.sup.-8 Torr, until after the metallization has been completed. An alternative embodiment of the present invention comprising an additional step, namely the termination of the gallium arsenide by a two monolayer thickness of epitaxial aluminum arsenide as a diffusion barrier, enables the recovery of Schottky barrier behavior, namely a rectified I-V characteristic. The present invention provides a significant breakthrough in the fabrication of III-V semiconductor devices wherein excellent Ohmic contact and Schottky barrier interfaces to such devices can be achieved simply and inexpensively and without requiring the high temperature processing of the prior art and also without requiring the use of exotic high temperature refractory materials as substitutes for those preferred contact metals such as gold, aluminum and the like.

Kaiser, William J.↗

Space Research Results Purify Semiconductor Materials

While President Obama's news that NASA would encourage private companies to develop vehicles to take NASA into space may have come as a surprise to some, NASA has always encouraged private companies to invest in space. More than two decades ago, NASA established Commercial Space Centers across the United States to encourage industry to use space as a place to conduct research and to apply NASA technology to Earth applications. Although the centers are no longer funded by NASA, the advances enabled by that previous funding are still impacting us all today. For example, the Space Vacuum Epitaxy Center (SVEC) at the University of Houston, one of the 17 Commercial Space Centers, had a mission to create advanced thin film semiconductor materials and devices through the use of vacuum growth technologies both on Earth and in space. Making thin film materials in a vacuum (low-pressure environment) is advantageous over making them in normal atmospheric pressures, because contamination floating in the air is lessened in a vacuum. To grow semiconductor crystals, researchers at SVEC utilized epitaxy the process of depositing a thin layer of material on top of another thin layer of material. On Earth, this process took place in a vacuum chamber in a clean room lab. For space, the researchers developed something called the Wake Shield Facility (WSF), a 12-foot-diameter disk-shaped platform designed to grow thin film materials using the low-pressure environment in the wake of the space shuttle. Behind an orbiting space shuttle, the vacuum levels are thousands of times better than in the best vacuum chambers on Earth. Throughout the 1990s, the WSF flew on three space shuttle missions as a series of proof-of-concept missions. These experiments are a lasting testament to the success of the shuttle program and resulted in the development of the first thin film materials made in the vacuum of space, helping to pave the way for better thin film development on Earth.

Source record↗

Thermoelectric Performance Enhancement by Surrounding Crystalline Semiconductors with Metallic Nanoparticles

Direct conversion of thermal energy to electricity by thermoelectric (TE) devices may play a key role in future energy production and utilization. However, relatively poor performance of current TE materials has slowed development of new energy conversion applications. Recent reports have shown that the dimensionless Figure of Merit, ZT, for TE devices can be increased beyond the state-of-the-art level by nanoscale structuring of materials to reduce their thermal conductivity. New morphologically designed TE materials have been fabricated at the NASA Langley Research Center, and their characterization is underway. These newly designed materials are based on semiconductor crystal grains whose surfaces are surrounded by metallic nanoparticles. The nanoscale particles are used to tailor the thermal and electrical conduction properties for TE applications by altering the phonon and electron transport pathways. A sample of bismuth telluride decorated with metallic nanoparticles showed less thermal conductivity and twice the electrical conductivity at room temperature as compared to pure Bi2Te3. Apparently, electrons cross easily between semiconductor crystal grains via the intervening metallic nanoparticle bridges, but phonons are scattered at the interfacing gaps. Hence, if the interfacing gap is larger than the mean free path of the phonon, thermal energy transmission from one grain to others is reduced. Here we describe the design and analysis of these new materials that offer substantial improvements in thermoelectric performance.

Kim, Hyun-Jung↗

Semiconductor crystal high resolution imager

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Levin, Craig S.↗

Pulsed Laser System to Simulate Effects of Cosmic Rays in Semiconductor Devices

Spaceflight system electronic devices must survive a wide range of radiation environments with various particle types including energetic protons, electrons, gamma rays, x-rays, and heavy ions. High-energy charged particles such as heavy ions can pass straight through a semiconductor material and interact with a charge-sensitive region, generating a significant amount of charge (electron-hole pairs) along their tracks. These excess charges can damage the device, and the response can range from temporary perturbations to permanent changes in the state or performance. These phenomena are called single event effects (SEE). Before application in flight systems, electronic parts need to be qualified and tested for performance and radiation sensitivity. Typically, their susceptibility to SEE is tested by exposure to an ion beam from a particle accelerator. At such facilities, the device under test (DUT) is irradiated with large beams so there is no fine resolution to investigate particular regions of sensitivity on the parts. While it is the most reliable approach for radiation qualification, these evaluations are time consuming and costly. There is always a need for new cost-efficient strategies to complement accelerator testing: pulsed lasers provide such a solution. Pulsed laser light can be utilized to simulate heavy ion effects with the advantage of being able to localize the sensitive region of an integrated circuit. Generally, a focused laser beam of approximately picosecond pulse duration is used to generate carrier density in the semiconductor device. During irradiation, the laser pulse is absorbed by the electronic medium with a wavelength selected accordingly by the user, and the laser energy can ionize and simulate SEE as would occur in space. With a tightly focused near infrared (NIR) laser beam, the beam waist of about a micrometer can be achieved, and additional scanning techniques are able to yield submicron resolution. This feature allows mapping of all of the sensitive regions of the studied device with fine resolution, unlike heavy ion experiments. The problematic regions can be precisely identified, and it provides a considerable amount of information about the circuit. In addition, the system allows flexibility for testing the device in different configurations in situ.

Aveline, David C.↗

Rhombohedral cubic semiconductor materials on trigonal substrate with single crystal properties and devices based on such materials

Growth conditions are developed, based on a temperature-dependent alignment model, to enable formation of cubic group IV, group II-V and group II-VI crystals in the [111] orientation on the basal (0001) plane of trigonal crystal substrates, controlled such that the volume percentage of primary twin crystal is reduced from about 40% to about 0.3%, compared to the majority single crystal. The control of stacking faults in this and other embodiments can yield single crystalline semiconductors based on these materials that are substantially without defects, or improved thermoelectric materials with twinned crystals for phonon scattering while maintaining electrical integrity. These methods can selectively yield a cubic-on-trigonal epitaxial semiconductor material in which the cubic layer is substantially either directly aligned, or 60 degrees-rotated from, the underlying trigonal material.

Park, Yeonjoon↗

Estimation of Frequency Noise in Semiconductor Lasers Due to Mechanical Thermal Noise

We evaluate mechanical thermal noise in semiconductor lasers, applying a methodology developed for fixed-spacer cavities for laser frequency stabilization. Our simple model determines an underlying fundamental limit for the frequency noise of free-running semiconductor laser, and provides a framework: where the noise may be potentially reduced with improved design.

Numata, Kenji↗

Interconnection of Semiconductor Devices in Extreme Environment Microelectronic Integrated Circuit Chips

A process of fabrication and the resulting integrated circuit device is made of patterned metal electrical interconnections between semiconductor devices residing on and forming extremely harsh environment integrated circuit chips. The process enables more complicated wide band gap semiconductor integrated circuits with more than one level of interconnect to function for prolonged time periods (over 1000 hours) at much higher temperatures (500 C).

Spry, David J.↗

Determination of electron-hole pair creation energy in Cd 0.9 Zn 0.1 Te 0.98 Se 0.02 quaternary semiconductor for room-temperature gamma-ray detection

We report the first-time measurement of the electron-hole pair (ehp) creation energy (W ehp ) in novel Cd 0.9 Zn 0.1 Te 0.98 Se 0.02 (CZTS) quaternary semiconductor. CZTS in single crystalline form is poised to be the future of large-volume room-temperature gamma-ray detectors due to its excellent compositional homogeneity with highly reduced defects, high-Z (atomic number) constituents, wide bandgap (1.6 eV), and superior charge transport properties. Despite a great deal of study of the material and device properties since its inception, the W ehp in CZTS has not been measured experimentally. Accurate determination of W ehp is essential for calibration of the spectrometer and other theoretical calculations. In this study we have used an absolute calibration approach, which is based on an iterative approach that yields the Wehp as the best-fit parameter. Using a 241 Am alpha emitting radioisotope and a planar CZTS detector, the Wehp in CZTS was calculated to be 4.47 eV. The obtained value has been validated by accurately predicting the peak energy for gamma rays emitted by a 137 Cs source and read by a CZTS detector with different dimensions. The dependences of the calculated W ehp value on the detector dimensions, type of interaction, and effect of charge trapping are also discussed.

42 ENGINEERING↗