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At least 271 records · Page 15

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NASA NTRS1988

A sparse matrix algorithm on the Boolean vector machine

VLSI technology is being used to implement a prototype Boolean Vector Machine (BVM), which is a large network of very small processors with equally small memories that operate in SIMD mode; these use bit-serial arithmetic, and communicate via cube-connected cycles network. The BVM's bit-serial arithmetic and the small memories of individual processors are noted to compromise the system's effectiveness in large numerical problem applications. Attention is presently given to the implementation of a basic matrix-vector iteration algorithm for space matrices of the BVM, in order to generate over 1 billion useful floating-point operations/sec for this iteration algorithm. The algorithm is expressed in a novel language designated 'BVM'.

Wagner, Robert A.↗

NASA NTRS1988

A parallel householder tridiagonalization stratagem using scattered row decomposition

Householder's method for tridiagonalizing a real symmetric matrix, a major step in evaluating eigenvalues of the matrix, is modified into a parallel algorithm for a concurrent machine of message passing type. Each processor of the concurrent machine has its own CPU, communications control and local memory. Messages are passed through connections between processors. Although the basic algorithm is inherently serial, the computations can be spread over all processors by scattering different rows of the matrix into processors, hence the term 'Scattered Row Decomposition'. The steps in the serial and the parallel algorithms are identified. Expressions for efficiency and speedup are given in terms of problem and machine parameters. For a concurrent machine of ring type interconnection, a selected representative problem of large order exhibits efficiency approaching 66 per cent.

Chang, H. Y.↗

NASA NTRS1988

Rapid code acquisition algorithms employing PN matched filters

The performance of four algorithms using pseudonoise matched filters (PNMFs), for direct-sequence spread-spectrum systems, is analyzed. They are: parallel search with fix dwell detector (PL-FDD), parallel search with sequential detector (PL-SD), parallel-serial search with fix dwell detector (PS-FDD), and parallel-serial search with sequential detector (PS-SD). The operation characteristic for each detector and the mean acquisition time for each algorithm are derived. All the algorithms are studied in conjunction with the noncoherent integration technique, which enables the system to operate in the presence of data modulation. Several previous proposals using PNMF are seen as special cases of the present algorithms.

Su, Yu T.↗

NASA NTRS1989

Parallel processing of a rotating shaft simulation

A FORTRAN program describing the vibration modes of a rotor-bearing system is analyzed for parellelism in this simulation using a Pascal-like structured language. Potential vector operations are also identified. A critical path through the simulation is identified and used in conjunction with somewhat fictitious processor characteristics to determine the time to calculate the problem on a parallel processing system having those characteristics. A parallel processing overhead time is included as a parameter for proper evaluation of the gain over serial calculation. The serial calculation time is determined for the same fictitious system. An improvement of up to 640 percent is possible depending on the value of the overhead time. Based on the analysis, certain conclusions are drawn pertaining to the development needs of parallel processing technology, and to the specification of parallel processing systems to meet computational needs.

Arpasi, Dale J.↗

NASA NTRS1989

Parallel asynchronous systems and image processing algorithms

A new hardware approach to implementation of image processing algorithms is described. The approach is based on silicon devices which would permit an independent analog processing channel to be dedicated to evey pixel. A laminar architecture consisting of a stack of planar arrays of the device would form a two-dimensional array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuronlike asynchronous pulse coded form through the laminar processor. Such systems would integrate image acquisition and image processing. Acquisition and processing would be performed concurrently as in natural vision systems. The research is aimed at implementation of algorithms, such as the intensity dependent summation algorithm and pyramid processing structures, which are motivated by the operation of natural vision systems. Implementation of natural vision algorithms would benefit from the use of neuronlike information coding and the laminar, 2-D parallel, vision system type architecture. Besides providing a neural network framework for implementation of natural vision algorithms, a 2-D parallel approach could eliminate the serial bottleneck of conventional processing systems. Conversion to serial format would occur only after raw intensity data has been substantially processed. An interesting challenge arises from the fact that the mathematical formulation of natural vision algorithms does not specify the means of implementation, so that hardware implementation poses intriguing questions involving vision science.

Coon, D. D.↗

NASA NTRS1990

Architecture independent environment for developing engineering software on MIMD computers

Engineers are constantly faced with solving problems of increasing complexity and detail. Multiple Instruction stream Multiple Data stream (MIMD) computers have been developed to overcome the performance limitations of serial computers. The hardware architectures of MIMD computers vary considerably and are much more sophisticated than serial computers. Developing large scale software for a variety of MIMD computers is difficult and expensive. There is a need to provide tools that facilitate programming these machines. First, the issues that must be considered to develop those tools are examined. The two main areas of concern were architecture independence and data management. Architecture independent software facilitates software portability and improves the longevity and utility of the software product. It provides some form of insurance for the investment of time and effort that goes into developing the software. The management of data is a crucial aspect of solving large engineering problems. It must be considered in light of the new hardware organizations that are available. Second, the functional design and implementation of a software environment that facilitates developing architecture independent software for large engineering applications are described. The topics of discussion include: a description of the model that supports the development of architecture independent software; identifying and exploiting concurrency within the application program; data coherence; engineering data base and memory management.

Valimohamed, Karim A.↗

NASA NTRS1989

Parallel algorithms and architecture for computation of manipulator forward dynamics

Parallel computation of manipulator forward dynamics is investigated. Considering three classes of algorithms for the solution of the problem, that is, the O(n), the O(n exp 2), and the O(n exp 3) algorithms, parallelism in the problem is analyzed. It is shown that the problem belongs to the class of NC and that the time and processors bounds are of O(log2/2n) and O(n exp 4), respectively. However, the fastest stable parallel algorithms achieve the computation time of O(n) and can be derived by parallelization of the O(n exp 3) serial algorithms. Parallel computation of the O(n exp 3) algorithms requires the development of parallel algorithms for a set of fundamentally different problems, that is, the Newton-Euler formulation, the computation of the inertia matrix, decomposition of the symmetric, positive definite matrix, and the solution of triangular systems. Parallel algorithms for this set of problems are developed which can be efficiently implemented on a unique architecture, a triangular array of n(n+2)/2 processors with a simple nearest-neighbor interconnection. This architecture is particularly suitable for VLSI and WSI implementations. The developed parallel algorithm, compared to the best serial O(n) algorithm, achieves an asymptotic speedup of more than two orders-of-magnitude in the computation the forward dynamics.

Fijany, Amir↗

NASA NTRS1991

Closed-loop motor control using high-speed fiber optics

A closed-loop control system for controlling the operation of one or more servo motors or other controllable devices is described. The system employs a fiber optics link immune to electromagnetic interference, for transmission of control signals from a controller or controllers at a remote station to the power electronics located in proximity to the motors or other devices at the local station. At the remote station the electrical control signals are time-multiplexed, converted to a formatted serial bit stream, and converted to light signals for transmission over a single fiber of the fiber optics link. At the local station, the received optical signals are reconstructed as electrical control signals for the controlled motors or other devices. At the local station, an encoder sensor linked to the driven device generates encoded feedback signals which provide information as to a condition of the controlled device. The encoded signals are placed in a formatted serial bit stream, multiplexed, and transmitted as optical signals over a second fiber of the fiber optic link which closes the control loop of the closed-loop motor controller. The encoded optical signals received at the remote station are demultiplexed, reconstructed and coupled to the controller(s) as electrical feedback signals.

Dawson, Reginald↗

NASA NTRS1992

Modifications for a communication interface board

The objectives of this report had three sections. First, it is to modify a communication interface board by using erasable programmable logic devices to replace around SSI and MSI logic. Second, it is to simulate selected portions of the schematics using Altera Maxplus 1990 and Maxplus 2 1991 CAD programs. Third, it is to replace a first input first output (FIFO) device as well as serial to parallel and parallel to serial converters with new FIFO's that have internal converters.

Dejesuslafuente, Carlos E.↗

NASA NTRS1991

A mathematical basis for the design and design optimization of adaptive trusses in precision control

A mathematical basis for the optimal design of adaptive trusses to be used in supporting precision equipment is provided. The general theory of adaptive structures is introduced, and the global optimization problem of placing a limited number, q, of actuators, so as to maximally achieve precision control and provide prestress, is stated. Two serialized optimization problems, namely, optimal actuator placement for prestress and optimal actuator placement for precision control, are addressed. In the case of prestressing, the computation of a 'desired' prestress is discussed, the interaction between actuators and redundants in conveying the prestress is shown in its mathematical form, and a methodology for arriving at the optimal placement of actuators and additional redundants is discussed. With regard to precision control, an optimal placement scheme (for q actuators) for maximum 'authority' over the precision points is suggested. The results of the two serialized optimization problems are combined to give a suboptimal solution to the global optimization problem. A method for improving this suboptimal actuator placement scheme by iteration is presented.

Das, S. K.↗

NASA NTRS1991

A low maintenance and highly reliable fly-by-light architecture

This paper proposes a highly reliable distributed architecture for use in a commercial transport. Fly-By-Light characteristics of the architecture are a serial fiber optic backplane and redundant fiber optic data bus. The fiber optic bus is fault tolerant and Byzantine resilient. A distributed architecture (both physically and logically) can be realized by utilizing several processing clusters on the data bus. A processing cluster is composed of one or more processing units. The processing units consist of several modules. The modules of the processing unit are connected via a serial fiber optic backplane. Fault tolerance is implemented at the backplane to increase reliability and availability.

Dan Palumbo↗

NASA NTRS1993

Real-time transmission of digital video using variable-length coding

Huffman coding is a variable-length lossless compression technique where data with a high probability of occurrence is represented with short codewords, while 'not-so-likely' data is assigned longer codewords. Compression is achieved when the high-probability levels occur so frequently that their benefit outweighs any penalty paid when a less likely input occurs. One instance where Huffman coding is extremely effective occurs when data is highly predictable and differential coding can be applied (as with a digital video signal). For that reason, it is desirable to apply this compression technique to digital video transmission; however, special care must be taken in order to implement a communication protocol utilizing Huffman coding. This paper addresses several of the issues relating to the real-time transmission of Huffman-coded digital video over a constant-rate serial channel. Topics discussed include data rate conversion (from variable to a fixed rate), efficient data buffering, channel coding, recovery from communication errors, decoder synchronization, and decoder architectures. A description of the hardware developed to execute Huffman coding and serial transmission is also included. Although this paper focuses on matters relating to Huffman-coded digital video, the techniques discussed can easily be generalized for a variety of applications which require transmission of variable-length data.

Bizon, Thomas P.↗

NASA NTRS1991

A self-reconfigurable manipulator system with dextrous bracing structure

The authors present a dextrous bracing structure of a dual-arm system as a means of implementing a self-reconfigurable manipulator system. The dextrous bracing structure allows a dual-arm system to relocate the bracing point between two arms, select the type of contact as the bracing point, and lock or release the joints of individual arms. The self-reconfigurable dual-arm system is now capable of reconfiguring its topology through serial, parallel and bracing structures, supporting general types of contact, rigid or sliding, as well as locking or releasing some of its joints as needed. The focus is on an analysis of the effects of the dextrous bracing on the performance of a dual-arm system in terms of dual-arm manipulabilities and resistivities. The analysis shows that a self-reconfigurable dual-arm system with a dextrous bracing structure gives continuously varying performance characteristics ranging from serial to parallel structures.

Lee, Sukhan↗

NASA NTRS1991

Dynamic coordination of a self-reconfigurable manipulator system

The authors present the dynamic coordination of a self-reconfigurable manipulator system capable of changing its mechanical structure according to given task requirements. The self-reconfiguration is achieved by reconfiguring the topology of a dual-arm system through serial, parallel, and bracing structures. Particular emphasis is placed on the dynamic coordination of two arms having three different dual-arm topologies. The authors develop the Cartesian space dynamic models of a dual-arm system of three dual-arm topologies and derive the kinematic and dynamic constraints imposed on two arms in cooperation. Dual-arm dynamic manipulabilities are defined to quantify the dynamic performance of three dual-arm topologies in terms of the efficiency of generating Cartesian accelerations. A methodology of selecting serial, parallel, and bracing structures based on dual-arm dynamic manipulabilities is provided.

Kim, Sungbok↗

NASA NTRS1993

Implicit transient finite element structural computations on MIMD systems - FETI vs. direct solvers

A domain decomposition method for implicit schemes that require significantly less storage and is several times faster than factorization algorithms is proposed. The transient domain decomposition method is an extension of the finite element tearing and interconnecting (FETI) method for the solution of static problems. Serial and parallel performance results obtained using the CRAY Y-MP/8 and the iPSC-860/128 systems demonstrate that the FETI method is superior to both serial and parallel direct methods.

Crivelli, Luis↗

NASA NTRS1994

Efficient massively parallel simulation of dynamic channel assignment schemes for wireless cellular communications

Fast, efficient parallel algorithms are presented for discrete event simulations of dynamic channel assignment schemes for wireless cellular communication networks. The driving events are call arrivals and departures, in continuous time, to cells geographically distributed across the service area. A dynamic channel assignment scheme decides which call arrivals to accept, and which channels to allocate to the accepted calls, attempting to minimize call blocking while ensuring co-channel interference is tolerably low. Specifically, the scheme ensures that the same channel is used concurrently at different cells only if the pairwise distances between those cells are sufficiently large. Much of the complexity of the system comes from ensuring this separation. The network is modeled as a system of interacting continuous time automata, each corresponding to a cell. To simulate the model, conservative methods are used; i.e., methods in which no errors occur in the course of the simulation and so no rollback or relaxation is needed. Implemented on a 16K processor MasPar MP-1, an elegant and simple technique provides speedups of about 15 times over an optimized serial simulation running on a high speed workstation. A drawback of this technique, typical of conservative methods, is that processor utilization is rather low. To overcome this, new methods were developed that exploit slackness in event dependencies over short intervals of time, thereby raising the utilization to above 50 percent and the speedup over the optimized serial code to about 120 times.

Greenberg, Albert G.↗

NASA NTRS1994

Performance analysis of three dimensional integral equation computations on a massively parallel computer

The purpose of this study is to investigate the performance of the integral equation computations using numerical source field-panel method in a massively parallel processing (MPP) environment. A comparative study of computational performance of the MPP CM-5 computer and conventional Cray-YMP supercomputer for a three-dimensional flow problem is made. A serial FORTRAN code is converted into a parallel CM-FORTRAN code. Some performance results are obtained on CM-5 with 32, 62, 128 nodes along with those on Cray-YMP with a single processor. The comparison of the performance indicates that the parallel CM-FORTRAN code near or out-performs the equivalent serial FORTRAN code for some cases.

Logan, Terry G.↗

NASA NTRS1994

Scalability study of parallel spatial direct numerical simulation code on IBM SP1 parallel supercomputer

The implementation and the performance of a parallel spatial direct numerical simulation (PSDNS) code are reported for the IBM SP1 supercomputer. The spatially evolving disturbances that are associated with laminar-to-turbulent in three-dimensional boundary-layer flows are computed with the PS-DNS code. By remapping the distributed data structure during the course of the calculation, optimized serial library routines can be utilized that substantially increase the computational performance. Although the remapping incurs a high communication penalty, the parallel efficiency of the code remains above 40% for all performed calculations. By using appropriate compile options and optimized library routines, the serial code achieves 52-56 Mflops on a single node of the SP1 (45% of theoretical peak performance). The actual performance of the PSDNS code on the SP1 is evaluated with a 'real world' simulation that consists of 1.7 million grid points. One time step of this simulation is calculated on eight nodes of the SP1 in the same time as required by a Cray Y/MP for the same simulation. The scalability information provides estimated computational costs that match the actual costs relative to changes in the number of grid points.

Hanebutte, Ulf R.↗