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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16

Ensemble voting-based fault classification and location identification for a distribution system with microgrids using smart meter measurements

This study presents an ensemble learning approach for fault classification and location identification in a smart distribution network containing photovoltaics (PV)-based microgrid. Lack of available data points and the unbalanced nature of the distribution system make fault handling a challenging task for utilities. The proposed method uses event-driven voltage data from smart meters to classify and locate faults. The ensemble voting classifier is composed of three base learners; random forest, k-nearest neighbours, and artificial neural network. The fault location (FL) task has been formulated as a classification problem where the fault type is classified in the first step and based on the fault type, the faulty bus is identified. The method is tested on IEEE-123 bus system modified with added PV-based microgrid along with dynamic loading conditions and varying fault resistances from 0 to 20 Ω for both unbalanced and balanced fault types. A further sensitivity analysis has been done to test the robustness of the proposed method under various noise levels and data loss errors in the smart meter measurements. The ensemble method shows improved performance and robustness compared to some previously proposed FL methods. Finally, the proposed method has been experimentally validated on a real-time simulation-based testbed using a state-of-the-art digital real-time simulator, industry standard DNP3 communication protocol and a cpu-based control centre running the FL algorithm.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Design of a modular digital computer system, CDRL no. D001, final design plan

The engineering breadboard implementation for the CDRL no. D001 modular digital computer system developed during design of the logic system was documented. This effort followed the architecture study completed and documented previously, and was intended to verify the concepts of a fault tolerant, automatically reconfigurable, modular version of the computer system conceived during the architecture study. The system has a microprogrammed 32 bit word length, general register architecture and an instruction set consisting of a subset of the IBM System 360 instruction set plus additional fault tolerance firmware. The following areas were covered: breadboard packaging, central control element, central processing element, memory, input/output processor, and maintenance/status panel and electronics.

Easton, R. A.↗

Redundant asynchronous microprocessor system for fault tolerant flight control and navigation

Unlike their synchronized counterparts, redundant channels in an asynchronous flight system can, under no-fault conditions, exhibit cross-channel data disparities. Sources of these errors are examined in terms of the general, individual functions of the flight control and navigation application in the asynchronous digital environment. The effects of asynchronism on trajectory programmers, dynamic control algorithms and data reconstruction processes are examined in terms of data skews, data latencies, and clock rate uncertainties. An example is presented in which time corrections are applied to reduce the data disparities. Practical limitations of the approach of the example are discussed.

Dunn, W. R.↗

Research study on multi-KW-DC distribution system

A detailed definition of the HVDC test facility and the equipment required to implement the test program are provided. The basic elements of the test facility are illustrated, and consist of: the power source, conventional and digital supervision and control equipment, power distribution harness and simulated loads. The regulated dc power supplies provide steady-state power up to 36 KW at 120 VDC. Power for simulated line faults will be obtained from two banks of 90 ampere-hour lead-acid batteries. The relative merits of conventional and multiplexed power control will be demonstrated by the Supervision and Monitor Unit (SMU) and the Automatically Controlled Electrical Systems (ACES) hardware. The distribution harness is supported by a metal duct which is bonded to all component structures and functions as the system ground plane. The load banks contain passive resistance and reactance loads, solid state power controllers and active pulse width modulated loads. The HVDC test facility is designed to simulate a power distribution system for large aerospace vehicles.

Berkery, E. A.↗

Generating Weighted Test Patterns for VLSI Chips

Improved built-in self-testing circuitry for very-large-scale integrated (VLSI) digital circuits based on version of weighted-test-pattern-generation concept, in which ones and zeros in pseudorandom test patterns occur with probabilities weighted to enhance detection of certain kinds of faults. Requires fewer test patterns and less computation time and occupies less area on circuit chips. Easy to relate switching activity in outputs with fault-detection activity by use of probabilistic fault-detection techniques.

Siavoshi, Fardad↗

Advanced Human-System Interface Risk Analysis Based on Redundancy-guided Systems-theoretic Hazard Analysis and Human Reliability Analysis

Human-system interfaces (HSIs) play an important role in enabling operators to communicate with the nuclear power plant (NPP) side. Getting the information required to understand a NPP’s current status or perform necessary actions for responding to a given operational context are representative operator tasks performed using HSIs. To date, HSIs have been mainly evaluated in the context of human reliability analysis (HRA). However, the current HSI evaluation that occurs during HRA may be challengeable on two fronts: (1) reflecting the unique characteristics of HSI systems and (2) considering situations in which HSIs are poorly operated due to software/hardware malfunctions. Accordingly, this study proposes an approach for specifically evaluating HSIs for digital instrumentation and controls (DI&C) systems, using Redundancy-guided Systems-theoretic Hazard Analysis (RESHA) and HRA. RESHA is a method for analyzing DI&C systems with redundancy features. In this study, we investigate how HSIs are evaluated in existing HRA methods, and what challenges exist in the current approaches. To better evaluate HSIs for DI&C systems, this study modifies the existing HSI evaluation process by additionally modeling the HSI back- and front- ends. In this paper, a HSI fault tree for the APR1400 DI&C system is introduced through a piping and instrumentation diagram. It then touches upon what aspects of the suggested method must be further researched.

99 GENERAL AND MISCELLANEOUS↗

The fault-tree compiler

The Fault Tree Compiler Program is a new reliability tool used to predict the top event probability for a fault tree. Five different gate types are allowed in the fault tree: AND, OR, EXCLUSIVE OR, INVERT, and M OF N gates. The high level input language is easy to understand and use when describing the system tree. In addition, the use of the hierarchical fault tree capability can simplify the tree description and decrease program execution time. The current solution technique provides an answer precise (within the limits of double precision floating point arithmetic) to the five digits in the answer. The user may vary one failure rate or failure probability over a range of values and plot the results for sensitivity analyses. The solution technique is implemented in FORTRAN; the remaining program code is implemented in Pascal. The program is written to run on a Digital Corporation VAX with the VMS operation system.

Martensen, Anna L.↗

F-8 digital fly-by-wire aircraft analytic redundancy management flight test experience

The formulation and flight test results of an algorithm to detect and isolate the first failure of any one of twelve duplex control sensors being monitored are described. The technique uses like sensor output differences for fault detection while relying upon analytic redundancy relationships among unlike quantities to isolate the faulty sensor. The fault isolation logic utilizes the modified sequential probability ratio test, which explicitly accommodates the inevitable irreducible low frequency errors present in the analytic redundancy residuals. In addition, the algorithm uses sensor output selftest, which takes advantage of the duplex sensor structure by immediately removing a highly erratic sensor from control calculations and analytic redundancy relationships while awaiting a definitive fault isolation decision via analytic redundancy.

Deckert, J. C.↗

The Single Event Effect Characteristics of the 486-DX4 Microprocessor

This research describes the development of an experimental radiation testing environment to investigate the single event effect (SEE) susceptibility of the 486-DX4 microprocessor. SEE effects are caused by radiation particles that disrupt the logic state of an operating semiconductor, and include single event upsets (SEU) and single event latchup (SEL). The relevance of this work can be applied directly to digital devices that are used in spaceflight computer systems. The 486-DX4 is a powerful commercial microprocessor that is currently under consideration for use in several spaceflight systems. As part of its selection process, it must be rigorously tested to determine its overall reliability in the space environment, including its radiation susceptibility. The goal of this research is to experimentally test and characterize the single event effects of the 486-DX4 microprocessor using a cyclotron facility as the fault-injection source. The test philosophy is to focus on the "operational susceptibility," by executing real software and monitoring for errors while the device is under irradiation. This research encompasses both experimental and analytical techniques, and yields a characterization of the 486-DX4's behavior for different operating modes. Additionally, the test methodology can accommodate a wide range of digital devices, such as microprocessors, microcontrollers, ASICS, and memory modules, for future testing. The goals were achieved by testing with three heavy-ion species to provide different linear energy transfer rates, and a total of six microprocessor parts were tested from two different vendors. A consistent set of error modes were identified that indicate the manner in which the errors were detected in the processor. The upset cross-section curves were calculated for each error mode, and the SEU threshold and saturation levels were identified for each processor. Results show a distinct difference in the upset rate for different configurations of the on-chip cache, as well as proving that one vendor is superior to the other in terms of latchup susceptibility. Results from this testing were also used to provide a mean-time-between-failure estimate of the 486-DX4 operating in the radiation environment for the International Space Station.

Kouba, Coy↗

Smart Labs Final Report Summer 2021

The Smart Labs Project at Los Alamos National Laboratory (LANL) is an initiative derived from The University of California, Irvine and is part of the Department of Energy’s (DOE) Better Buildings Challenge. These carbon abatement strategies aim to reduce energy consumption of laboratories while also maintaining health and safety requirements. Smart Labs designs incorporate seven key principles which are: digital control systems, demand-based ventilation, low power-density demand-based lighting, exhaust fan discharge velocity optimization, pressure drop optimization, fume hood flow optimization, and commissioning with automated cross-platform fault detection. As the ALDCP Smart Labs team for the summer of 2021, the scope of the project is to determine the energy savings within building 03-1698 (Material Science Laboratory - MSL). Over the past couple of years, the Sustainability Group has been adding Smart Labs upgrades into the MSL building and the summer team would like to understand the impact made for the overall energy consumption/demand and safety for the building, determine the overall return on investment (ROI), and recommend more Smart Labs upgrades that can be added to the MSL building. The goal is to enable the UI FOD (Utilities and Infrastructure Facility Operation Division) to promote more Smart Labs projects in the future and further the reputation LANL and DOE facilities have of being leading examples of developers of high performing buildings.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Modular Battery Charge Controller

A new approach to masterless, distributed, digital-charge control for batteries requiring charge control has been developed and implemented. This approach is required in battery chemistries that need cell-level charge control for safety and is characterized by the use of one controller per cell, resulting in redundant sensors for critical components, such as voltage, temperature, and current. The charge controllers in a given battery interact in a masterless fashion for the purpose of cell balancing, charge control, and state-of-charge estimation. This makes the battery system invariably fault-tolerant. The solution to the single-fault failure, due to the use of a single charge controller (CC), was solved by implementing one CC per cell and linking them via an isolated communication bus [e.g., controller area network (CAN)] in a masterless fashion so that the failure of one or more CCs will not impact the remaining functional CCs. Each micro-controller-based CC digitizes the cell voltage (V(sub cell)), two cell temperatures, and the voltage across the switch (V); the latter variable is used in conjunction with V(sub cell) to estimate the bypass current for a given bypass resistor. Furthermore, CC1 digitizes the battery current (I1) and battery voltage (V(sub batt) and CC5 digitizes a second battery current (I2). As a result, redundant readings are taken for temperature, battery current, and battery voltage through the summation of the individual cell voltages given that each CC knows the voltage of the other cells. For the purpose of cell balancing, each CC periodically and independently transmits its cell voltage and stores the received cell voltage of the other cells in an array. The position in the array depends on the identifier (ID) of the transmitting CC. After eight cell voltage receptions, the array is checked to see if one or more cells did not transmit. If one or more transmissions are missing, the missing cell(s) is (are) eliminated from cell-balancing calculations. The cell-balancing algorithm is based on the error between the cell s voltage and the other cells and is categorized into four zones of operation. The algorithm is executed every second and, if cell balancing is activated, the error variable is set to a negative low value. The largest error between the cell and the other cells is found and the zone of operation determined. If the error is zero or negative, then the cell is at the lowest voltage and no balancing action is needed. If the error is less than a predetermined negative value, a Cell Bad Flag is set. If the error is positive, then cell balancing is needed, but a hysteretic zone is added to prevent the bypass circuit from triggering repeatedly near zero error. This approach keeps the cells within a predetermined voltage range.

Button, Robert↗

Flight test results for the F-8 digital fly-by-wire aircraft control sensor analytic redundancy management technique

This paper reviews the formulation and flight test results of an algorithm to detect and isolate the first failure of any one of twelve duplex control sensor signals being monitored. The technique uses like-signal differences for fault detection while relying upon analytic redundancy relationships among unlike quantities to isolate the faulty sensor. The fault isolation logic utilizes the modified sequential probability ratio test, which explicitly accommodates the inevitable irreducible low frequency errors present in the analytic redundancy residuals. In addition, the algorithm uses sensor output selftest, which takes advantage of the duplex sensor structure by immediately removing a highly erratic sensor from control calculations and analytic redundancy relationships while awaiting a definitive fault isolation decision via analytic redundancy. This study represents a proof of concept demonstration of a methodology that can be applied to duplex or higher flight control sensor configurations and, in addition, can monitor the health of one simplex signal per analytic redundancy relationship.

Deckert, J. C.↗

Detecting Structural Failures Via Acoustic Impulse Responses

Advanced method of acoustic pulse reflectivity testing developed for use in determining sizes and locations of failures within structures. Used to detect breaks in electrical transmission lines, detect faults in optical fibers, and determine mechanical properties of materials. In method, structure vibrationally excited with acoustic pulse (a "ping") at one location and acoustic response measured at same or different location. Measured acoustic response digitized, then processed by finite-impulse-response (FIR) filtering algorithm unique to method and based on acoustic-wave-propagation and -reflection properties of structure. Offers several advantages: does not require training, does not require prior knowledge of mathematical model of acoustic response of structure, enables detection and localization of multiple failures, and yields data on extent of damage at each location.

Bayard, David S.↗

The Fault Tree Compiler (FTC): Program and mathematics

The Fault Tree Compiler Program is a new reliability tool used to predict the top-event probability for a fault tree. Five different gate types are allowed in the fault tree: AND, OR, EXCLUSIVE OR, INVERT, AND m OF n gates. The high-level input language is easy to understand and use when describing the system tree. In addition, the use of the hierarchical fault tree capability can simplify the tree description and decrease program execution time. The current solution technique provides an answer precisely (within the limits of double precision floating point arithmetic) within a user specified number of digits accuracy. The user may vary one failure rate or failure probability over a range of values and plot the results for sensitivity analyses. The solution technique is implemented in FORTRAN; the remaining program code is implemented in Pascal. The program is written to run on a Digital Equipment Corporation (DEC) VAX computer with the VMS operation system.

Butler, Ricky W.↗

Power Actuation and Switching Module Development

The Deep Space Avionics (DSA) Project is developing a Power Actuation and Switching Module (PASM). This component enables a modular and scalable design approach for power switching applications, which can result in a wide variety of power switching architectures using this simple building block. The PASM is designed to provide most of the necessary power switching functions of spacecraft for various Deep Space missions including future missions to Mars, comets, Jupiter and its moons. It is fabricated using an A SIC process that is tolerant of high radiation. The development includes two application specific integrated circuits (ASICs) and support circuitry all packaged using High Density Interconnect (HDI) technology. It can be operated in series or parallel with other PASMs, It can be used as a high-side or low-side switch and it can drive thruster valves, pyrotechnic devices such as NASA standard initiators, bus shunt resistors, and regular spacecraft component loads. Each PASM contains two independent switches with internal current limiting and over-current trip-off functions to protect the power subsystem from load faults. During turnon and turnoff each switch can limit the rate of current change (di/dt) to a value determined by the user. Threeway majority-voted On/Off commandability and full switch status telemetry (both analog and digital) are built into the module. This paper describes the development process used to design, model, fabricate, and test these compact and versatile power switches. Preliminary test results from prototype HDI PASM hardware are also discussed.

Power Actuation and Switching Module (PASM)↗

Feature extraction for subtle anomaly detection using semi-supervised learning

The demand for automated and effective monitoring techniques has soared with the increased digitization of industrial monitoring systems. State-of-the-art machine learning methods are effectively detecting abrupt changes in system states. However, these methods lack comparable maturity in detecting subtle changes that may be signs of incipient faults. This manuscript argues that the current anomaly detection methods can be enhanced by exploring weak patterns to enable subtle variation detection. Specifically, the concept of semi-supervised learning is employed, with labels representing knowledge about some anomalous conditions of a system. The basic idea is to extract a candidate set of weak patterns discarded by state-of-the-art baselining algorithms. With few labeled anomalous data, the algorithm selects the weak patterns and allows for their possible fusion using the highest sensitivity to the labeled anomalies. Here, the method’s applicability is demonstrated using a representative pressurized water reactor (PWR) model simulated by Dymola.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Towards a Stronger Foundation: Digitizing Commercial Buildings with Brick to Enable Portable Advanced Applications

Most large commercial buildings have digital controls for their heating, ventilation, and air-conditioning (HVAC) and lighting systems with the potential to implement advanced control strategies and data analytics. However, advanced control strategies and data analytics are rarely deployed at scale due to non-standard naming conventions and heterogenous building configurations. Semantic metadata standards, like Brick, show promise to proliferate these applications across many buildings, but they have not been widely adopted by industry due to barriers such as perceived risk and unfamiliarity with the technology. This paper describes the workflow we established and evaluated while using it to develop over ten Brick models of existing buildings. Through this process, we observed that digitizing existing commercial buildings is a cost and labor-intensive effort in which understanding the buildings’ data streams is the major bottleneck. Yet, we conclude this investment is worthwhile since various use case applications such as fault detection and diagnostics, thermal comfort analysis, and HVAC control optimization can utilize the same Brick model. The paper also explores the challenges and lessons learned we encountered while creating these data models, such as: 1) difficulties in finding metadata descriptions and relationships for existing buildings; 2) handling missing concepts in the schema needed to model a building; 3) lack of guidance on how to structure the data model or how much detail to include; 4) unfamiliarity with technologies, which makes the learning curve steep for applications developers. Finally, we also describe future directions for semantic metadata research and development to make such transformative technologies more accessible to practitioners.

Roa, Carlos Duarte↗