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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
NASA NTRS2003

Effects Of Environmental And Operational Stresses On RF MEMS Switch Technologies For Space Applications

Micro Electro Mechanical Systems (MEMS) have been heralded for their ability to provide tremendous advantages in electronic systems through increased electrical performance, reduced power consumption, and higher levels of device integration with a reduction of board real estate. RF MEMS switch technology offers advantages such as low insertion loss (0.1- 0.5 dB), wide bandwidth (1 GHz-100 GHz), and compatibility with many different process technologies (quartz, high resistivity Si, GaAs) which can replace the use of traditional electronic switches, such as GaAs FETS and PIN Diodes, in microwave systems for low signal power (x < 500 mW) applications. Although the electrical characteristics of RF MEMS switches far surpass any existing technologies, the unknown reliability, due to the lack of information concerning failure modes and mechanisms inherent to MEMS devices, create an obstacle to insertion of MEMS technology into high reliability applications. All MEMS devices are sensitive to moisture and contaminants, issues easily resolved by hermetic or near-hermetic packaging. Two well-known failure modes of RF MEMS switches are charging in the dielectric layer of capacitive membrane switches and contact interface stiction of metal-metal switches. Determining the integrity of MEMS devices when subjected to the shock, vibration, temperature extremes, and radiation of the space environment is necessary to facilitate integration into space systems. This paper will explore the effects of different environmental stresses, operational life cycling, temperature, mechanical shock, and vibration on the first commercially available RF MEMS switches to identify relevant failure modes and mechanisms inherent to these device and packaging schemes for space applications. This paper will also describe RF MEMS Switch technology under development at NASA GSFC.

Jah, Muzar↗
NASA NTRS2002

The four-gate transistor

The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

neuro-prosthetic devices cortical signals↗
NASA NTRS1995

Hydrogen Effects on GaAs, Status and Progress

It has been observed that GaAs devices in hermetically sealed packages when exposed to temperatures as low as 125oC can exhibit unacceptable degradation in both RF and DC characteristics. The source of the problem was found to be hydrogen that has been absorbed in the package's metals (Kovar, plating, etc.) and converted into atomic hydrogen within the Pt metallization of the gate structure. Subsequently, atomic hydrogen diffuses into the channel region of the FET structure and neutralizes the Si donors, resulting in a degradation of the device characteristics. Most of the data indicates the onslaught of the problem to occur after 500 hours at 125oC. This onslaught has been observed to be dependent on the thickness and processing conditions of the passivation layer, the sealing environment, and the amount of Pt or Pd in the gate structure of the device.

Hydrogen GaAs↗
NASA NTRS1996

Hydrogen Effects on GaAs Device Reliability

GaAs and InP devices in hermetically sealed packages have been observed to exhibit unacceptable degradation in both RF and DC characteristics. This degradation has been observed to occur at temperatures as low as 125oC. The source of the degradation has been linked to hydrogen gas that has been absorbed in the package's metals (Kovar, plating, etc.) and converted into atomic hydrogen within the Pt or Pd metallization of the gate structure. Subsequently, atomic hydrogen diffuses into the channel region of the FET structure and neutralizes the Si donors, resulting in a degradation of the device characteristics.

Gallium Arsenide↗
NASA NTRS1994

Clementine RRELAX SRAM Particle Spectrometer

The Clementine RRELAX radiation monitor chip consists of a p-FET total dose monitor and a 4-kbit SRAM particle spectrometer. Eight of these chips were included in the RRELAX and used to detect the passage of the Clementine (S/C) and the innerstage adapter (ISA) through the earth's radiation belts and the 21-Feb 1994 solar flare. This is the first space flight for this 1.2 micron rad-soft custom CMOS radiation monitor. This paper emphasizes results from the SRAM particle detector which showed that it a) has a detection range of five orders of magnitude relative to the 21-Feb solar flare, b) is not affected by electrons, and c) detected microflares occurring with a 26.5 day period.

Clementine↗
NASA NTRS1997

Varying potential silicon carbide gas sensor

A hydrocarbon gas detection device operates by dissociating or electro-chemically oxidizing hydrocarbons adsorbed to a silicon carbide detection layer. Dissociation or oxidation are driven by a varying potential applied to the detection layer. Different hydrocarbon species undergo reaction at different applied potentials so that the device is able to discriminate among various hydrocarbon species. The device can operate at temperatures between 100.degree. C. and at least 650.degree. C., allowing hydrocarbon detection in hot exhaust gases. The dissociation reaction is detected either as a change in a capacitor or, preferably, as a change of current flow through an FET which incorporates the silicon carbide detection layers. The silicon carbide detection layer can be augmented with a pad of catalytic material which provides a signal without an applied potential. Comparisons between the catalytically produced signal and the varying potential produced signal may further help identify the hydrocarbon present.

Shields, Virgil B.↗
NASA NTRS2008

A 1 GHz Oscillator-Type Active Antenna

Wireless sensors are desired for monitoring aircraft engines, automotive engines, industrial machinery, and many other applications. The most important requirement of sensors is that they do not interfere with the environment that they are monitoring. Therefore, wireless sensors must be small, which demands a high level of integration. Sensors that modulate an oscillator active antenna have advantages of small size, high level of integration, and lower packaging cost. Several types of oscillator active antennas have been reported. Ip et al. demonstrated a CPW line fed patch antenna with a feedback loop [1]. No degradation in performance was noticed without a ground plane. A GaAs FET was used in an amplifier/oscillator-based active antenna [2]. An oscillator based on a Cree SiC transistor was designed and characterized in [3]. This paper reports the integration of the SiC Clapp oscillator to a slotline loop antenna.

Jordan, Jennifer L.↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
NASA NTRS2009

SiC Optically Modulated Field-Effect Transistor

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification of the photon-detection signal. A family of operating curves characterizing the OFET can be generated in a series of measurements performed at different intensities of incident ultraviolet light.

Tabib-Azar, Massood↗
NASA NTRS2008

NASA Tech Briefs, April 2008

Topics covered include: Gas Sensors Based on Coated and Doped Carbon Nanotubes; Tactile Robotic Topographical Mapping Without Force or Contact Sensors; Thin-Film Magnetic-Field-Response Fluid-Level Sensor for Non-Viscous Fluids; Progress in Development of Improved Ion-Channel Biosensors; Simulating Operation of a Complex Sensor Network; Using Transponders on the Moon to Increase Accuracy of GPS; Controller for Driving a Piezoelectric Actuator at Resonance; Coaxial Electric Heaters; Dual-Input AND Gate From Single-Channel Thin-Film FET; High-Density, High-Bandwidth, Multilevel Holographic Memory; Fabrication of Gate-Electrode Integrated Carbon-Nanotube Bundle Field Emitters; Hydroxide-Assisted Bonding of Ultra-Low-Expansion Glass; Photochemically Synthesized Polyimides; Optimized Carbonate and Ester-Based Li-Ion Electrolytes; Compact 6-DOF Stage for Optical Adjustments; Ultrasonic/Sonic Impacting Penetrators; Miniature, Lightweight, One-Time-Opening Valve; Supplier Management System; Improved CLARAty Functional-Layer/Decision-Layer Interface; JAVA Stereo Display Toolkit; Remote-Sensing Time Series Analysis, a Vegetation Monitoring Tool; PyPele Rewritten To Use MPI; Data Assimilation Cycling for Weather Analysis; Hydrocyclone/Filter for Concentrating Biomarkers from Soil; Activating STAT3 Alpha for Promoting Healing of Neurons; and Probing a Spray Using Frequency-Analyzed Light Scattering.

Source record↗
NASA NTRS2008

NASA Tech Briefs, January 2008

Topics covered include: Induction Charge Detector with Multiple Sensing Stages; Generic Helicopter-Based Testbed for Surface Terrain Imaging Sensors; Robot Electronics Architecture; Optimized Geometry for Superconducting Sensing Coils; Sensing a Changing Chemical Mixture Using an Electronic Nose; Inertial Orientation Trackers with Drift Compensation; Microstrip Yagi Antenna with Dual Aperture-Coupled Feed; Patterned Ferroelectric Films for Tunable Microwave Devices; Micron-Accurate Laser Fresnel-Diffraction Ranging System; Efficient G(sup 4)FET-Based Logic Circuits; Web-Enabled Optoelectronic Particle-Fallout Monitor; SiO2/TiO2 Composite for Removing Hg from Combustion Exhaust; Lightweight Tanks for Storing Liquefied Natural Gas; Hybrid Wound Filaments for Greater Resistance to Impacts; Making High-Tensile-Strength Amalgam Components; Bonding by Hydroxide-Catalyzed Hydration and Dehydration; Balanced Flow Meters without Moving Parts; Deflection-Compensating Beam for Use inside a Cylinder; Four-Point-Latching Microactuator; Curved Piezoelectric Actuators for Stretching Optical Fibers; Tunable Optical Assembly with Vibration Dampening; Passive Porous Treatment for Reducing Flap Side-Edge Noise; Cylindrical Piezoelectric Fiber Composite Actuators; Patterning of Indium Tin Oxide Films; Gimballed Shoulders for Friction Stir Welding; Improved Thermal Modulator for Gas Chromatography; Nuclear-Spin Gyroscope Based on an Atomic Co-Magnetometer; Utilizing Ion-Mobility Data to Estimate Molecular Masses; Optical Displacement Sensor for Sub-Hertz Applications; Polarization/Spatial Combining of Laser-Diode Pump Beams; Spatial Combining of Laser-Diode Beams for Pumping an NPRO; Algorithm Optimally Orders Forward-Chaining Inference Rules; Project Integration Architecture; High Power Amplifier and Power Supply; Estimating Mixing Heights Using Microwave Temperature Profiler; and Multiple-Cone Sunshade for a Spaceborne Telescope.

Source record↗
NASA NTRS2008

High Power Amplifier and Power Supply

A document discusses the creation of a high-voltage power supply (HVPS) that is able to contain voltages up to -20 kV, keep electrical field strengths to below 200 V/mil (approximately equal to 7.87 kV/mm), and can provide a 200-nanosecond rise/fall time focus modulator swinging between cathode potential of 16.3 kV and -19.3 kV. This HVPS can protect the 95-GHz, pulsed extended interaction klystron (EIK) from arcs/discharges from all sources, including those from within the EIK fs vacuum envelope. This innovation has a multi-winding pulse transformer design, which uses new winding techniques to provide the same delays and rise/fall times (less than 10 nanoseconds) at different potential levels ranging from -20 kV to -16 kV. Another feature involves a high-voltage printed-wiring board that was corona-free at -20 kV DC with a 3- kV AC swing. The corona-free multilayer high-voltage board is used to simulate fields of less than 200 V/mil (approximately equal to 7.87 kV/mm) at 20 kV DC. Drive techniques for the modulator FETs (field-effect transistors) (four to 10 in a series) were created to change states (3,000-V swing) without abrupt steps, while still maintaining required delays and transition times. The packing scheme includes a potting mold to house a ten-stage modulator in the space that, in the past, only housed a four-stage modulator. Problems keeping heat down were solved using aluminum oxide substrate in the high-voltage section to limit temperature rise to less than 10 while withstanding -20 kV DC voltage and remaining corona-free.

Duong, Johnny↗
NASA NTRS2009

Zinc Alloys for the Fabrication of Semiconductor Devices

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

Ryu, Yungryel↗
NASA NTRS2009

Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

Phillips, Thomas A.↗
NASA NTRS2009

Analysis of the Measurement and Modeling of a Digital Inverter Based on a Ferroelectric Transistor

The use of ferroelectric materials for digital memory devices is widely researched and implemented, but ferroelectric devices also possess unique characteristics that make them have interesting and useful properties in digital circuits. Because ferroelectric transistors possess the properties of hysteresis and nonlinearity, a digital inverter containing a FeFET has very different characteristics than one with a traditional FET. This paper characterizes the properties of the measurement and modeling of a FeFET based digital inverter. The circuit was set up using discrete FeFETs. The purpose of this circuit was not to produce a practical integrated circuit that could be inserted directly into existing digital circuits, but to explore the properties and characteristics of such a device and to look at possible future uses. Input and output characteristics are presented, as well as timing measurements. Comparisons are made between the ferroelectric device and the properties of a standard digital inverter. Potential benefits and possible uses of such a device are presented.

MacLeod, Todd C.↗
NASA NTRS2009

Lattice-Matched Semiconductor Layers on Single Crystalline Sapphire Substrate

SiGe is an important semiconductor alloy for high-speed field effect transistors (FETs), high-temperature thermoelectric devices, photovoltaic solar cells, and photon detectors. The growth of SiGe layer is difficult because SiGe alloys have different lattice constants from those of the common Si wafers, which leads to a high density of defects, including dislocations, micro-twins, cracks, and delaminations. This innovation utilizes newly developed rhombohedral epitaxy of cubic semiconductors on trigonal substrates in order to solve the lattice mismatch problem of SiGe by using trigonal single crystals like sapphire (Al2O3) as substrate to give a unique growth-orientation to the SiGe layer, which is automatically controlled at the interface upon sapphire (0001). This technology is different from previous silicon on insulator (SOI) or SGOI (SiGe on insulator) technologies that use amorphous SiO2 as the growth plane. A cubic semiconductor crystal is a special case of a rhombohedron with the inter-planar angle, alpha = 90 deg. With a mathematical transformation, all rhombohedrons can be described by trigonal crystal lattice structures. Therefore, all cubic lattice constants and crystal planes (hkl) s can be transformed into those of trigonal crystal parameters. These unique alignments enable a new opportunity of perfect lattice matching conditions, which can eliminate misfit dislocations. Previously, these atomic alignments were thought to be impossible or very difficult. With the invention of a new x-ray diffraction measurement method here, growth of cubic semiconductors on trigonal crystals became possible. This epitaxy and lattice-matching condition can be applied not only to SiGe (111)/sapphire (0001) substrate relations, but also to other crystal structures and other materials, including similar crystal structures which have pointgroup rotational symmetries by 120 because the cubic (111) direction has 120 rotational symmetry. The use of slightly miscut (less than plus or minus 10 deg.) sapphire (0001) substrate can be used to improve epitaxial relationships better by providing attractive atomic steps in the epitaxial process.

Choi, Sang↗
NASA NTRS2007

Maintaining Stability During a Conducted-Ripple EMC Test

An improved technique, and electronic circuitry to implement the technique, have been developed for a military-standard electromagnetic-compatibility (EMC) test in which one analyzes susceptibility to low-frequency ripple conducted into the equipment under test via a DC power line. In the traditional technique for performing the particular test, the ripple is coupled onto the DC power line via a transformer. Depending upon some design details of the equipment under test, the inductance of the transformer can contribute a degree of instability that results in an oscillation of amplitude large enough to destroy the equipment. It is usually possible to suppress the oscillation by connecting a damping resistor to the primary terminals of the ripple-injection transformer. However, it is important to emphasize the usually in the preceding sentence: sometimes, the resistive damping becomes insufficient to suppress destructive oscillation. In addition, undesirably, the resistor contributes to power dissipation and power demand, and thereby also necessitates the use of a larger ripple voltage amplifier. Yet another disadvantage of the transformer-coupling technique is that the transformer introduces low-frequency distortion of the injected ripple voltage. The improved technique makes it possible to inject ripple with very low distortion at low frequency, without inducing oscillation. In this technique, a transformer is not used: Instead, power is fed to the equipment under test via series power field-effect transistors (FETs) controlled by a summing operational amplifier. One of the inputs to the amplifier controls the DC component of the power-line voltage; the other input, generated by an external oscillator, controls the ripple component. The circuitry for implementing this technique includes panel displays, an internal power supply for the operational amplifier and panel displays, and amplitude controls for the DC and ripple powerline voltage components.

Vorperian, Vatche↗