Evolving electronic circuits for computational intelligence hardware
This paper discusses the use of Evolvable Hardware (EHW) in automatic synthesis of electronic circuits for computational intelligence (CI) hardware.
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This paper discusses the use of Evolvable Hardware (EHW) in automatic synthesis of electronic circuits for computational intelligence (CI) hardware.
The field of evolvable hardware or bio-inspired hardware holds the promise of automatically engineering complex electronic systems that remain adaptive and fault-tolerant during use.
Evolvable hardware addresses hardware that self-organizes/reconfigures under the guidance of evolutionary mechanisms. Some experiments in evolving at transistor level are briefly presented and the perspective of trnsistors as functional approximators is suggested.
We propose a tuning method for MEMS gyroscopes based on evolutionary computation to efficiently increase the sensitivity of MEMS gyroscopes through tuning. The tuning method was tested for the second generation JPL/Boeing Post-resonator MEMS gyroscope using the measurement of the frequency response of the MEMS device in open-loop operation. We also report on the development of a hardware platform for integrated tuning and closed loop operation of MEMS gyroscopes. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). The hardware platform easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.
This paper presents the current state of the autonomous dynamically self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application is implemented on the eDNA architecture.
Evolvable hardware is a recently proposed technology in which reconfigurable hardware under the control of and evolutionary (genetic) algorithm can automatically self-reconfigure into sonfigurations with the desired behavior.
Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm.
This paper presents the laboratory evaluation of a commercial Microgrid Management System (MGMS) implemented in the real-world Bronzeville Microgrid which features a futuristic scenario with high renewable energy integration and the use of multiple Grid-Forming (GFM) inverters. The primary objective of the performance evaluation for the MGMS is to assess the MGMS's capability to dispatch GFM units, including a GFM PV unit and two GFM battery units, to maintain the system stability and ensure economic operation, thus guaranteeing the microgrid's resilience during prolonged outages and dynamic events. The laboratory controller hardware-in-the-loop provides realistic testing environment through detailed electromagnetic transient modeling of the microgrid system, hardware MGMS, and standard communication protocols (DNP3). The CHIL evaluation shows how the MGMS effectively manages the GFM inverters, highlighting its performance in maintaining stability, reliability, and survivability in a microgrid environment with a high penetration of renewable energy sources.
This paper presents the laboratory evaluation of a commercial Microgrid Management System (MGMS) implemented in the real-world Bronzeville Microgrid which features a futuristic scenario with high renewable energy integration and the use of multiple Grid-Forming (GFM) inverters. The primary objective of the performance evaluation for the MGMS is to assess the MGMS's capability to dispatch GFM units, including a GFM PV unit and two GFM battery units, to maintain the system stability and ensure economic operation, thus guaranteeing the microgrid's resilience during prolonged outages and dynamic events. The laboratory controller hardware-in-the-loop provides realistic testing environment through detailed electromagnetic transient modeling of the microgrid system, hardware MGMS, and standard communication protocols (DNP3). This CHIL evaluation shows how the MGMS effectively manages the GFM inverters, highlighting its performance in maintaining stability, reliability, and survivability in a microgrid environment with a high penetration of renewable energy sources.
Formal methods use mathematical logic and equations to prove that a system or code is secure. In this poster, I examine existing formal methods tools and their application for projects working to remediate vulnerabilities in hardware and hardware description language. This poster is focused on the tools ReWire and AutoGenILA and I hope to evaluate their benefits and weaknesses with the intention of creating an internal report on the application and weaknesses of existing formal methods tools and identifying gaps for future formal methods tool creation.
In recent years, a new kind of accelerated hardware has gained popularity in the artificial intelligence (AI) community which enables extremely high-performance tensor contractions in reduced precision for deep neural network calculations. In this article, we exploit Nvidia Tensor cores, a prototypical example of such AI-hardware, to develop a mixed precision approach for computing a dense matrix factorization of the inverse overlap matrix in electronic structure theory, S –1 . This factorization of S –1 , written as ZZT = S –1 , is used to transform the general matrix eigenvalue problem into a standard matrix eigenvalue problem. Here we present a mixed precision iterative refinement algorithm where Z is given recursively using matrix–matrix multiplications and can be computed with high performance on Tensor cores. To understand the performance and accuracy of Tensor cores, comparisons are made to GPU-only implementations in single and double precision. Additionally, we propose a nonparametric stopping criteria which is robust in the face of lower precision floating point operations. The algorithm is particularly useful when we have a good initial guess to Z, for example, from previous time steps in quantum-mechanical molecular dynamics simulations or from a previous iteration in a geometry optimization.
Microscopy techniques can uncover the physical properties and dynamic behaviours of materials, driving the discovery of emergent phenomena and guiding the design of next-generation computing hardware. As artificial intelligence becomes pervasive, the demand for high-performance materials to support sustainable information technologies is growing. Here, this Review highlights state-of-the-art imaging from electron and X-ray to optical techniques to probe the dynamics of neuromorphic materials, including operando characterization of devices. We examine design principles for neuromorphic materials, along with obstacles that hinder their development. Emphasis is placed on spatially and temporally resolved approaches that capture state changes including phase transitions, ferroic switching and spin-wave propagation that emulate biological components such as neurons, synapses and their connectivity. We discuss challenges in operando characterization and the integration of artificial intelligence-driven analysis for feedback-guided material discovery. Finally, we outline opportunities for real-time imaging of neuromorphic systems, paving the way towards adaptive, brain-inspired hardware.
The finite element method (FEM) is one of the most important and ubiquitous numerical methods for solving partial differential equations (PDEs) on computers for scientific and engineering discovery. Applying the FEM to larger and more detailed scientific models has driven advances in high-performance computing for decades. Here we demonstrate that scalable spiking neuromorphic hardware can directly implement the FEM by constructing a spiking neural network that solves the large, sparse, linear systems of equations at the core of the FEM. We show that for the Poisson equation, a fundamental PDE in science and engineering, our neural circuit achieves meaningful levels of numerical accuracy and close to ideal scaling on modern, inherently parallel and energy-efficient neuromorphic hardware, specifically Intel’s Loihi 2 neuromorphic platform. We illustrate extensions to irregular mesh geometries in both two and three dimensions as well as other PDEs such as linear elasticity. Our spiking neural network is constructed from a recurrent network model of the brain’s motor cortex and, in contrast to black-box deep artificial neural network-based methods for PDEs, directly translates the well-understood and trusted mathematics of the FEM to a natively spiking neuromorphic algorithm.
Finding ground state energies on current quantum processing units (QPUs) using algorithms such as the variational quantum eigensolver (VQE) continues to pose challenges. Hardware noise severely affects both the expressivity and trainability of parameterized quantum circuits, limiting them to shallow depths in practice. Here, we demonstrate that both issues can be addressed by synergistically integrating VQE with a quantum subspace expansion, allowing for an optimal balance between quantum and classical computing capabilities and costs. We perform a systematic benchmark analysis of the iterative quantum-assisted eigensolver in the presence of hardware noise. We determine ground state energies of 1D and 2D mixed-field Ising spin models on noisy simulators and the IBM QPUs ibmq_quito (5 qubits) and ibmq_guadalupe (16 qubits). To maximize accuracy, we propose a suitable criterion to select the subspace basis vectors according to the trace of the noisy overlap matrix. Finally, we show how to systematically approach the exact solution by performing controlled quantum error mitigation based on probabilistic error reduction on the noisy backend fake_guadalupe.
This paper reports on the generic prediction capability of full electromagnetic plasma initiation modelling with DYON, which was carried out for the first time in fusion research by the joint modelling of the International Tokamak Physics Activity—Integrating Operation Scenario group. The following devices were included in the experiment database: VEST (spherical torus, copper coils, Stainless steel wall, R/a = 0.3 m/0.2 m, V v = 3.7 m 3 ), MAST-U (spherical torus, copper coils, C wall, R/a = 0.7 m/0.5 m, V v = 55 m 3 ), EAST (conventional tokamak, superconducting coils, metallic wall, R/a = 1.85 m/0.5 m, V v = 38 m 3 ), DIII-D (conventional tokamak, copper coils, C wall, R/a = 1.67 m/0.65 m, V v = 35 m 3 ), and KSTAR (conventional tokamak, superconducting coils, C wall, R/a = 1.8 m/0.5 m, V v = 55 m 3 ). Despite the different hardware features of the devices, the required operating spaces of the loop voltage induction and prefill gas pressure for inductive plasma initiation in each device were successfully reproduced by the predictive simulations with DYON using only the individual hardware design and the control room input data for each discharge. This successful validation across multiple machines demonstrates that the full electromagnetic DYON modelling can capture the essential physics of inductive plasma initiation. The simulation settings commonly employed for all modelling and the modifications necessary to account for the discrepancies between individual devices are reported. Predictions for ITER based on the multi-machine validation indicate that a wide range of prefill gas pressures exists for the Townsend breakdown and the plasma burn-through (0.01–1.5 mPa).
This study conducts hardware experiments to assess the performance of a commercial single-phase grid-forming (GFM) inverter using a purely hardware-based approach. We adhere to a testing protocol for the GFM inverter and enhance it by exploring the transient performance of GFM inverters across various grid dynamic events. Quantifiable performance metrics are established for each testing scenario to gain insights into the performance of the single-phase GFM inverters. Based on the comprehensive tests, the following observations are summarized: 1) The performance of the single-phase GFM inverter is satisfactory, and it is capable of being the islanding master for residence homes when the main grid is gone. 2) For frequency response, the inverter is able to stay connected but cannot inject the needed active power to support the grid. This may be improved by the manufacturer by using droop control. 3) The GFM inverter exhibits harmful transients in voltage and frequency during islanding operation, which can be enhanced by maintaining the same operating points before and after the breaker is open.
Existing real-world projects of GFM inverters that operate in parallel to power grids typically are sized between dozens and a few hundreds Megawatt (MW) scale according to a recent NERC GFM inverter white paper. These large systems are often difficult to evaluate prior to deployments because of their large size. The performance of smaller GFM inverters (dozens to a few hundreds MW) that operate parallel with power grids (distribution systems) is even less understood. There is an opportunity to better understand these systems through hardware testing under controlled laboratory conditions. Therefore, this paper presents the functional performance evaluation tests of multiple (three) commercial GFM inverters when they operate in parallel with the grid through hardware experiments. The goal of these tests is to explore the GFM inverters' functionalities and dynamic response when in parallel with power grids to eventually develop universal specifications for GFM inverters. Both steady state (changing the inverter's frequency and voltage droop) and transient (adding step change in grid's frequency/voltage) tests are performed for each GFM inverter with the same testing circuit and testing protocol. The experimental results indicate the bench-marked performance that: 1) the GFM inverters can be dispatched through frequency and voltage droop intercepts to output the target power when paralleled to the grid; 2) the GFM inverters automatically respond to system frequency and voltage events to output the needed power, however, the GFM inverters all show stability issues when absorbing reactive power from the grid.
Powering the Blue Economy Hardware-in-the-Loop models (PBE-HIL) is a repository of Power Hardware-in-the-loop models developed for typical Powering the Blue Economy market loads and power requirements. The HIL models were developed to be as generic and functional as possible, meaning that the user can easily configure these models to represent their unique PBE design. These PBE load and power requirement HIL models can then be used to inform marine energy converter (MEC) and power electronics design, as well as be used in laboratory testing using HIL equipment, leading to improved understanding of MEC performance and lower risk prior to open-water MEC deployment.