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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
NASA NTRS1981

Space platform advanced technology study

Current and past space platform and power module studies were utilized to point the way to areas of development for mechanical devices that will be required for the ultimate implementation of a platform erected and serviced by the Shuttle/Orbiter. The study was performed in accordance with a study plan which included: a review of space platform technology; orbiter berthing system requirements; berthing latch interface requirements, design, and model fabrication; berthing umbilical interface requirements and design; adaptive end effector design and model fabrication; and adaptive end effector requirements.

Burns, G.↗
NASA NTRS1988

Turnaround operations analysis for OTV. Volume 1: Executive summary

Anaylses performed for ground processing, both expendable and reusable ground-based Orbital Transfer Vehicles (OTVs) launched on the Space Transportation System (STS), a reusable space-based OTV (SBOTV) launched on the STS, and a reusable ground-based OTV (GBOTV) launched on an unmanned cargo vehicle and recovered by the Orbiter are summarized. Also summarized are the analyses performed for space processing the reusable SBOTV at the Space Station in low Earth orbit (LEO) as well as the maintenance and servicing of the SBOTV accommodations at the Space Station. In addition, the candidate OTV concepts, design and interface requirements, and the Space Station design, support, and interface requirements are summarized. A development schedule and associated costs for the required SBOTV accommodations at the Space Station are presented. Finallly, the technology development plan to develop the capability to process both GBOTVs and SBOTVs are summarized.

Source record↗
NASA NTRS1993

Towards the formal specification of the requirements and design of a processor interface unit: HOL listings

This technical report contains the HOL listings of the specification of the design and major portions of the requirements for a commercially developed processor interface unit (or PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU specification as it currently exists. Section two of this report contains general-purpose HOL theories that support the PIU specification. These theories include definitions for the hardware components used in the PIU, our implementation of bit words, and our implementation of temporal logic. Section three contains the HOL listings for the PIU design specification. Aside from the PIU internal bus (I-Bus), this specification is complete. Section four contains the HOL listings for a major portion of the PIU requirements specification. Specifically, it contains most of the definition for the PIU behavior associated with memory accesses initiated by the local processor.

Fura, David A.↗
NASA NTRS1990

Optimization of interface layers in the design of ceramic fiber reinforced metal matrix composites

The potential of using an interface layer to reduce thermal stresses in the matrix of composites with a mismatch in coefficients of thermal expansion (CTE) of fiber and matrix was investigated. It was found that the performance of the layer can be defined by the product of the CTE and the thickness, and that a compensating layer with a sufficiently high CTE can reduce the thermal stresses in the matrix significantly. A practical procedure offering a window of candidate layer materials is proposed.

Doghri, I.↗
NASA NTRS1993

Towards the formal verification of the requirements and design of a processor interface unit: HOL listings

This technical report contains the Higher-Order Logic (HOL) listings of the partial verification of the requirements and design for a commercially developed processor interface unit (PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault tolerant computer system. This system, the Fault Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU verification as it currently exists. Section two of this report contains general-purpose HOL theories and definitions that support the PIU verification. These include arithmetic theories dealing with inequalities and associativity, and a collection of tactics used in the PIU proofs. Section three contains the HOL listings for the completed PIU design verification. Section 4 contains the HOL listings for the partial requirements verification of the P-Port.

Fura, David A.↗
NASA NTRS2016

International Docking Standard (IDSS) Interface Definition Document (IDD) : Revision - E

This International Docking System Standard (IDSS) Interface Definition Document (IDD) is the result of a collaboration by the International Space Station membership to establish a standard docking interface to enable on-orbit crew rescue operations and joint collaborative endeavors utilizing different spacecraft. This IDSS IDD details the physical geometric mating interface and design loads requirements. The physical geometric interface requirements must be strictly followed to ensure physical spacecraft mating compatibility. This includes both defined components and areas that are void of components. The IDD also identifies common design parameters as identified in section 3.0, e.g., docking initial conditions and vehicle mass properties. This information represents a recommended set of design values enveloping a broad set of design reference missions and conditions, which if accommodated in the docking system design, increases the probability of successful docking between different spacecraft. This IDD does not address operational procedures or off-nominal situations, nor does it dictate implementation or design features behind the mating interface. It is the responsibility of the spacecraft developer to perform all hardware verification and validation, and to perform final docking analyses to ensure the needed docking performance and to develop the final certification loads for their application. While there are many other critical requirements needed in the development of a docking system such as fault tolerance, reliability, and environments (e.g. vibration, etc.), it is not the intent of the IDSS IDD to mandate all of these requirements; these requirements must be addressed as part of the specific developer's unique program, spacecraft and mission needs. This approach allows designers the flexibility to design and build docking mechanisms to their unique program needs and requirements. The purpose of the IDSS IDD is to provide basic common design parameters to allow developers to independently design compatible docking systems. The IDSS is intended for uses ranging from crewed to autonomous space vehicles, and from Low Earth Orbit (LEO) to deep-space exploration missions.The purpose of the IDSS IDD is to provide basic common design parameters to allow developers to independently design compatible docking systems. The IDSS is intended for uses ranging from crewed to autonomous space vehicles, and from Low Earth Orbit (LEO) to deep-space exploration missions. The purpose of the IDSS IDD is to provide basic common design parameters to allow developers to independently design compatible docking systems. The IDSS is intended for uses ranging from crewed to autonomous space vehicles, and from Low Earth Orbit (LEO) to deep-space exploration missions.

docking↗
DOE OSTI2025

A Perspective into Operando Methods for Probing Catalytic Interfaces

Rational design of electrocatalysts for (photo)electrochemical (PEC) processes like hydrogen and oxygen evolution and CO2 reduction reactions is aided by the recent improvements in capabilities of operando measurements, where morphology, composition, and/or function are probed during active catalysis. Through operando microscopy and spectroscopy, structure, catalytic microenvironment, oxidation state, adsorbates, and products can be measured to gain a better understanding of catalyst behavior and suggest possible improvements. Visualizing evolving catalyst morphologies, surface compositions, and electrochemical behavior also helps address many fundamental research questions for a better understanding of catalytic mechanisms. Correlating morphology with chemical identity or functional behavior using a variety of innovative microscopy methods is particularly promising for guiding development of next generation catalysts, and there are also many recent examples of using AI and robotics tools to innovate and speed development. In this Perspective, advances made over the past few years in operando imaging of catalysts relevant to solar fuels will be explored, followed by an outlook on technological developments in instrumentation, sample design, and computational power that may be applied to this field.

Catalysts↗
NASA NTRS1986

User interface for integrated computer aided design systems

The purpose was the development of a user interface and other appropriate tools to be used in Computer Aided Design systems which can integrate a wide variety of independently developed design and analysis tools. The interface was intended for the integration of programs to be used in the conceptual design of aerospace systems. A user's manual is included.

Schwing, James L.↗
NASA NTRS1990

Autonomous power expert system

The Autonomous Power Expert (APEX) system was designed to monitor and diagnose fault conditions that occur within the Space Station Freedom Electrical Power System (SSF/EPS) Testbed. APEX is designed to interface with SSF/EPS testbed power management controllers to provide enhanced autonomous operation and control capability. The APEX architecture consists of three components: (1) a rule-based expert system, (2) a testbed data acquisition interface, and (3) a power scheduler interface. Fault detection, fault isolation, justification of probable causes, recommended actions, and incipient fault analysis are the main functions of the expert system component. The data acquisition component requests and receives pertinent parametric values from the EPS testbed and asserts the values into a knowledge base. Power load profile information is obtained from a remote scheduler through the power scheduler interface component. The current APEX design and development work is discussed. Operation and use of APEX by way of the user interface screens is also covered.

Walters, Jerry L.↗
NASA NTRS2003

A Matlab-Based Graphical User Interface for Simulation and Control Design of a Hydrogen Mixer

A Graphical User Interface (GUI) that facilitates prediction and control design tasks for a propellant mixer is described. The Hydrogen mixer is used in rocket test stand operations at the NASA John C. Stennis Space Center. The mixer injects gaseous hydrogen (GH2) into a stream of liquid hydrogen (LH2) to obtain a combined flow with desired thermodynamic properties. The flows of GH2 and LH2 into the mixer are regulated by two control valves, and a third control valve is installed at the exit of the mixer to regulate the combined flow. The three valves may be simultaneously operated in order to achieve any desired combination of total flow, exit temperature and mixer pressure within the range of operation. The mixer, thus, constitutes a three-input, three-output system. A mathematical model of the mixer has been obtained and validated with experimental data. The GUI presented here uses the model to predict mixer response under diverse conditions.

Richter, Hanz↗
NASA NTRS1980

Mixed mode missions - Designing payloads to match flight opportunities

Shuttle missions have usually been viewed as being devoted to a single mission mode. But full utilization of the STS capabilities as a platform for space research dictates a flexible strategy toward payload integration and mission design. Simple interfaces, single disciplines, and large design and resource margins point the way toward larger payload integration and operation costs. Payloads for early missions (i.e., OSTA-1, OSS-1, and MEA) are used as illustrations to support this argument. The implications of this approach for future NASA plans as well as for new STS operational concepts are considered.

Noblitt, B. G.↗
NASA NTRS2009

Configuring a Graphical User Interface for Managing Local HYSPLIT Model Runs Through AWIPS

Responding to incidents involving the release of harmful airborne pollutants is a continual challenge for Weather Forecast Offices in the National Weather Service. When such incidents occur, current protocol recommends forecaster-initiated requests of NOAA's Hybrid Single-Particle Lagrangian Integrated Trajectory (HYSPLIT) model output through the National Centers of Environmental Prediction to obtain critical dispersion guidance. Individual requests are submitted manually through a secured web site, with desired multiple requests submitted in sequence, for the purpose of obtaining useful trajectory and concentration forecasts associated with the significant release of harmful chemical gases, radiation, wildfire smoke, etc., into local the atmosphere. To help manage the local HYSPLIT for both routine and emergency use, a graphical user interface was designed for operational efficiency. The interface allows forecasters to quickly determine the current HYSPLIT configuration for the list of predefined sites (e.g., fixed sites and floating sites), and to make any necessary adjustments to key parameters such as Input Model. Number of Forecast Hours, etc. When using the interface, forecasters will obtain desired output more confidently and without the danger of corrupting essential configuration files.

Wheeler, mark M.↗
DOE OSTI2026

Impact of solvent forces and broken symmetry on the assembly of designed proteins at a liquid-solid interface

The era of protein design has enabled the creation of hybrid protein-inorganic interfaces, leading to both surface-directed self-assembly of de novo protein architectures and protein-directed formation of inorganic materials. However, the resulting patterns of protein assembly are often unexpected, implying that essential interactions are not accounted for in current design platforms. Here, we use high-speed atomic force microscopy (AFM) analyzed through machine learning to follow the assembly of protein nanorods in aqueous electrolytes on two types of mica exhibiting disparate symmetry elements, which are imprinted on the overlying hydration structure. Using Monte Carlo simulations, we reproduce the observed phases and show that an observed smectic phase, previously thought to be unstable for non-interacting rods in two dimensions, emerges when crystal symmetry introduces a directional bias. The findings demonstrate the importance of incorporating solvent forces as modulated by the hydration structure inherent to interfacial systems when designing protein assemblies at liquid-crystal interfaces. Coupling physics-based simulations that can account for these factors to de novo protein design algorithms can lead to improved design platforms for bio-inspired, hybrid materials.

bioinspired materials↗
NASA NTRS1992

Formal design specification of a Processor Interface Unit

This report describes work to formally specify the requirements and design of a processor interface unit (PIU), a single-chip subsystem providing memory-interface bus-interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. The need for high-quality design assurance in such applications is an undisputed fact, given the disastrous consequences that even a single design flaw can produce. Thus, the further development and application of formal methods to fault-tolerant systems is of critical importance as these systems see increasing use in modern society.

Fura, David A.↗
NASA NTRS1993

Hypertext-Based Design of a User Interface for Scheduling

Operations Mission Planner (OMP) is an ongoing research project at JPL that utilizes Artificial Intelligence techniques to create an intelligent, automated planning and scheduling system. The challenge with a user interface is to 1) present as much information as possible at a given moment and 2) allow the user to quickly navigate through the various types of displays. This paper describes a design which applies the hypertext model to solve user interface problems. The general paradigm is to provide maps and search queries to allow the user to quickly find an interesting conflict or problem. Then allow the user to navigate through the displays in a hypertext fashion.

hypertext↗
NASA NTRS1993

Hypertext-based design of a user interface for scheduling

Operations Mission Planner (OMP) is an ongoing research project at JPL that utilizes AI techniques to create an intelligent, automated planning and scheduling system. The information space reflects the complexity and diversity of tasks necessary in most real-world scheduling problems. Thus the problem of the user interface is to present as much information as possible at a given moment and allow the user to quickly navigate through the various types of displays. This paper describes a design which applies the hypertext model to solve these user interface problems. The general paradigm is to provide maps and search queries to allow the user to quickly find an interesting conflict or problem, and then allow the user to navigate through the displays in a hypertext fashion.

Woerner, Irene W.↗
NASA NTRS1972

Memory interface simulator: A computer design aid

Results are presented of a study conducted with a digital simulation model being used in the design of the Automatically Reconfigurable Modular Multiprocessor System (ARMMS), a candidate computer system for future manned and unmanned space missions. The model simulates the activity involved as instructions are fetched from random access memory for execution in one of the system central processing units. A series of model runs measured instruction execution time under various assumptions pertaining to the CPU's and the interface between the CPU's and RAM. Design tradeoffs are presented in the following areas: Bus widths, CPU microprogram read only memory cycle time, multiple instruction fetch, and instruction mix.

Taylor, D. S.↗
NASA NTRS2022

International Docking System Standard (IDSS) Interface Definition Document (IDD) Revision F

This IDSS IDD details the physical geometric mating interface and design loads requirements. The physical geometric interface requirements must be strictly followed to ensure physical spacecraft mating compatibility. This includes both defined components and areas that are void of components. The IDD also identifies common design parameters as identified in Section 3.0, e.g., docking initial conditions and vehicle mass properties. This information represents a recommended set of design values enveloping a broad set of design reference missions and conditions, which if accommodated in the docking system design, increases the probability of successful docking between different spacecraft.

Stanley R Donahoe↗