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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16

AE (Acoustic Emission) for Flip-Chip CGA/FCBGA Defect Detection

C-mode scanning acoustic microscopy (C-SAM) is a nondestructive inspection technique that uses ultrasound to show the internal feature of a specimen. A very high or ultra-high-frequency ultrasound passes through a specimen to produce a visible acoustic microimage (AMI) of its inner features. As ultrasound travels into a specimen, the wave is absorbed, scattered or reflected. The response is highly sensitive to the elastic properties of the materials and is especially sensitive to air gaps. This specific characteristic makes AMI the preferred method for finding "air gaps" such as delamination, cracks, voids, and porosity. C-SAM analysis, which is a type of AMI, was widely used in the past for evaluation of plastic microelectronic circuits, especially for detecting delamination of direct die bonding. With the introduction of the flip-chip die attachment in a package; its use has been expanded to nondestructive characterization of the flip-chip solder bumps and underfill. Figure 1.1 compares visual and C-SAM inspection approaches for defect detection, especially for solder joint interconnections and hidden defects. C-SAM is specifically useful for package features like internal cracks and delamination. C-SAM not only allows for the visualization of the interior features, it has the ability to produce images on layer-by-layer basis. Visual inspection; however, is only superior to C-SAM for the exposed features including solder dewetting, microcracks, and contamination. Ideally, a combination of various inspection techniques - visual, optical and SEM microscopy, C-SAM, and X-ray - need to be performed in order to assure quality at part, package, and system levels. This reports presents evaluations performed on various advanced packages/assemblies, especially the flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. Both external and internal equipment was used for evaluation. The outside facility provided images of the key features that could be detected using the most advanced C-SAM equipment with a skilled operator. Investigation continued using in-house equipment with its limitations. For comparison, representative X-rays of the assemblies were also gathered to show key defect detection features of these non-destructive techniques. Key images gathered and compared are: Compared the images of 2D X-ray and C-SAM for a plastic LGA assembly showing features that could be detected by either NDE technique. For this specific case, X-ray was a clear winner. Evaluated flip-chip CGA and FCBGA assemblies with and without heat sink by C-SAM. Only the FCCGA package that had no heat sink could be fully analyzed for underfill and bump quality. Cross-sectional microscopy did not revealed peripheral delamination features detected by C-SAM. Analyzed a number of fine pitch PBGA assemblies by C-SAM. Even though the internal features of the package assemblies could be detected, C-SAM was unable to detect solder joint failure at either the package or board level. Twenty times touch ups by solder iron with 700degF tip temperature, each with about 5 second duration, did not induce defects to be detected by C-SAM images. Other techniques need to be considered to induce known defects for characterization. Given NASA's emphasis on the use of microelectronic packages and assemblies and quality assurance on workmanship defect detection, understanding key features of various inspection systems that detect defects in the early stages of package and assembly is critical to developing approaches that will minimize future failures. Additional specific, tailored non-destructive inspection approaches could enable low-risk insertion of these advanced electronic packages having hidden and fine features.

Ghaffarian, Reza↗

Reliability Considerations of ULP Scaled CMOS in Spacecraft Systems

NASA, the aerospace community, and other high reliability (hi-rel) users of advanced microelectronic products face many challenges as technology continues to scale into the deep sub-micron region. Decreasing the feature size of CMOS devices not only allows more components to be placed on a single chip, but it increases performance by allowing faster switching (or clock) speeds with reduced power compared to larger scaled devices. Higher performance, and lower operating and stand-by power characteristics of Ultra-Low Power (ULP) microelectronics are not only desirable, but also necessary to meet low power consumption design goals of critical spacecraft systems. The integration of these components in such systems, however, must be balanced with the overall risk tolerance of the project.

reliability↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

parts assurance↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

Technology Evaluation↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

NASA Electronic Parts and Packaging (NEPP) Program↗

Clementine Engineering Experiments Program.

Spacecraft must survive and operate reliably in the space environment for long periods of time. Radiation, temperature variations, spacecraft charging, surface contamination, and micrometeoroids/space debris all present environmental challenges to spacecraft missions. The environmental issues associated with these effects require in-situ space experiments to properly quantify the environment and its effects. To obtain data on specific microelectronic and sensor systems in the space environment, several engineering experiments were developed for the Clementine spacecraft and the Clementine lunar transfer booster or Interstage Adapter Satellite (ISAS). These platforms allowed testing of advanced spacecraft microelectronic and sensor devices in a lunar transfer orbit that intersects Earth's radiation belts and debris environment and in interplanetary space where direct exposure to solar flares, Galactic Cosmic Rays, and micrometeoroids was possible. A suite of experiments was developed by the Naval Research Laboratory (NRL), the Jet Propulsion Laboratory (JPL), NASA Langley Research Center (LaRC), the Aerospace Corporation, and NASA Goddard Space Flight Center (GSFC) to investigate in detail specific radiation and environmental reliability issues. This paper presents an introduction to the issues being investigated, the instruments provided for the mission, and the rationale for the engineering program.

Spacecraft↗

Recent Radiation Effects Activities at JPL: Coping with COTS

The rediation effects and testing programs in place at the Jet Propulsion Laboratory support the insertion of traditional, advanced, and emerging microelectronic and photonic technologies in NASA systems through research and testing that enhances the radiation hardness assurance (RHA) of these technologies. With the decreasing availability of radiation hardened electronics and the new NASA paradigm of faster, more aggressive and less expensive space missions, there has been an increasing emphasis on using high performance commercial microelectronic parts and circuits in NASA spacecraft.

radiation↗

Learning From Failure: Boosting Cycling Endurance of Optical Phase Change Materials

Chalcogenide phase change materials (PCMs) are a unique class of compounds whose switchable optical and electronic properties have fueled an explosion of emerging applications in microelectronics and microphotonics. Key to any application is the ability of PCMs to reliably switch between crystalline and amorphous states over a large number of cycles. While this issue has been extensively studied in the case of microelectronic memories, current PCM-based optical devices suffer from much inferior endurance. To understand the failure mechanisms limiting endurance of PCMs specifically in microphotonic devices, we have developed an on-chip resistive micro-heater platform and an automatic multi-modal characterization system to analyze cycling performance of optical PCMs. Reversible switching of large-area PCM devices over 50,000 cycles was demonstrated.

Optical phase change material↗

NASA Center for Integrated Space Microsystems

Develop and maintain a world class, leading edge capability in Advanced Avionic Systems and Advanced Microelectronics Technologies for future highly integrated, miniaturized, autonomous spacecraft systems for deep-space and Earth orbiting missions.

CISM Avionics Microelectronics Miniaturization Aut↗

Space Radiation Environment

Coupled with the increasing concern over trapped radiation effects on microelectronics, the availability of new data, long term changes in the Earth's magentic field, and observed variations in the trapped radiation fluxes have generated the need for better, more comprehensive tools for modeling and predicting the Earth's trapped radiation environment and its effects on space systems.

Earth's magentic field trapped radiation environme↗

Magnetic Device Design and Evaluation Capabilities at JPL

This viewgraph presentation describes the magnetic device design and evaluation capabilities at the Center for Space Microelectronics Technology at the Jet Propulsion Laboratory. The capabilities start with supercomputers for design and simulation. Circuits can be examined via electrical flow and microscopic examination. These capabilities are useful for developing new devices, particularly for space applications.

microelectronics chip testing magnetic devices↗