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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
NASA NTRS2010

Evaluation of a High Temperature SOI Half-Bridge MOSFET Driver, Type CHT-HYPERION

Silicon-On-Insulator (SOI) technology utilizes the addition of an insulation layer in its structure to reduce leakage currents and to minimize parasitic junctions. As a result, SOIbased devices exhibit reduced internal heating as compared to the conventional silicon devices, consume less power, and can withstand higher operating temperatures. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a commercial-off-the-shelf (COTS) SOI half-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Patterson, Richard↗
DOE OSTI2021

Performance Evaluation and Loss Modeling of WBG Devices based on a Novel Double-Pulse Test Method for Current Source Inverter

Careful measurements of the power device characteristics are necessary to accurately estimate a power converter's losses and efficiency. The conventional double-pulse test (DPT) circuit is a well-known method to implement this laboratory characterization of power devices and power modules. However, the switching characteristics of a power device depend on the power electronics circuit in which it is connected as well as the power circuit's physical layout, in addition to the device's internal structure. Hence, the conventional DPT circuit configuration, which is tailored for a standard voltage-source inverter (VSI), is not well-suited for a current-source inverter (CSI). This paper demonstrates a previously-proposed CSI-based DPT measurement technique that is appropriate for normal CSI operation. The characteristics of SiC MOSFETs and series-connected SiC Schottky diodes used in a CSI are measured using this improved technique while taking temperature effects into account to yield more accurate loss predictions. The CSI losses, including the switching and conduction losses of SiC MOSFETs and SiC Schottky diodes, have been modeled using this approach. The total CSI losses and efficiency have been estimated based on the CSI DPT results and loss models.

42 ENGINEERING↗
DOE OSTI2025

Next-generation tunnel FETs: exploring material perspectives and areal tunneling configurations

The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.

2D materials↗
DOE OSTI2021

SiC and GaN Devices With Cryogenic Cooling

This article presents the cryogenically cooled application for wide bandgap (WBG) semiconductor devices. Characteristics of silicon carbide (SiC) and gallium nitride (GaN) at cryogenic temperatures are illustrated. SiC MOSFETs exhibit increased on-state resistance and slower switching speed at cryogenic temperatures. However, cryogenic cooling provides low ambient temperature environment and thus enables the SiC converter to operate at lower junction temperature to achieve higher efficiency compared to room temperature cooling. A cryogenically cooled MW-level SiC inverter prototype is developed and demonstrated the feasibility of operating high-power SiC converter with cryogenic cooling. GaN HEMTs exhibit more than five times on-state resistance reduction and faster switching speed at cryogenic temperatures which makes GaN HEMTs an excellent candidate for cryogenic power electronics applications. The significantly reduced on-state resistance of GaN devices provides the possibility to operate them at a current level much higher than rated current at cryogenic temperatures. A GaN double pulse test (DPT) circuit is constructed and demonstrated that GaN HEMTs can operate at nearly four times of rated current at cryogenic temperatures. Challenges of utilizing WBG device with cryogenic cooling are discussed and summarized.

42 ENGINEERING↗
NASA NTRS1990

Performance of multiplexed Ge:Ga detector arrays in the far infrared

The performance of two multi-element, multiplexed Ge:Ga linear arrays under low-background conditions was investigated. The on-focal switching is accomplished by MOSFET switches, and the integrated charge is made available through MOSFET source followers. The tests were conducted at 106 microns, and the radiation on the detectors was confined to a spectral window 1.25 microns wide using a stack of cold filters. At 4.2 K, the highest responsivity was 584 A/W, the noise equivalent power was 1.0 x 10(exp -16) W/square root of Hz, and the read noise was 6100 electrons/sample. A detailed description of the test setup and procedure is presented.

Farhoomand, Jam↗
NASA NTRS1972

Radiation effects on three low-power microcircuits

Irradiation of several low power circuit elements by Co-60 gamma radiation, low and high energy electrons, and neutrons is discussed. The bipolar circuits were SE480 Q NAND gate, and a micropower frequency divider was used in electronic wrist watches. The MOS device was a dual p-channel MOSFET.

Yamakawa, K. A.↗
DOE OSTI2023

Design, Optimization, and Validation of GaN-Based DAB Converter for Active Cell Balancing in BTMS Applications

This paper focuses on the design of a bidirectional dual active bridge (DAB) DC/DC converter that utilizes Gallium Nitride (GaN) switches as active components. In the existing literature, MOSFET-based DAB for active cell balancing is available, but GaN-based DAB converter for active cell balancing is still new. The proposed modular isolated GaN-based DAB converter is designed as an individual module of active cell balancing for behind-the-meter storage (BTMS) applications, targeting high-power charging stations. Modular isolated converters are connected to each cell (low voltage bus), and each cell is connected in series to build up a battery module. According to the reference current command of supervisory control, each DAB converter can transfer power back and forth through the high voltage (HV) bus to balance the State of Charge (SoC) between the cells. Each module DAB converter is designed at a 50 W power rating. Switch power and transformer losses are analyzed for different switching frequencies, showing the optimum switching frequency for minimum losses. Furthermore, the procedure to select the required gate driver and the PCB layout optimization are discussed. Finally, the DAB performance analysis of GaN-based DAB and Si-based DAB is provided for a battery module operating with a LiFeMnPO4 prismatic cell with 3.2V 20Ah rated values.

active cell balancing↗
NASA NTRS1986

Evaluation and characterization of hybrid arrays

An Infrared Camera was built for astronomical observations and for testing arrays for satellite based work. The detectors are sensitive to mid infrared wavelengths. The camera was tested at the University of Arizona 61 and 90 inch telescopes and the NASA IRTF. These tests have demonstrated a sensitivity consistent with photon shot noise with an approximately 10% quantum efficiency for each pixel when the camera was used with a 1.6% spectral filter or when used with a Fabry-Perot having a resolving power of 2000. Initial measurements of read out noise, dark current, cross talk, and hysteresis were made. The detector chip in current use is a hybrid array manufactured by the Hughes Aircraft Company. Because part of the goal was to develop and advance technology, it was decided to work with a switched MOSFET array. This architecture is very promising, and the detector parameters will be quantified carefully.

Arens, J. F.↗
DOE OSTI2023

Design, Optimization, and Validation of GaN-Based DAB Converter for Active Cell Balancing in BTMS Applications: Preprint

This paper focuses on the design of a bidirectional dual active bridge (DAB) DC/DC converter that utilizes Gallium Nitride (GaN) switches as active components. In the existing literature, MOSFET-based DAB for active cell balancing is available, but GaN-based DAB converter for active cell balancing is still new. The proposed modular isolated GaN-based DAB converter is designed as an individual module of active cell balancing for behind-the-meter storage (BTMS) applications, targeting high-power charging stations. Modular isolated converters are connected to each cell (low voltage bus), and each cell is connected in series to build up a battery module. According to the reference current command of supervisory control, each DAB converter can transfer power back and forth through the high voltage (HV) bus to balance the State of Charge (SoC) between the cells. Each module DAB converter is designed at a 50W power rating. Switch power and transformer losses are analyzed for different switching frequencies, showing the optimum switching frequency for minimum losses. Furthermore, the procedure to select the required gate driver and the PCB layout optimization are discussed. Finally, the DAB performance analysis of GaNbased DAB and Si-based DAB is provided for a battery module operating with a LiFeMnPO4 prismatic cell with 3.2V 20Ah rated values.

active cell balancing↗
NASA NTRS2005

Series-Connected Buck Boost Regulators

A series-connected buck boost regulator (SCBBR) is an electronic circuit that bucks a power-supply voltage to a lower regulated value or boosts it to a higher regulated value. The concept of the SCBBR is a generalization of the concept of the SCBR, which was reported in "Series-Connected Boost Regulators" (LEW-15918), NASA Tech Briefs, Vol. 23, No. 7 (July 1997), page 42. Relative to prior DC-voltage-regulator concepts, the SCBBR concept can yield significant reductions in weight and increases in power-conversion efficiency in many applications in which input/output voltage ratios are relatively small and isolation is not required, as solar-array regulation or battery charging with DC-bus regulation. Usually, a DC voltage regulator is designed to include a DC-to-DC converter to reduce its power loss, size, and weight. Advances in components, increases in operating frequencies, and improved circuit topologies have led to continual increases in efficiency and/or decreases in the sizes and weights of DC voltage regulators. The primary source of inefficiency in the DC-to-DC converter portion of a voltage regulator is the conduction loss and, especially at high frequencies, the switching loss. Although improved components and topology can reduce the switching loss, the reduction is limited by the fact that the converter generally switches all the power being regulated. Like the SCBR concept, the SCBBR concept involves a circuit configuration in which only a fraction of the power is switched, so that the switching loss is reduced by an amount that is largely independent of the specific components and circuit topology used. In an SCBBR, the amount of power switched by the DC-to-DC converter is only the amount needed to make up the difference between the input and output bus voltage. The remaining majority of the power passes through the converter without being switched. The weight and power loss of a DC-to-DC converter are determined primarily by the amount of power processed. In the SCBBR, the unswitched majority of the power is passed through with very little power loss, and little if any increase in the sizes of the converter components is needed to enable the components to handle the unswitched power. As a result, the power-conversion efficiency of the regulator can be very high, as shown in the example of Figure 1. A basic SCBBR includes a DC-to-DC converter (see Figure 2). The switches and primary winding of a transformer in the converter is connected across the input bus, while the secondary winding and switches are connected in series with the output bus, so that the output voltage is the sum of the input voltage and the secondary voltage of the converter. In the breadboard SCBBR, the input voltage applied to the primary winding is switched by use of metal oxide/semiconductor field-effect transistors (MOSFETs) in a full bridge circuit; the secondary winding is center-tapped, with two MOSFET switches and diode rectifiers connected in opposed series in each leg. The sets of opposed switches and rectifiers are what enable operation in either a boost or a buck mode. In the boost mode, input voltage and current, and the output voltage and current are all positive; that is, the secondary voltage is added to the input voltage and the net output voltage can be regulated at a value equal or greater than the input voltage. In the buck mode, input voltage is still positive and the current still flows in the same direction in the secondary, but the switches are controlled such that some power flows from the secondary to the primary. The voltage across the secondary and the current into the primary are reversed. The result is that the output voltage is lower than the input voltage, and some power is recirculated from the converter secondary back to the input. Quantitatively, the advantage of an SCBBR is a direct function of the regulation range required. If, for example, a regulation range of 20 percent is required for a 500-W supply, th it suffices to design the DC-to-DC converter in the SCBBR for a power rating of only 100 W. The switching loss and size are much smaller than those of a conventional regulator that must be rated for switching of all 500 W. The reduction in size and the increase in efficiency are not directly proportional to switched-power ratio of 5:1 because the additional switches contribute some conduction loss and the input and output filters must be larger than those typically required for a 100-W converter. Nevertheless, the power loss and the size can be much smaller than those of a 500-W converter.

Birchenough, Arthur G.↗
NASA NTRSDate not supplied

NASA's X-57 High Lift Motor Controller: Detailed Design, Test Results, and Outcomes

NASA's X-57 all-electric aircraft was a research project aimed at investigating lightweight and efficient electric propulsion components. The general approach was to utilize a distributed electric propulsion (DEP) design. An essential component of this design was the High Lift Motor Controller (HLMC), a motor drive which provided power to the High Lift Motors (HLMs) and High Lift Propellers (HLPs) responsible for providing additional thrust for take-off and landing. This paper presents the detailed design, test results, and outcomes from the development of the HLMC, a 14 kW, 1kg, 98.3% efficient, outer mold line (OML) cooled, silicon carbide (SiC) MOSFET-based inverter and controller.

Electric Aircraft↗
NASA NTRS2024

NASA's X-57 High Lift Motor Controller: Detailed Design, Test Results, and Outcomes

NASA's X-57 all-electric aircraft was a research project aimed at investigating lightweight and efficient electric propulsion components. The general approach was to utilize a distributed electric propulsion (DEP) design. An essential component of this design was the High Lift Motor Controller (HLMC), a motor drive which provided power to the High Lift Motors (HLMs) and High Lift Propellers (HLPs) responsible for providing additional thrust for take-off and landing. This paper presents the detailed design, test results, and outcomes from the development of the HLMC, a 14 kW, 1kg, 98.3% efficient, outer mold line (OML) cooled, silicon carbide (SiC) MOSFET-based inverter and controller.

Electric Aircraft↗
DOE OSTI2022

Drivers for paralleled semiconductor switches

An apparatus includes a plurality of parallel-connected semiconductor switches (e.g., silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) or other wide-bandgap semiconductor switches) and a plurality of driver circuits having outputs configured to be coupled to control terminals of respective ones of the plurality of semiconductor switches and configured to drive the parallel-connected semiconductor switches responsive to a common switch state control signal. The driver circuits may have respective different power supplies, which may be adjustable. Respective output resistors may couple respective ones of the driver circuits to respective ones of the semiconductor switches. The output resistors may be adjustable.

Nojima, Geraldo↗
DOE OSTI2020

Modular Multilevel Converter (MMC) Modeling Considering Submodule Voltage Sensor Noise

The modular multilevel converter (MMC) is a popular topology in medium- and high-voltage applications, and many efforts have been spent on MMC modeling. However, the impact of submodule voltage sensor noise (SVSN), which becomes more severe due to increasing switching speed of power semiconductors and compact submodule design, has not been considered in conventional models. In this letter, the SVSN is introduced by coupling capacitances between the sensor and power stage in an MMC switching model. Furthermore, the SVSN impact is considered in an MMC average model based on derivation of the relationship between the SVSN and the duty cycle. Here, the proposed MMC switching model and average model considering the SVSN are validated by comparing simulations with experimental results in an MMC prototype using 10-kV SiC MOSFETS.

47 OTHER INSTRUMENTATION↗
NASA NTRS1989

MCTs and IGBTs - A comparison of performance in power electronic circuits

There is a continuous demand for improvements in the quality of switching power devices, such as higher switching frequency, higher withstand voltage capability, larger current-handling capability, and lower conduction losses. However, for single-conduction-mechanism devices (SCRs, GTOs, BJTs, FETs), possessing all these features is probably unrealizable for physical reasons. An attractive solution appears to be double-mechanism devices, in which the features of both a minority carrier device (BJT or SCR) and a majority carrier device (MOSFET) are embedded. Both IGBTs (insulated-gate bipolar transistors) and MCTs (MOS-controlled thyristors) belong to this family of double-mechanism devices and promise to have a major impact on converter circuit signs. The authors deal with the major features of these two devices, pointing out those that are most critical to the design of converter topologies. In particular, the two devices have been tested both in a chopper and in two resonant link converter topologies, and the experimental results are reported.

Sul, S. K.↗
DOE OSTI2022

Software Development for Data Visualization and Analysis of PN-Diodes & MOSFET Devices

The U.S. Department of Energy has a broad mission to ensure the nation’s security by addressing ongoing environmental challenges, developing novel energy production technologies, and mitigating nuclear security concerns. These efforts benefit from developing more effective semiconductor materials and devices. The research discussed in this report aims to further the development of these new electronics by improving implementations of vertical device structures, which offer theoretically better performance compared to lateral structures. Specifically, it reviews the background and development of a new and easy-to-use program for data processing and analysis from experiments run on vertical gallium nitride power devices. Current vertical structures fall short in critical performance metrics, such as On-Resistance and Breakdown Voltage, due to poor management of the device’s electric field. Junction termination extensions, or JTEs, are a field management technique that increases a device’s resilience to expected failure modes by controlling its surface electric fields. Each JTE design requires significant experimental validation, consisting of hundreds of tested devices, each outputting an enormous set of data points. The new software includes multiple methods of filtering large sets of device testing data to identify and remove flawed devices, automate device analyses, and provide statistical breakdowns for four metrics used to define the effectiveness of the JTE and the current carrying capacity of the device. These results can then be related back to fabrication techniques and device design, and in the future, be combined with processing simulations to further improve our understanding of the JTE mechanisms.

97 MATHEMATICS AND COMPUTING↗