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Compendium of Current Total Ionizing Dose and Displacement Damage Results from NASA Goddard Space Flight Center and NASA Electronic Parts and Packaging Program

Total ionizing dose and displacement damage testing was performed to characterize and determine the suitability of candidate electronics for NASA space utilization. Devices tested include optoelectronics, digital, analog, linear bipolar devices, and hybrid devices. Displacement Damage, Optoelectronics, Proton Damage, Single Event Effects, and Total Ionizing Dose.

Proton Damage↗

NASA Electronic Parts and Packaging (NEPP) Program

Recent Findings from Audits, New Technology Data Reviews a) Disabled Chip Burn-ins A recent audit for a QML device discovered that the chip was disabled during the static burn-in, thus it was not drawing any current. Recommendation: For new SMDs add a statement within the burn-in paragraphs stating that the parts shall be kept in their enabled state during the burn-in. b) Class Q 160-hr/125oC Burn-in This is being interpreted as a static burn-in (even for CMOS technology). Recommendation: Provide clarification in MIL-STD-883, Test Method 5004. c) At Frequency (Dynamic) Burn-ins Test equipment limitation is being cited for not doing burn-ins at the application frequency. Recommendation: The burn-in task group to discuss and provide guidance. When the SMD says that the part can be used at 200 MHz, then doing burn-in at 6 MHz (cited as burn-in equipment limitation frequency) is not going to be meaningful! d) Two Static Burn-ins Some manufacturers are doing electrical testing between the two static burn-ins, whereas others do electricals after completing both static burn-ins. Recommendation: Provide clarification in MIL-STD-883, Test Method 5004. e) Thermal Imaging For a device with hot spots, the thermal resistance, junction-to-case, would be much higher than the guidelines given in MIL-STD-1835. One of the suppliers used thermal imaging to find hot spots on the die. Recommendation: Assign a task group to evaluate the effectiveness of thermal imaging at the product development stage.

Class Y↗

The NASA Electronic Parts and Packaging (NEPP) Program - NASA Items of Interest

This presentation provides a background summary of the NEPP Program, its origins and operating principles followed by examples of issues and opportunities that NEPP is currently pursuing. These examples include Electrostatic Discharge protection procedures that are not being properly applied, one reason for which is the confusion caused by the numerous, different standards covering this topic. Updates are provided for key activities in radiation hardness assurance, and the evaluation of automotive grade electronic parts for use in space applications. Some recent examples of part problems experienced by NASA are briefly described and the latest trending of incidences of counterfeit electronic parts is shown graphically. Finally some forward actions are identified and the time, place and typical topics is provided for the next NEPP Electronic Technology Workshop (ETW).

Electrical Electronic and Electromechanical (EEE)↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

NASA Electronic Parts and Packaging (NEPP) Program↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

Technology Evaluation↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

parts assurance↗

The Assurance Challenges of Advanced Packaging Technologies for Electronics

Advances in microelectronic parts performance are driving towards finer feature sizes, three-dimensional geometries and ever-increasing number of transistor equivalents that are resulting in increased die sizes and interconnection (I/O) counts. The resultant packaging necessary to provide assemble-ability, environmental protection, testability and interconnection to the circuit board for the active die creates major challenges, particularly for space applications, Traditionally, NASA has used hermetically packaged microcircuits whenever available but the new demands make hermetic packaging less and less practical at the same time as more and more expensive, Some part types of great interest to NASA designers are currently only available in non-hermetic packaging. It is a far more complex quality and reliability assurance challenge to gain confidence in the long-term survivability and effectiveness of nonhermetic packages than for hermetic ones. Although they may provide more rugged environmental protection than the familiar Plastic Encapsulated Microcircuits (PEMs), the non-hermetic Ceramic Column Grid Array (CCGA) packages that are the focus of this presentation present a unique combination of challenges to assessing their suitability for spaceflight use. The presentation will discuss the bases for these challenges, some examples of the techniques proposed to mitigate them and a proposed approach to a US MIL specification Class for non-hermetic microcircuits suitable for space application, Class Y, to be incorporated into M. IL-PRF-38535. It has recently emerged that some major packaging suppliers are offering hermetic area array packages that may offer alternatives to the nonhermetic CCGA styles but have also got their own inspectability and testability issues which will be briefly discussed in the presentation,

Sampson, Michael J.↗