High voltage /800 kV/ electron petrography of Type B rock from Apollo 11
Apollo 11 lunar rock clinopyroxene, plagioclase and ilmenite internal substructure, using high voltage transmission electron microscopy
Christie, J. M.↗
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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Differential charging of high-voltage spacecraft - The equilibrium potential of insulated surfaces
A theory is presented for the steady-state potential of insulated surfaces near exposed high voltages. The term 'insulated surfaces' is used to mean either dielectric surfaces or electrically isolated metallic surfaces. The potential is bounded below by the zero of the material's I-V curve assuming total suppression of secondary electrons, and above by assuming total extraction of secondaries. Within these bounds, the material's surface potential is determined consistently with the solution to Poisson's equation external to the vehicle. The theory is compared with rocket experiments and with SCATHA satellite data. Also, an explanation is suggested for the observed 'snapover' of solar cell coverslips from near plasma ground potential to near the potential of positively biased interconnects with increasing bias voltage.
Katz, I.↗
High-Voltage Square-Wave Generator
Fast switching circuit puts out rectangular pulses of order of kilovolt or greater at typical repetition frequencies as high as hundreds of kilohertz and with rise times as short as 50 ns. Designed around power metal oxide/semiconductor field-effect transistors (MOSFET's). Optically isolated power MOSFET's in series rapidly switch output between high voltages V(sub 1) and V(sub 2). Used to supply power to pulsed laser or to modulate beam of charged particles in laboratory experiment or industrial process.
Bernius, Mark T.↗
COTS Li-Ion Cells in High Voltage Batteries
Testing at NASA JSC and COMDEV shows that Commercial Off the Shelf (COTS) Li Ion cells can not be used in high voltage batteries safely without considering the voltage stresses that may be put on the protective devices in them during failure modes.
Davies, Francis↗
High Voltage Space Solar Arrays
Recent tests performed at the NASA Glenn Research Center and elsewhere have shown promise in the design and construction of high voltage (300-1000 V) solar arrays for space applications. Preliminary results and implications for solar array design will be discussed, with application to direct-drive electric propulsion and space solar power.
Ferguson, D. C.↗
Simulation-based Study of Single-Event Burnout in 4H-SiC High-Voltage Vertical Superjunction DMOSFET: Physical Failure Mechanism and Robustness vs. Performance Tradeoffs
We explore and elucidate physical failure mechanisms in a 4H-SiC, high voltage, superjunction (SJ) vertical DMOSFET from a single heavy ion strike using three-dimensional electro-thermal transient simulations. The single-event burnout (SEB) failure is thermal runaway from second breakdown, initiated by impact ionization and terminated with mesoplasma formation, at the center of the P-pillar/N+ substrate interface. We also demonstrate that the SEB performance of this SiC SJ DMOSFET is insensitive to the pillar width but sensitive to the strike location with ion strike at the P-pillar causing SEB at a lower blocking voltage than at the N-pillar. Compared to commercially available 1.2 kV blocking-rated non-SJ DMOSFETs, which have been demonstrated to survive SEB up to 525 V, the SJ DMOSFET increases SEB survival threshold voltage (VSEB) by a factor of 2.2, making it close to 1200 V, while the on-resistance is increased by only 11%. Using our recently developed figure of merit (FoM), which considers the trade-off between VSEB and on-state performance, we find that the SiC SJ DMOSFET achieves a FoM that is 14 times better, making it superior to conventional 1.2 kV SiC DMOSFETs for long-term radiation-tolerant operation in space applications.
Silicon Carbide↗
Efficient circuit triggers high-current, high-voltage pulses
Modified circuit uses diodes to effectively disconnect the charging resistors from the circuit during the discharge cycle. Result is an efficient parallel charging, high voltage pulse modulator with low voltage rating of components.
Green, E. D.↗
High-Voltage Clock Driver for Photon-Counting CCD Characterization
A document discusses the CCD97 from e2v technologies as it is being evaluated at Goddard Space Flight Center's Detector Characterization Laboratory (DCL) for possible use in ultra-low background noise space astronomy applications, such as Terrestrial Planet Finder Coronagraph (TPF-C). The CCD97 includes a photoncounting mode where the equivalent output noise is less than one electron. Use of this mode requires a clock signal at a voltage level greater than the level achievable by the existing CCD (charge-coupled-device) electronics. A high-voltage waveform generator has been developed in code 660/601 to support the CCD97 evaluation. The unit generates required clock waveforms at voltage levels from -20 to +50 V. It deals with standard and arbitrary waveforms and supports pixel rates from 50 to 500 kHz. The system is designed to interface with existing Leach CCD electronics.
Baker, Robert↗
High-Voltage-Input Level Translator Using Standard CMOS
proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors, which, by virtue of being identical to the input transistors, would reproduce the input differential potential at the output
Yager, Jeremy A.↗
Experimental results on plasma interactions with large surfaces at high voltages
Multikilowatt power levels for future payloads can be more efficiently generated using solar arrays operating in the kilovolt range. This implies that large areas of the array at high operating voltages will be exposed to the space plasma environment. The resulting interactions of these high voltage surfaces with space plasma environments can seriously impact the performance of the satellite system. The plasma-surface interaction phenomena were studied in tests performed in two separate vacuum chambers, a 4.6 m diameter by 19.2 long chamber and a 20 m diameter by 27.4 m long chamber. The generated plasma density was approximately 1x10 to the 4th power/cu cm. Ten solar array panels, each with areas of 1400 sq cm were used in the tests. Nine of the solar panels were tested as a composite unit in the form of a 3x3 solar panel matrix. The results from all the tests confirmed small sample tests results: insulators were found to enhance the plasma coupling current for high positive bias and arcing was found to occur at high negative bias.
Grier, N. T.↗
High voltage solar cell power generating system for regulated solar array development
A laboratory solar power system regulated by on-panel switches has been delivered for operating high power (3 kw), high voltage (15,000 volt) loads (communication tubes, ion thrusters). The modular system consists of 26 solar arrays, each with an integral light source and cooling system. A typical array contains 2560 series-connected cells. Each light source consists of twenty 500 watt tungsten iodide lamps providing plus or minus 5 per cent uniformity at one solar constant. An array temperature of less than 40 C is achieved using an infrared filter, a water cooled plate, a vacuum hold-down system, and air flushing.
Levy, E., Jr.↗
NASA-GRC Research Activities in High Voltage (HV) Electrical Insulation
This presentation gives an overview of recent research activities at NASA Glenn Research Center (GRC). The presentation covers research associated with materials for high voltage aerospace electrical insulation applications.
Aerospace Materials Aerospace electrical insulatio↗
Low-power programmable high-voltage supply
Converter is used to energize group of proportional-counter event-detection tubes. Supply is programmed by using output signal of low voltage digital-to-analog converter. Programming voltage ranges from 1.53 to 2.91 V in 127 0.0108 mV steps, and it is used to control converter high voltage output which ranges from 700 to 1,335 V in like number of increments.
Stout, D. F.↗
High voltage transmission microscopy of Surveyor 3 camera shrouds
The internal structure of painted and unpainted aluminum alloy sheet samples from the TV camera shrouds were examined by high-voltage transmission electron microscopy. No clear-cut evidence of radiation damage effects was observed. Noticeable differences in microstructures between the upper visor and the sides and bottom of the lower shroud suggest different thermal histories, and the maximum temperatures due to solar heating are estimated to be between 164 and 319 C. Some correlation between microstructures and maximum estimated temperature is noted. It is felt that the apparent temperature rise due to solar heating will not affect the structural integrity of spacecraft components except possibly for very long periods of exposure. However, substantial thermal diffusion could affect interpretation of solar wind rare gas studies.
Fisher, R. M.↗
High-voltage dc power processing thermal control and packaging techniques
The power processor operates in several modes, delivering up to 100 amperes of regulated electrical power, operating at input voltages to 375 volts with outputs controlled by an integral microprocessor. Several alternative packaging concepts are discussed and evaluated. High-voltage design applications, power stage interconnection and EMI considerations are also discussed. Preliminary thermal analyses were performed and the results presented for each conceptual approach with parametric study results given for the selected concept.
Chapter, J. J.↗
Test Results from a Simulated High Voltage Lunar Power Transmission Line
The Alternator Test Unit (ATU) in the Lunar Power System Facility (LPSF) located at the NASA Glenn Research Center (GRC) in Cleveland, OH was modified to simulate high voltage transmission capability. The testbed simulated a 1 km transmission cable length from the ATU to the LPSF using resistors and inductors installed between the distribution transformers. Power factor correction circuitry was used to compensate for the reactance of the distribution system to improve the overall power factor. This test demonstrated that a permanent magnet alternator can successfully provide high frequency AC power to a lunar facility located at a distance.
Birchenough, Arthur↗
Test Results From a Simulated High-Voltage Lunar Power Transmission Line
The Alternator Test Unit (ATU) in the Lunar Power System Facility (LPSF) located at the NASA Glenn Research Center (GRC) in Cleveland, Ohio was modified to simulate high-voltage transmission capability. The testbed simulated a 1 km transmission cable length from the ATU to the LPSF using resistors and inductors installed between the distribution transformers. Power factor correction circuitry was used to compensate for the reactance of the distribution system to improve the overall power factor. This test demonstrated that a permanent magnet alternator can successfully provide high-frequency ac power to a lunar facility located at a distance.
Birchenough, Arthur↗
High voltage electron microscopy and electron diffraction of pyroxenes in type B lunar samples from Apollo 11
Lunar pyroxene 10044 specimens cleaved and sectioned by diamond knife ultramicrotomy were examined by standard (75 to 100 kV) and high voltage (200 kV) electron microscopy and diffraction. Salient findings based on evaluation of 2000 plates show uniform 300 to 600 A-wide bands, probably corresponding to single crystal domains, with lattice spacings of 2. A High resolution bright and dark field images of iron-rich and magnesium-rich crystals were compared with corresponding electron diffraction patterns. Possible relations of observed structures to magnetic domains were considered.
Fernandez-Moran, H.↗