Decoder system Patent
Binary data decoding device for use at receiving end of communication channel
Anderson, T. O.↗
SEARCH · Search NASA
Results for “Decoder”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
BCD to decimal decoder Patent
Binary to decimal decoder logic circuit design with feedback control and display device
Byrne, F.↗
New developments in convolutional encoding and decoding
Convolutional encoding and decoding developments, and applications in deep space communication
Lynch, T. J.↗
Study of sequential decoding
Decoding algorithms for data reduction and transmission through noisy space channels using sequential and hybrid computers
Jelinek, F.↗
On the Blizard decoding algorithm
Blizard decoding algorithm for binary linear error correcting codes
Welch, L. R.↗
Decoding beyond the BCH bound
Two algorithms for decoding beyond Bose- Chaudhuri-Hocquenhem bound
Hartmann, C. R. P.↗
Bootstrap hybrid decoding for symmetrical binary input channels
Hybrid decoding technique for symmetrical binary input channels, using bootstrap algorithm across convolutionally encoded information streams
Cocke, J.↗
Strengthened lower bound on definite decoding minimum distance for periodic convolutional codes
Binary periodic convolutional codes with lower bound everywhere stronger than Wagner on definite decoding minimum distance
Costello, D. J., Jr.↗
On majority-logic decoding for duals of primitive polynomial codes
Majority logic decoding for primitive polynomial and dual codes, discussing nonorthogonal parity-check sums formation methods and Euclidean geometry maximality
Kasami, T.↗
Some interesting simulation results of the Viterbi decoder
Performance predictions for Viterbi decoding algorithm by simulation on UNIVAC 1108
Taqvi, S. Z. H.↗
On the construction of a class of majority- logic decodable codes
Majority-logic decodable block codes construction by combining shorter length codes, obtaining correctable error bounds
Kasami, T.↗
An empirical comparison of two sequential decoding algorithms
Fano and stack algorithms comparison by computer simulation of two sequential decoding algorithms
Geist, J. M.↗
Study of sequential decoding
Sequential decoding problems considered deal with reliable transmission through noise space channels and encoding of space sources for the purpose of data suppression.
Jelinek, F.↗
Algebraic decoding of block codes over a q-ary input, Q-ary output channel, Q greater than q.
Decoding algorithms designed for one output alphabet are shown to be effectively usable for channels with a different output alphabet. The described technique that makes this possible can be used in conjunction with an arbitrary distance measure between input and output vectors. Thus, Hamming distance, Lee distance, or a burst distance can be assumed. Examples are presented for each of these distances.
Wainberg, S.↗
Search properties of some sequential decoding algorithms.
Sequential decoding procedures are studied in the context of selecting a path through a tree. Several algorithms are considered, and their properties are compared. It is shown that the stack algorithm introduced by Zigangirov (1966) and by Jelinek (1969) is essentially equivalent to the Fano algorithm with regard to the set of nodes examined and the path selected, although the description, implementation, and action of the two algorithms are quite different. A modified Fano algorithm is introduced, in which the quantizing parameter is eliminated. It can be inferred from limited simulation results that, at least in some applications, the new algorithm is computationally inferior to the old. However, it is of some theoretical interest since the conventional Fano algorithm may be considered to be a quantized version of it.
Geist, J. M.↗
A 1-1/2-level on-chip-decoding bubble memory chip design
Design includes multi-channel replicator which can reduce chip-writing requirement, selective annihilating switch which can effectively annihilate bubbles with minimum delay, and modified transfer switch which can be used as selective steering-type decoder.
Chen, T. T.↗
DSN performance tests of a maximum likelihood decoder
Viterbi decoding tests were carried out at DSS 62, Madrid, Spain. Results of bit error rate, burst statistics, and estimation of signal-to-noise ratio are presented.
Urech, J. M.↗