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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

Optical Fiber Assemblies for Space Flight from the NASA Goddard Space Flight Center, Photonics Group

The Photonics Group at NASA Goddard Space Flight Center in the Electrical Engineering Division of the Advanced Engineering and Technologies Directorate has been involved in the design, development, characterization, qualification, manufacturing, integration and anomaly analysis of optical fiber subsystems for over a decade. The group supports a variety of instrumentation across NASA and outside entities that build flight systems. Among the projects currently supported are: The Lunar Reconnaissance Orbiter, the Mars Science Laboratory, the James Webb Space Telescope, the Express Logistics Carrier for the International Space Station and the NASA Electronic Parts. and Packaging Program. A collection of the most pertinent information gathered during project support over the past year in regards to space flight performance of optical fiber components is presented here. The objective is to provide guidance for future space flight designs of instrumentation and communication systems.

Ott, Melanie N.↗
NASA NTRS2018

ASIC/FPGA Trust Assessment Framework

NASA Electronic Parts and Packaging (NEPP) is developing a process to be employed in critical applications. The framework assesses levels of Trust and assurance in microelectronic systems. The process is being created with participation from a variety of organizations. We present a synopsis of the framework that includes contributions from The Aerospace Corporation.

Application specific integrated circuit (ASIC)↗
NASA NTRS2018

Government Microelectronics Assessment for Trust (GOMAT)

NASA Electronic Parts and Packaging (NEPP) is developing a process to be employed in critical applications. The framework assesses levels of trust and assurance in microelectronic systems. The process is being created with participation from a variety of organizations. We present a synopsis of the framework that includes contributions from The Aerospace Corporation.

Assurance↗
NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Electric aircrafts↗
NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Multifunctional↗
NASA NTRS2018

Thermal Modeling of an Advanced Geared Turbofan for Distributed Engine Control Application

Reliability and life-expectancy of gas turbine engine components is very much correlated to the temperature environment in which they operate. This is no different for control system components, especially those with electronic parts. In recent years, the concept of Distributed Engine Control (DEC) has emerged to address the limitations of the current centralized control implementation. This new approach involves relocating control system components from a relatively benign environment to the harsher thermal environment of the engine casing and its surrounding structures and cavities. In this paper, an approach to modeling the gas turbine thermal environment is described. The modeling approach is applied to a 3rd generation geared turbofan design with a focus on the engine locations where control instrumentation and actuation could be installed. The analysis was conducted with an eye toward component reliability and service life as it relates to the thermal environment. The results were found to be reasonable. Furthermore, the model is shown to execute in real-time within a multi-model simulation environment that demonstrates the capability to interact with hardware to drive test equipment.

Kratz, Jonathan↗
NASA NTRS2018

Update - Body of Knowledge (BOK) for Copper Wire Bonds

Copper wire bond technology developments continue to be a subject of technical interest to the NASA (National Aeronautics and Space Administration) NEPP (NASA Electronic Parts and Packaging Program) which funded this update. Based on this new research, additional copper bond wire vulnerabilities were found in the literature - Crevice corrosion, intrinsic degradation of palladium coated copper wire, congregation of palladium near ball bond interface leading to failure, residual aluminum pad metallization impact on device lifetimes, stitch cracking phenomena, package delamination's that have resulted in wire bond failures and device failure due to elemental sulfur. A search of the U.S.A. patent web site found 3 noteworthy patents on the following developments: claim of a certain IMC (Intermetallic Compound) thickness as a mitigation solution to chlorine corrosion; claim of using materials with different pHs to neutralize contaminants in a package containing copper wire bonds; and a discussion on ball shear test threshold values for different applications. In addition, an aerospace contractor of military hardware had a presentation on copper bond wires where it was reported that there was a parametric shift and noise susceptibility of devices with copper bond wires which affected legacy design performance. A review of silver bond wire (another emerging technology) technical papers found that an electromigration failure mechanism was evident in device applications that operate under high current conditions. More studies may need to be performed on a comprehensive basis. Research areas for consideration are suggested, however, these research and or qualification/standard test areas are not all inclusive and should not be construed as the element (s) that delivers any potential copper wire bond solution. A false sense of security may occur, whenever there is a reliance on passing any particular qualification, standard, or test protocol.

Rutkowski, E.↗
NASA NTRS2019

Body of Knowledge (BOK): Gallium Nitride (GaN) Power Electronics for Space Applications

Gallium nitride (GaN), a wide bandgap (WBG) semiconductor, has emerged as a very promising material for electronic components due to the tremendous advantages it offers compared to silicon (Si), such as power capability, extreme temperature tolerance, and high frequency operation. This presentation summarizes a body of knowledge (BOK) document in reference to the development and current status of GaN technology obtained via literature and industry surveys. It provides a listing of the major manufacturers and their capabilities, as well as government, industry, and academic parties interested in the technology. The presentation also discusses GaN's applications in the area of power electronics, in particular those geared for space missions. Finally, issues relevant to the reliability of GaN-based electronic parts are addressed and limitations affecting the full utilization of this technology are identified.

Boomer, Kristen↗
NASA NTRS2008

Scaled CMOS technology reliability users guide

This work is sponsored by the NASA Electronic Parts and Packaging (NEPP) Program. One of the objectives of this task is to prepare a body of knowledge guideline document summarizing the CMOS technology scaling impact on CMOS parts and parts reliability for space applications. Scaling impact on parts radiation sensitivity is not addressed in this report.

Chen, Yuan↗
NASA NTRS2009

Commercial Sensor Survey Fiscal Year 2009 master compendium radiation test report

The NASA Electronic Parts and Packaging (NEPP) Program Sensor Technology Commercial Sensor Survey task is geared toward benefiting future NASA space missions with low-cost, short-duty-cycle, visible-wavelength imaging needs. Such applications could include imaging for educational outreach purposes or short surveys of spacecraft, planetary, or lunar surfaces. Under the task, inexpensive, low-power, commercial grade CMOS sensors were surveyed in fiscal year 2007 (FY07), and three sensors were selected and tested for total ionizing dose (TID) and displacement damage dose (DDD) tolerance in fiscal year 2008 (FY08). The selected sensors had to meet selection criteria chosen to support small, low-mass cameras that produce good resolution color images. The commercial CMOS sensors tested under the task in FY08 showed very promising response to typical outreach and survey camera TID and DDD levels. In fiscal year 2009 (FY09), the survey was broadened to include two additional, similar sensor products. This compendium provides results for all radiation testing performed on the Micron and OmniVision sensors that were selected for radiation tolerance testing in FY08 and FY09.

Thorbourn, Dennis O.↗
NASA NTRS2009

Virtex-4VQ dynamic and mitigated single event upset characterization summary

This report is the result of funding by the NASA Electronic Parts and Packaging Program (NEPP) and the combined efforts of members within the Xilinx Radiation Test Consortium (XRTC), sometimes known as the Xilinx Single Event Effects (SEE) Test Consortium. The XRTC is a voluntary association of aerospace entities, including leading aerospace companies, universitie and national laboratories, combining resources to characterize reconfigurable, field programmable gate arrays (FPGAs) for aerospace applications. Previous publications of Virtex-4 radiation results are for commercial (non-epitaxial) devices; see, for example, Refs. 1–5. A notable exception is Ref. 6, which presents XRTC upset measurements of storage elements in the PowerPC405s in the XQR4VFX60. This work represents a continuation of the efforts reported in the “Virtex-4QV Static SEU Characterization Summary” [7]. The contents of this report describe various Single Event Functional Interrupt (SEFI) and Single Event Upset (SEU) modes seen while dynamically exercising the clocked resources within Virtex-4 devices and the corresponding mitigation techniques related to the aforementioned observed SEFI modes.

Allen, Gregory↗
NASA NTRS2009

Embedded passives emulator FY2003 interim report

The National Aeronautics and Space Administration Electronic Parts and Packaging (NEPP) Program has been evaluating state-of-the-art Embedded Passive Technology for the printed circuit board (PCB) industry for the past several years and has conducted its own testing on embedded passive coupons (resistors and capacitors). This document is a progress report of the work performed through fiscal year 2008 by NASA and the Navy to convert an existing PWB (printed wiring board) design to a design that incorporates embedded passive components. The work is being performed through a memorandum of understanding (MOU) between the NEPP Program (NASA) and the Naval Surface Warfare Center (NSWC) Crane Emerging Critical Interconnect Technology (ECIT) Program. NSWC Crane’s ECIT Program has funding to convert two PCB designs from the military and aerospace industry to a PCB design with embedded passives. ECIT will provide a design team that will take a well characterized design and convert it to an embedded design. They will also provide electrical modeling and layout expertise as well as build the PWB in their facility in Indiana. NEPP, through the Jet Propulsion Laboratory (JPL), will assemble any passives deemed not suitable for embedding and the active components and electrically test the new design to the existing (non-embedded) design

Gerke, David↗
NASA NTRS2010

NEPP non-volatile memory : FY09 summary report

This report documents the activities and results of the fiscal year 2009 (FY09) funding for the NASA Electronic Parts and Packaging (NEPP) program for non-volatile memory (NVM) devices. The FY09 task was divided into two main efforts: 1. Development of in-house measurement capability for flash devices 2. Reliability characterization of multi-level vs. single-level flash devices The FY09 NEPP Non Volatile Memory study was organized into these two sections in recognition of the continued and increasing importance of NVM to NASA. All NASA missions use NVM for boot code storage and some limited data archiving. Space-grade NVM has lagged commercial NVM development by many orders of magnitude, however. This gap in density only continues to increase as space-grade memories remain constant in the 1–16 Mbit levels, while commercial flash-based devices shrink in size and double in capacity every 18 months. Commercial flash devices are now at the 32 Gbit level, 10,000 times denser than current NASA NVM. This FY marks the beginning of a significant technological transition in NVM for NASA. The aggressive scaling of commercial NVMs has, as a by-product, made some of the flash devices radiation-tolerant enough to be at least considered for low-level radiation environment missions [Irom 2008]. This NEPP task is focused on understanding the reliability and potential future applications of such highly scaled flash memories.

Heidecker, Jason↗
NASA NTRS2009

Evaluation methodology guidance for stack packages

This report provides evaluation methodology guidance based on previous National Aeronautics and Space Administration (NASA) reports and literature surveys for 3D stack packages and assemblies. Two aspects of technology are covered: the package itself (guidance for functional packages) and package assembly manufacturing and reliability. This work was funded by the NASA Electronic Parts and Packaging (NEPP) Program. The objectives of this NEPP project are to: Perform a literature survey of 3D stack technology; perform a literature survey on the evaluation methodology for 3D package and assembly; combine the two aspects to provide evaluation methodology for both aspects with consideration of interactions between package and assembly; generate guidance on the evaluation methodology for 3D stack package integrity prior to and after assembly; provide recommendations on future experimental activities. The qualification and evaluation methodology guidelines will facilitate NASA projects in effectively evaluating the reliability of very dense and newly available high-density 3D stack packages, allowing more processing power in a smaller board footprint and lower system weight.

Gerke, David↗