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At least 307 records · Page 17

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NASA NTRS2016

Enhancing the Cassini Mission Through FP Applications After Launch

Although rigorous pre-emptive measures are taken to preclude failures and anomalous conditions from occurring in JPL spacecraft missions prior to launch, unforeseeable problems can still surface after liftoff. In the case of the Cassini/Huygens Mission-to-Saturn spacecraft, several problems were observed post-launch: 1) immediately after takeoff, the collected engineering/science data stored on the Solid State Recorders (SSR) contained a significantly higher number of corrupted bits than was expected (considerably over spec) due to human error in the memory mapping of these devices, 2) numerous Solid State Power Switches (SSPS) sporadically tripped off throughout the mission due to cosmic ray bombardment from the unique space environment, and 3) false assumptions in the pressure regulator design in combination with missing heritage test data led to inaccurate design conclusions, causing the issuance of two waivers for the regulator to close properly (a potentially mission catastrophic single-point failure which occurred 24 days after launch) - amongst other problems. For Cassini, some of these anomalies led to arduous work-arounds or required continuous monitoring of telemetry variables by the ground-based Spacecraft Operations Flight Support (SOFS) team in order to detect and fix fault occurrences as they happened. Fortunately, sufficient funding and schedule margin allowed several Fault Protection (FP) solutions to be implemented into post-launch Flight Software (FSW) uploads to help resolve these issues autonomously, reducing SOFS ground support efforts while improving anomaly recovery time in order to preserve maximum science capture. This paper details the FP applications used to resolve the above issues as well as to optimize solutions for several other problems experienced by the Cassini spacecraft during its fight, in order to enhance the spacecraft's overall mission success throughout the 18 years of its 20 year expedition to and within the Saturnian system.

fault protection↗

DOE OSTI2024

The Tiny Median Filter: A Small Size, Flexible Arbitrary Percentile Finder Scheme Suitable for FPGA Implementation

This document reports the design, implementation and testing of a small silicon resource usage, very flexible arbitrary percentile finding scheme called the Tiny Median Filter. It can be used not only as a median filter in image processing with square filtering windows, but also for applications of any percentile filter or maximum or minimum finder with any size of data set as long as the number of bits of the data is finite. It opens possibilities for image processing tasks with non-square or irregular filter windows. In this scheme, data swapping or data bit manipulating are avoided and high functional efficiency of the logic components is applied to save silicon resources. Some logic functions are absorbed into other functions to further reduce the complexity. The combinational logic paths are designed to be sufficiently short so that the firmware can be compiled to the maximum operating frequency allowed by the block memories of the FPGA devices. The Tiny Median Filter receives, processes and output data in non-stop manner with no irregular timing which helps to simplify design of surrounding stages.

Wu, Jinyuan [Fermilab] (ORCID:0000000344329521)↗

NASA NTRS1987

Quantification of the memory imprint effect for a charged particle environment

The effects of total accumulated dose on the single-event vulnerability of NMOS resistive-load SRAMs are investigated. The bias-dependent shifts in device parameters can imprint the memory state present during exposure or erase the imprinted state. Analysis of these effects is presented along with an analytic model developed for the quantification of these effects. The results indicate that the imprint effect is dominated by the difference in the threshold voltage of the n-channel devices.

Bhuva, B. L.↗

NASA NTRS1999

SRAM Based Re-programmable FPGA for Space Applications

An SRAM (static random access memory)-based reprogrammable FPGA (field programmable gate array) is investigated for space applications. A new commercial prototype, named the RS family, was used as an example for the investigation. The device is fabricated in a 0.25 micrometers CMOS technology. Its architecture is reviewed to provide a better understanding of the impact of single event upset (SEU) on the device during operation. The SEU effect of different memories available on the device is evaluated. Heavy ion test data and SPICE simulations are used integrally to extract the threshold LET (linear energy transfer). Together with the saturation cross-section measurement from the layout, a rate prediction is done on each memory type. The SEU in the configuration SRAM is identified as the dominant failure mode and is discussed in detail. The single event transient error in combinational logic is also investigated and simulated by SPICE. SEU mitigation by hardening the memories and employing EDAC (error detection and correction) at the device level are presented. For the configuration SRAM (CSRAM) cell, the trade-off between resistor de-coupling and redundancy hardening techniques are investigated with interesting results. Preliminary heavy ion test data show no sign of SEL (single event latch-up). With regard to ionizing radiation effects, the increase in static leakage current (static I(sub CC)) measured indicates a device tolerance of approximately 50krad(Si).

Wang, J. J.↗

DOE OSTI2024

Local structure effects of carbon-doping on the phase change material Ge 2 Sb 2 Te 5

Ge 2 Sb 2 Te 5 is used in phase change memory, a nonvolatile memory technology, due to its phase change properties. The primary advantage of phase change memory over the state-of-the-art (flash memory) is its simple and small device geometry, which allows for denser nodes and lower power consumption. In phase change memory, resistive heating induces fast switching between the high resistance amorphous and low resistance crystalline phases, corresponding to storage of low and high digital states, respectively. However, the instability of the amorphous phase of Ge 2 Sb 2 Te 5 presents issues with processing and long-term data storage; such issues can be resolved by C doping, which stabilizes the amorphous phase and raises the crystallization temperature. To better understand the local structural effects of C doping on Ge 2 Sb 2 Te 5 , in situ Ge K-edge X-ray absorption spectroscopy measurements were taken during heating of films with various C doping concentrations. Here, the range of structural transformation temperatures derived from X-ray absorption near-edge structure analysis across the C doping series proved narrower than crystallization temperatures reported in similar in situ X-ray diffraction experiments, which may reflect changes in local structure that precede long-range ordering during crystallization. In addition, rigorous extended X-ray absorption fine structure fitting across and between temperature series revealed effects of C doping on the rigidity of Ge–Te bonds at low (2 at% and 4 at%) C concentrations.

Langhout, John D.↗

NASA NTRS2001

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Bell, L. D.↗

DOE OSTI2025

Kelvin Probe Force Microscopy Imaging of Plasticity in Hydrogenated Perovskite Nickelate Multilevel Neuromorphic Devices

Ion drift in nanoscale electronically inhomogeneous semiconductors is among the most important mechanisms being studied for designing neuromorphic computing hardware. However, nondestructive imaging of the ion drift in operando devices directly responsible for multiresistance states and synaptic memory represents a formidable challenge. Here, we present Kelvin probe force microscopy imaging of hydrogen-doped perovskite nickelate device channels subject to high-speed electric field pulses to directly visualize proton distribution by monitoring surface potential changes spatially, which is also supported with finite element-based electric field distribution studies. First-principles calculations provide mechanistic insights into the origin of surface potential changes as a function of hydrogen donor doping that serves as the contrast mechanism. We demonstrate 128 (7-bit) nonvolatile conductance levels in such devices relevant to in-memory computing applications. The synaptic plasticity measurements are implemented in spiking neural networks and show promising results for classification (SciKit Learn’s Iris and Wine data sets) and control (OpenAI’s CartPole-v1 and BipedalWalker-v3) simulation tasks.

Kelvin probe force microscopy↗

DOE OSTI2025

Short-Term Forecasting of Thermostatic and Residential Loads Using Long Short-Term Memory Recurrent Neural Networks

Internet of Things (IoT) devices in smart grids enable intelligent energy management for grid managers and personalized energy services for consumers. Investigating a smart grid with IoT devices requires a simulation framework with IoT devices modeling. However, there lack comprehensive study on the modeling of IoT devices in smart grids. This paper investigates the IoT device modeling of a thermostatic load and implements the recurrent neural networks model for short-term load forecasting in this IoT-based thermostatic load. The recurrent neural network structure is leveraged to build a load forecasting model on temporal correlation. The temporal recurrent neural network layers including long short-term memory cells are employed to learn the data from both the simulation platform and New South Wales residential datasets. The simulation results are provided for demonstration.

electric load forecasting↗

NASA NTRS2008

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

LaBel, Kenneth A.↗

NASA NTRS1990

Solid-state thin-film memistor for electronic neural networks

This paper reports on a tungsten-oxide-based, nonvolatile, electrically reprogrammable, variable resistance device as an analog synaptic memory connection for electronic neural networks. A voltage controlled, reversible injection of H(+) ions in electrochromic thin films of WO3 is utilized to modulate its resistance. A hygroscopic thin film of Cr2O3 is the source of H(+) ions. The resistance of the device can be tailored and stabilized over a wide dynamic range (about 4 orders of magnitude), and the programming speed is modulated by the control voltage. The suitability of such a device in terms of its response speed, reversibility, stability, and cyclability for its use in electronic neural networks is discussed.

Thakoor, S.↗

NASA NTRS1987

Hybrid analog-digital associative neural network

Random access memory is used to store synaptic information in the form of a matrix of rows and columns of binary digits. N rows read in sequence are processed through switches and resistors, and a summing amplifier to N neural amplifiers in sequence, one row for each amplifier, using a first array of sample-and-hold devices S/H1 for commutation. The outputs of the neural amplifiers are stored in a second array of sample-and-hold devices S/H2 so that after N rows are processed, all of the second array of sample-and-hold devices are updated. A second memory may be added for binary values of 0 and -1, and processed simultaneously with the first to provide for values of 1, 0, and -1, the results of which are combined in a difference amplifier.

Moopenn, Alexander W.↗

NASA NTRS1989

Hybrid analog-digital associative neural network

Random access memory is used to store synaptic information in the form of a matrix of rows and columns of binary digits. N rows read in sequence are processed through switches and resistors, and a summing amplifier to N neural amplifiers in sequence, one row for each amplifier, using a first array of sample-and-hold devices S/H1 for commutation. The outputs of the neural amplifiers are stored in a second array of sample-and-hold devices S/H2 so that after N rows are processed, all of said second array of sample-and-hold devices are updated. A second memory may be added for binary values of 0 and -1, and processed simultaneously with the first to provide for values of 1, 0, and -1, the results of which are combined in a difference amplifier.

Moopenn, Alexander W.↗

NASA NTRS2001

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Green, M. L.↗

NASA NTRS1985

Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

Nelson, G. L.↗

NASA NTRS2015

Shape Memory Alloy Rock Splitters (SMARS) - A Non-Explosive Method for Fracturing Planetary Rocklike Materials and Minerals

A static rock splitter device based on high-force, high-temperature shape memory alloys (HTSMAs) was developed for space related applications requiring controlled geologic excavation in planetary bodies such as the Moon, Mars, and near-Earth asteroids. The device, hereafter referred to as the shape memory alloy rock splitter (SMARS), consisted of active (expanding) elements made of Ni50.3Ti29.7Hf20 (at.%) that generate extremely large forces in response to thermal input. The preshaping (training) of these elements was accomplished using isothermal, isobaric and cyclic training methods, which resulted in active components capable of generating stresses in excess of 1.5 GPa. The corresponding strains (or displacements) were also evaluated and were found to be 2 to 3 percent, essential to rock fracturing and/or splitting when placed in a borehole. SMARS performance was evaluated using a test bed consisting of a temperature controller, custom heaters and heater holders, and an enclosure for rock placement and breakage. The SMARS system was evaluated using various rock types including igneous rocks (e.g., basalt, quartz, granite) and sedimentary rocks (e.g., sandstone, limestone).

NiTiHf↗

NASA NTRS1991

Formal verification of an MMU and MMU cache

We describe the formal verification of a hardware subsystem consisting of a memory management unit and a cache. These devices are verified independently and then shown to interact correctly when composed. The MMU authorizes memory requests and translates virtual addresses to real addresses. The cache improves performance by maintaining a LRU (least recently used) list from the memory resident segment table.

Schubert, E. T.↗

NASA NTRS2008

Carbon nanotube switches for memory, RF communications and sensing applications, and methods of making the same

Switches having an in situ grown carbon nanotube as an element thereof, and methods of fabricating such switches. A carbon nanotube is grown in situ in mechanical connection with a conductive substrate, such as a heavily doped silicon wafer or an SOI wafer. The carbon nanotube is electrically connected at one location to a terminal. At another location of the carbon nanotube there is situated a pull electrode that can be used to elecrostatically displace the carbon nanotube so that it selectively makes contact with either the pull electrode or with a contact electrode. Connection to the pull electrode is sufficient to operate the device as a simple switch, while connection to a contact electrode is useful to operate the device in a manner analogous to a relay. In various embodiments, the devices disclosed are useful as at least switches for various signals, multi-state memory, computational devices, and multiplexers.

Kaul, Anupama B.↗

DOE OSTI2025

High-Resolution Full-Field Structural Microscopy of the Voltage-Induced Filament Formation in VO 2 -Based Neuromorphic Devices

In order to make neuromorphic functions in memristive devices more efficient, information about the structural properties of filament formation at the micro- and mesoscopic scales is necessary. Despite extensive research on VO 2 , a key material due to its filament formation, local operando structural measurements remain challenging and often involve destructive specimen preparation and long rastering times, greatly limiting the scope of experimental studies. Utilizing dark-field X-ray microscopy (DFXM), a fullfield imaging modality, structural signatures of the filament formation process operando are revealed in VO 2 devices. DFXM experiments illustrate that rutile filaments contain isolated monoclinic clusters, indicating structural nonuniformity interior to the filament. The formation of the rutile phase beneath device electrodes was shown to precede filament development, followed by the formation of filament paths guided by nucleation sites within the device. Finally, a medium-term (<30 min) memory mechanism is observed in VO 2 , mediated by sites within the device gap that tend to switch at significantly lower voltages after electrical cycling, a tendency that persists through a brief thermal reset. High spatial resolution, large field-of-view, structure selectivity, and fast signal acquisition of DFXM provided insight into structural features of the filamentary channel and surrounding regions during voltage cycling.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗