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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS1994

Fluorine Implantation and Residual Stresses in Polysilicon Films

As microelectronic device dimensions are reduced below one micron, the hot carrier effect is a major barrier to continued scaling and VLSI reliability. Several reports have shown that fluorine diffusion into the device gate greatly enhances the resistance to hot carriers. There has been some disagreement as to the mechanism of influence; however, several reports have suggested that the polysilicon is physically modified by the fluorine implant and that the beneficial effects are at least in part due to stress relaxation in the polysilicon.

polysilicon fluorine microelectronic devices hot c↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

JFET↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

Silicon Carbide↗
NASA NTRS2018

The International Space Station Space Radiation Environment: Avionics Systems Performance in Low-Earth Orbit Single Event Effects (SEE) Environments

Single event effects (SEE) are those errors, anomalies, or failures in microelectronic devices caused by the passage of a single energetic charged particle through the device. Spacecraft SEE environments consist primarily of energetic charged particles; both primary particles originating in the natural environment and secondary particles (including secondary neutrons) produced by nuclear reactions of primary particles with spacecraft materials. The energetic charged particle components (electrons, protons, and atomic nuclei) of the spacecraft SEE environment include galactic cosmic rays (GCR), and planetary radiation belt charged particles, as well as solar energetic particle event (SPE) charged particles. The International Space Station (ISS) orbital altitude and inclination (~350 km to ~420 km at 51.6o inclination) results in a spacecraft SEE environment that varies dramatically with the location in Earth?s geomagnetic field. Geomagnetic GCR shielding diminishes with distance from the geomagnetic equator. Near + 51.6o latitude the ISS GCR environment has a high degree of similarity to the interplanetary GCR environment in cis-Lunar space.SEE environments supporting ISS avionics systems design, development, test, and verification are documented in SSP-30512, Space Station Ionizing Radiation Design Environment. Comparisons of overall ISS avionics systems in-flight performance with pre-flight verification report predictions have been previously reported and meet or exceed expectations in all cases.In this paper we report the results of more detailed investigations of the effects of geographic location, altitude, solar cycle, and shielding mass effects on the in-flight SEE performance of the ISS command and data handling system during the past 17 years. In addition, we report on the preflight testing and in-flight performance of the commercial-off-the-shelf lap top computers used on ISS. Finally, we present an assessment of ISS as an avionics SEE test and flight demonstration platform for exploration hardware destined for the cis-lunar or other inner solar system environments.

International Space Station↗
NASA NTRS1965

Logic circuit exhibits optimum performance

Performance of circuits are compared to determine the optimum circuit configuration for implementation into microelectronic functions. Comparison is made in terms of power drain, propagation time, and component variations with temperature and load.

Husson, C.↗
NASA NTRS1967

Thin film process forms effective electrical contacts on semiconductor crystals

Process makes microscopic, low-resistance electrical contacts on hexagonal n-type silicon carbide crystals used for microelectronic devices. A vacuum deposition of aluminum is etched to expose the bare silicon carbide where the electrical contacts are made. Sputtering alternating layers of tantalum and gold forms the alloy film.

Formigoni, N. P.↗
NASA NTRS1967

Ultraminiature television camera

Ultraminiature television camera with a total volume of 20.25 cubic inches, requires 28 vdc power, operates on UHF and accommodates standard 8-mm optics. It uses microelectronic assembly packaging techniques and contains a magnetically deflected and electrostatically focused vidicon, automatic gain control circuit, power supply, and transmitter.

Deterville, R. J.↗
NASA NTRS1967

Logic realization of simple majority voting connectives

Redundant circuitry is added to computer network to eliminate incorrect output obtained due to a component failure, noise, or some other disturbance. This circuitry provides majority operation. Only NAND gates are employed, and the modules used are among the most popular microelectronic or integrated circuits presently in use.

Anderson, T. O.↗
NASA NTRS1966

Reliability through packaging design.

Relation between packaging design and cooling, vibration, RF interference and reliability of microelectronic systems used in space vehicles

COOLING SYSTEM↗
NASA NTRS1968

Improved process for making thin-film sodium niobate capacitors

Sodium niobate, formed by high vacuum, flash, and reactive evaporations, has a high dielectric constant and is used as a thin film dielectric in microelectronic capacitors. High purity films are formed from relatively inexpensive, pure starting materials. Crystalline sodium niobate films can be formed on amorphous or crystalline materials.

Micka, E. Z.↗
NASA NTRS1970

A miniature 1/4-inch diameter 24-pin plug and receptacle

Miniature plug and receptacle, which eliminates the need for permanent fixed leads, is used on wind-tunnel force balances, in the interface connections of microelectronic modular assemblies, and in electric and electronic systems where subsystems must be removed or interchanged.

Phelps, W. R.↗
NASA NTRS1970

Biomedical sensing and display concept improves brain wave monitoring

Concept for increasing effectiveness of biomedical sensing and display promises greater monitoring capability while lessening high skill requirements in operating personnel. New concept overcomes deficiencies of current system by employing increased number of probes and microelectronic preamplifiers.

Trent, R. L.↗