High fidelity, radiation tolerant analog-to-digital converters
Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-.mu.m CMOS technology (1 .mu.m=12.sup.-6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).