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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17

PyTorch Circuit-Aware Bit-Cell Modeling

SAND2024-08549O PyTorch Circuit-Aware Bit-Cell Modeling, a Python library, demonstrates circuit-aware training for analog machine learning accelerators. Built upon PyTorch, this software provides hardware-aware versions of common neural network layers to mitigate non-ideal behavior from novel hardware. The software provides accurate forward and backward pass estimates for hardware-mapped neural networks that are implemented in crossbars (arrays) that contain a non-linear transistor selector device. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.

Bennett, Christopher↗

Ground-state-based model reduction with unitary circuits

Here, we present a method to numerically obtain low-energy effective models based on a unitary transformation of the ground state. The algorithm finds a unitary circuit that transforms the ground state of the original model to a projected wavefunction with only the low-energy degrees of freedom. The effective model can then be derived using the unitary transformation encoded in the circuit. We test our method on the one-dimensional and two-dimensional square-lattice Hubbard model at half-filling, and obtain more accurate effective spin models than the standard perturbative approach.

Hubbard model↗

Microgrid Tiered Circuits Effects for a Planned Housing Community in Puerto Rico

Puerto Rico faced a double strike from hurricanes Irma and Maria in 2017. The resulting damage required a comprehensive rebuild of electric infrastructure. There are plans and pilot projects to rebuild with microgrids to increase resilience. This paper provides a techno-economic analysis technique and case study of a potential future community in Puerto Rico that combines probabilistic microgrid design analysis with tiered circuits in building energy modeling. Tiered circuits in buildings allow electric load reduction via remote disconnection of non-critical circuits during an emergency. When coupled to a microgrid, tiered circuitry can reduce the chances of a microgrid's storage and generation resources being depleted. The analysis technique is applied to show 1) Approximate cost savings due to a tiered circuit structure and 2) Approximate cost savings gained by simultaneously considering resilience and sustainability constraints in the microgrid optimization. The analysis technique uses a resistive capacitive thermal model with load profiles for four tiers (tier 1-3 and non-critical loads). Three analyses were conducted using: 1) open-source software called Tiered Energy in Buildings and 2) the Microgrid Design Toolkit. For a fossil fuel based microgrid 30% of the total microgrid costs of 1.18 million USD were calculated where the non-tiered case keeps all loads 99.9% available and the tiered case keeps tier 1 at 99.9%, tier 2 at 95%, tier 3 at 80% availability, with no requirement on non-critical loads. The same comparison for a sustainable microgrid showed 8% cost savings on a 5.10 million USD microgrid due to tiered circuits. The results also showed 6-7% cost savings when our analysis technique optimizes sustainability and resilience simultaneously in comparison to doing microgrid resilience analysis and renewables net present value analysis independently. Though highly specific to our case study, similar assessments using our analysis technique can elucidate value of tiered circuits and simultaneous consideration of sustainability and resilience in other locations.

building energy modeling↗

Towards Generalizable and Efficient Circuit Topology Design: A Graph-Transformer-based Surrogate Model with Curriculum Learning

Unlike circuit parameter and sizing optimizations, the automated design of analog circuit topologies poses significant challenges for learning-based approaches. One challenge arises from the combinatorial growth of the topology space with circuit size, which limits the topology optimization efficiency. Moreover, traditional circuit evaluation methods are time-consuming, while the presence of data discontinuity in the topology space makes the accurate prediction of circuit performance exceptionally difficult for unseen topologies. To tackle these challenges, we design a novel Graph-Transformer-based Network (GTN) as the surrogate model for circuit evaluation, offering a substantial acceleration in the speed of circuit topology optimization without sacrificing performance. Our GTN model architecture is designed to embed voltage changes in circuit loops and current flows in connected devices, enabling accurate performance predictions for circuits with unseen topologies. To address the cold start problem when scaling GTN to large-scale circuits, we further introduce a curriculum learning strategy that progressively trains GTN from small-scale to large-scale circuits. This approach enables the model to first learn fundamental physical principles from simpler topologies and gradually adapt to complex configurations, effectively bridging the circuit complexity gap and improving prediction accuracy. Taking the power converter circuit design as an experimental task, our GTN model significantly outperforms an analytical approach and baseline methods directly utilizing graph neural networks. Furthermore, GTN achieves less than 5% relative error and 196× speed-up compared with high-fidelity simulation. Notably, our GTN surrogate model empowers an automatic circuit design framework to discover circuits of comparable quality to those identified through high-fidelity simulation while reducing the time required by up to 98.2%. With curriculum learning, the enhanced GTN achieves a 51% improvement for performance prediction of large-scale circuits compared to the GTN model without this strategy. These advancements establish GTN as a scalable framework for automated analog circuit design across varying circuit complexity levels.

Lu, Haoshu [New Jersey Institute of Technology (NJ↗

HSPICE modelling of a solar array circuit controlled by a fet switch

This paper presents a method of modeling a solar array circuit controlled by a hexfet switch on HSPICE. HSPICE models are developed for the solar array current voltage (IV) characteristic and the IRF150 hexfet. Computer simulations are made to verify rate of current change at the load. The equivalent LC circuit for the same current control is modeled to show savings in weight and power in choosing the fet switch over an LC circuit.

Cox, Deanna D.↗

Robust implementation of generative modeling with parametrized quantum circuits

Although the performance of hybrid quantum-classical algorithms is highly dependent on the selection of the classical optimizer and the circuit ansätze, a robust and thorough assessment on-hardware of such features has been missing to date. From the optimizer perspective, the primary challenge lies in the solver’s stochastic nature, and their significant variance over the random initialization. Therefore, a robust comparison requires one to perform several training curves for each solver before one can reach conclusions about their typical performance. Since each of the training curves requires the execution of thousands of quantum circuits in the quantum computer, such a robust study remained a steep challenge for most hybrid platforms available today. In this work, we leverage on Rigetti’s Quantum Cloud Services (QCS™) to overcome this implementation barrier, and we study the on-hardware performance of the data-driven quantum circuit learning (DDQCL) for three different state-of-the-art classical solvers, and on two-different circuit ansätze associated to different entangling connectivity graphs for the same task. Additionally, we assess the gains in performance from varying circuit depths. To evaluate the typical performance associated with each of these settings in this benchmark study, we use at least five independent runs of DDQCL towards the generation of quantum generative models capable of capturing the patterns of the canonical Bars and Stripes dataset. In this experimental benchmarking, the gradient-free optimization algorithms show an outstanding performance compared to the gradient-based solver. In particular, one of them had better performance when handling the unavoidable noisy objective function to be minimized under experimental conditions.

97 MATHEMATICS AND COMPUTING↗

Functional models of power electronic components for system studies

A novel approach to model power electronic circuits has been developed to facilitate simulation studies of system-level issues. The underlying concept for this approach is to develop an equivalent circuit, the functional model, that performs the same functions as the actual circuit but whose operation can be simulated by using larger time step size and the reduction in model complexity, the computation time required by a functional model is significantly shorter than that required by alternative approaches. The authors present this novel modeling approach and discuss the functional models of two major power electronic components, the DC/DC converter unit and the load converter, that are being considered by NASA for use in the Space Station Freedom electric power system. The validity of these models is established by comparing the simulation results with available experimental data and other simulation results obtained by using a more established modeling approach. The usefulness of this approach is demonstrated by incorporating these models into a power system model and simulating the system responses and interactions between components under various conditions.

Tam, Kwa-Sur↗

Effect of transient winds on the flow quality of an open-circuit wind-tunnel model

The effect of a transient wind on the test-section flow quality of an open-circuit wind tunnel was investigated experimentally. The investigation was restricted to transient wind effects associated with the inlet. A small open-circuit wind tunnel was placed outside in the real wind environment. Test-section speed and angularity as well as wind speed and direction was measured by high-response instrumentation. The inlet configuration was varied with a set of screens, a removable honeycomb, and a removable inlet lip. Acceptable flow was obtained at all wind angles and for wind- to test-section-velocity ratios up to 0.4 with an inlet configuration having five screens, a honeycomb, and a lip. With inlet configurations sensitive to winds, a transient wind parallel to the tunnel axis produced local fluctuations in test-section speed and angularity; however, oscillation of the average test-section speed was not evident. The effect of wind direction was negligible up to wind angles of 45 deg relative to the tunnel axis. At larger wind angles, flow distortions occurred primarily on the windward side of the test section.

Breunlin, D. C.↗

Active learning of chemical reaction networks via probabilistic graphical models and Boolean reaction circuits

Discerning networks of many reactions among multiple interconverting species is challenging. Here, we present a reaction network identification methodology. Our methodology enumerates all stoichiometrically and chemically feasible reactions and requires statistical evidence from effluent concentrations for the inclusion or exclusion of each from the reaction network, contrasting with the commonly seen incremental approach and other work of relying heavily upon chemical intuition and assuming the reactions occurring. Using graph theory alongside an active learning design of experiments that propose maximally informative feeds, we identify the underlying reaction network with minimal laboratory runs. Here, we introduce chemistry-probabilistic graphical modeling and Boolean reaction circuits to statistically quantify which reactions occur from effluent concentrations. Our methodology accurately discerns active reactions, as showcased upon a laboratory network of cross-ketonization of furoic and lauric acid and validated upon simulated networks of thermal and CO 2 -assisted ethane dehydrogenation.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Harnessing ionic complexity: A modeling approach for hierarchical ionic circuit design

Since the 1950s, soft ionic devices have evolved from individual components to an expanding library of sensors, actuators, signal transmitters, and processors. However, integrating these components into complex, multifunctional systems remains challenging due to the nonintuitive and nonlinear interactions between ionic elements. In this work, we address these fundamental challenges by developing a lumped element model that enables interrogation of the physics that governs ionic circuits, as well as rapid design and optimization. Our model captures features specific to ionic charge carriers, while preserving the hierarchical design flexibility and computational efficiency of traditional circuit modeling. We demonstrate that our model can not only fit individual device behavior but also accurately predict the behavior of larger circuits formed by combining those devices. Additionally, we show how our tool utilizes the intrinsic nonlinearities of ionic systems to enable extended functionality, revealing how factors such as ion enrichment, ion leakage, and polymer charge density influence performance. Lastly, we present a fully ionic power supply, sensor, control system, and actuator for a soft robot that adapts its motion in response to environmental salt, illustrating the tool’s potential to accelerate advancements in chemical sensing, biointerfacing, biomimetic systems, and adaptive materials.

42 ENGINEERING↗

Investigating the Simulink Auto-Coding Process

Model based program design is the most clear and direct way to develop algorithms and programs for interfacing with hardware. While coding "by hand" results in a more tailored product, the ever-growing size and complexity of modern-day applications can cause the project work load to quickly become unreasonable for one programmer. This has generally been addressed by splitting the product into separate modules to allow multiple developers to work in parallel on the same project, however this introduces new potentials for errors in the process. The fluidity, reliability and robustness of the code relies on the abilities of the programmers to communicate their methods to one another; furthermore, multiple programmers invites multiple potentially differing coding styles into the same product, which can cause a loss of readability or even module incompatibility. Fortunately, Mathworks has implemented an auto-coding feature that allows programmers to design their algorithms through the use of models and diagrams in the graphical programming environment Simulink, allowing the designer to visually determine what the hardware is to do. From here, the auto-coding feature handles converting the project into another programming language. This type of approach allows the designer to clearly see how the software will be directing the hardware without the need to try and interpret large amounts of code. In addition, it speeds up the programming process, minimizing the amount of man-hours spent on a single project, thus reducing the chance of human error as well as project turnover time. One such project that has benefited from the auto-coding procedure is Ramses, a portion of the GNC flight software on-board Orion that has been implemented primarily in Simulink. Currently, however, auto-coding Ramses into C++ requires 5 hours of code generation time. This causes issues if the tool ever needs to be debugged, as this code generation will need to occur with each edit to any part of the program; additionally, this is lost time that could be spent testing and analyzing the code. This is one of the more prominent issues with the auto-coding process, and while much information is available with regard to optimizing Simulink designs to produce efficient and reliable C++ code, not much research has been made public on how to reduce the code generation time. It is of interest to develop some insight as to what causes code generation times to be so significant, and determine if there are architecture guidelines or a desirable auto-coding configuration set to assist in streamlining this step of the design process for particular applications. To address the issue at hand, the Simulink coder was studied at a foundational level. For each different component type made available by the software, the features, auto-code generation time, and the format of the generated code were analyzed and documented. Tools were developed and documented to expedite these studies, particularly in the area of automating sequential builds to ensure accurate data was obtained. Next, the Ramses model was examined in an attempt to determine the composition and the types of technologies used in the model. This enabled the development of a model that uses similar technologies, but takes a fraction of the time to auto-code to reduce the turnaround time for experimentation. Lastly, the model was used to run a wide array of experiments and collect data to obtain knowledge about where to search for bottlenecks in the Ramses model. The resulting contributions of the overall effort consist of an experimental model for further investigation into the subject, as well as several automation tools to assist in analyzing the model, and a reference document offering insight to the auto-coding process, including documentation of the tools used in the model analysis, data illustrating some potential problem areas in the auto-coding process, and recommendations on areas or practices in the current Ramses model that should be further investigated. Several skills were required to be built up over the course of the internship project. First and foremost, my Simulink skills have improved drastically, as much of my experience had been modeling electronic circuits as opposed to software models. Furthermore, I am now comfortable working with the Simulink Auto-coder, a tool I had never used until this summer; this tool also tested my critical thinking and C++ knowledge as I had to interpret the C++ code it was generating and attempt to understand how the Simulink model affected the generated code. I had come into the internship with a solid understanding of Matlab code, but had done very little in using it to automate tasks, particularly Simulink tasks; along the same lines, I had rarely used shell script to automate and interface with programs, which I gained a fair amount of experience with this summer, including how to use regular expression. Lastly, soft-skills are an area everyone can continuously improve on; having never worked with NASA engineers, which to me seem to be a completely different breed than what I am used to (commercial electronic engineers), I learned to utilize the wealth of knowledge present at JSC. I wish I had come into the internship knowing exactly how helpful everyone in my branch would be, as I would have picked up on this sooner. I hope that having gained such a strong foundation in Simulink over this summer will open the opportunity to return to work on this project, or potentially other opportunities within the division. The idea of leaving a project I devoted ten weeks to is a hard one to cope with, so having the chance to pick up where I left off sounds appealing; alternatively, I am interested to see if there are any opening in the future that would allow me to work on a project that is more in-line with my research in estimation algorithms. Regardless, this summer has been a milestone in my professional career, and I hope this has started a long-term relationship between JSC and myself. I really enjoy the thought of building on my experience here over future summers while I work to complete my PhD at Missouri University of Science and Technology.

Gualdoni, Matthew J.↗

A Parametric Reduced-Order Model for Inverter Short-Circuit Response in Protection Studies

This paper presents a reduced-order model (ROM) for grid-following (GFL) inverters that reproduces inverter fault current trajectories, including sub transients, transient, and steady-state phases, across a range of fault types, locations, and pre-fault operating points. . The proposed model is developed by: Constructing the positive- and negative-sequence current with parameterization fitted by large data training and fitting Validating using EMT simulation against EMT full model and demonstrating the ROM's capability to capture fault current magnitude, phase angle, and oscillatory transients. Building a standard EMT simulation platform library component for easy configuration and application.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Double layers and circuits in astrophysics

As the rate of energy release in a double layer with voltage delta V is P approx I delta V, a double layer must be treated as a part of a circuit which delivers the current I. As neither double layer nor circuit can be derived from magnetofluid models of a plasma, such models are useless for treating energy transfer by means of double layers. They must be replaced by particle models and circuit theory. A simple circuit is suggested which is applied to the energizing of auroral particles, to solar flares, and to intergalactic double radio sources. Application to the heliospheric current systems leads to the prediction of two double layers on the Sun's axis which may give radiations detectable from Earth. Double layers in space should be classified as a new type of celestial object (one example is the double radio sources). It is tentatively suggested in X-ray and Gamma-ray bursts may be due to exploding double layers (although annihilation is an alternative energy source). A study of how a number of the most used textbooks in astrophysics treat important concepts like double layers, critical velocity, pinch effects and circuits is made.

Alfven, Hannes↗