Effect of electron radiation on silicon nitride insulated gate field effect transistors.
Electron radiation stability of silicon nitride insulated gate FET with passivation layers and heat treatment, noting contamination effects
Newman, P. A.↗
SEARCH · Search NASA
Results for “gate”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
An adaptive threshold gate using a tunnel diode memory.
Five input adaptive threshold logic gate using tunnel diode analog memory
Bargainer, J. D., Jr.↗
Effect of signal duration on detection for gated and for continuous noise.
Effect of signal duration on detection for gated and for continuous noise
MASKING↗
An investigation of the effects of radiation on silicon nitride insulated gate /MNS/ transistors Final report
Radiation effects on silicon nitride insulated gate field effect transistors
Frank, R.↗
Diagnosis of single-gate failures in combinational circuits.
Arbitrary single gate failures diagnosis in combinational logic circuits not requiring fault table construction
Hornbuckle, G. D.↗
Nonlinear analysis of an absolute value type of early-late-gate bit synchronizer.
Absolute value type of early-late gate bit synchronizer phase noise performance determined by Fokker-Planck method, comparing results with different circuits performance
Simon, M. K.↗
False high gate targeting for LM powered descent
False high gate targeting for lunar module powered descent
Mc Swain, G.↗
Feasibility investigation of insulated-gate field-effect transistors fabricated by techniques compatible with thick-film technology
Low temperature semiconductor deposition techniques in fabricating thick film, insulated gate, field effect transistors
Baxter, R. D.↗
Inexpensive photon counting system with internal gate generator
Preamplifier-discriminator-gate generator in printed circuit for use with photomultipliers, noting pulse sensitivity and cost
Born, J.↗
Thin high-vacuum gate valve
Thin high vacuum gate valve design for use with UV grating spectrograph
Ugiansky, R. J.↗
Wall attachment, flueric crossover ''AND'' gate
Gate performance is not adversely affected by normal dimensional variations encountered in fabrication and it operates throughout full loading range. Flow from one control must be sufficiently monostable to allow initial attachment and upon switching, return to outer wall. Venting must be adequate.
Hellbaum, R. F.↗
Ultrathin gate valve for high vacuum operation
Thin, compact, high-vacuum gate valve used to join two vacuum systems together demonstrates multiple operation reliability. Valve measurements and non-protruding handle make valve usable in confined areas.
Ugiansky, R. J.↗
A low power NAND gate integrated circuit employing thin film resistors and lateral p-n-p transitors Final engineering report
Low power NAND gate integrated circuit employing thin film resistors and lateral p-n-p transistors
Source record↗
Monostable multivibrator with complementary NOR gates Patent
Monostable multivibrator for producing output pulse widths with positive feedback NOR gates
Oneill, R. W.↗
Nonlinear analysis of an absolute value type of an early-late gate bit synchronizer
Absolute value type early-late gate bit synchronizer steady state phase noise performance evaluation by Fokker-Planck method
Simon, M. K.↗
The application of an analog computer for the determination of charge centers in the gate structure of the variable threshold FET
Analog computer application for determination of charge centers in multilayer gate structure of variable threshold FET, deriving equations yielding position of internally stored charge
Lewis, E. T.↗
Gate protective device for SOS array
Protective gate device consisting of alternating heavily doped n(+) and p(+) diffusions eliminates breakdown voltages in silicon oxide on sapphire arrays caused by electrostatic discharge from person or equipment. Diffusions are easily produced during normal double epitaxial processing. Devices with nine layers had 27-volt breakdown.
Meyer, J. E., Jr.↗