Effect of electron radiation on silicon nitride insulated gate field effect transistors.
Electron radiation stability of silicon nitride insulated gate FET with passivation layers and heat treatment, noting contamination effects
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Electron radiation stability of silicon nitride insulated gate FET with passivation layers and heat treatment, noting contamination effects
Five input adaptive threshold logic gate using tunnel diode analog memory
Effect of signal duration on detection for gated and for continuous noise
Radiation effects on silicon nitride insulated gate field effect transistors
Arbitrary single gate failures diagnosis in combinational logic circuits not requiring fault table construction
Absolute value type of early-late gate bit synchronizer phase noise performance determined by Fokker-Planck method, comparing results with different circuits performance
False high gate targeting for lunar module powered descent
Low temperature semiconductor deposition techniques in fabricating thick film, insulated gate, field effect transistors
Preamplifier-discriminator-gate generator in printed circuit for use with photomultipliers, noting pulse sensitivity and cost
Thin high vacuum gate valve design for use with UV grating spectrograph
Gate performance is not adversely affected by normal dimensional variations encountered in fabrication and it operates throughout full loading range. Flow from one control must be sufficiently monostable to allow initial attachment and upon switching, return to outer wall. Venting must be adequate.
Thin, compact, high-vacuum gate valve used to join two vacuum systems together demonstrates multiple operation reliability. Valve measurements and non-protruding handle make valve usable in confined areas.
Low power NAND gate integrated circuit employing thin film resistors and lateral p-n-p transistors
Monostable multivibrator for producing output pulse widths with positive feedback NOR gates
Absolute value type early-late gate bit synchronizer steady state phase noise performance evaluation by Fokker-Planck method
Analog computer application for determination of charge centers in multilayer gate structure of variable threshold FET, deriving equations yielding position of internally stored charge
Protective gate device consisting of alternating heavily doped n(+) and p(+) diffusions eliminates breakdown voltages in silicon oxide on sapphire arrays caused by electrostatic discharge from person or equipment. Diffusions are easily produced during normal double epitaxial processing. Devices with nine layers had 27-volt breakdown.