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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17

Space Telecommunications Radio System (STRS) Architecture, Tutorial Part 1 - Overview

Space Telecommunications Radio System (STRS) Architecture Standard provides a NASA standard forsoftware-defined radio. The STRS architecture has been demonstrated in the Space Communications and Navigation(SCaN) Testbed on the International Space Station as well as associated ground station radios. The STRS ArchitectureTutorial Overview presents a general introduction to the STRS architecture standard developed at the NASA GlennResearch Center (GRC), describes some of the main elements for STRS compliance, and addresses some frequentlyasked questions.. The STRS architecture should be used as a base for many of NASA s future telecommunicationstechnologies. The presentation will provide a basic understanding of STRS.

Handler, Louis M.↗

The Massively Parallel Processor and its applications

A long-term experimental development program conducted at Goddard Space Flight Center to implement an ultrahigh-speed data processing system known as the Massively Parallel Processor (MPP) is described. The MPP is a single instruction multiple data stream computer designed to perform logical, integer, and floating point arithmetic operations on variable word length data. Information is presented on system architecture, the system configuration, the array unit architecture, individual processing units, and expected operating rates for several image processing applications (including the processing of Landsat data).

Strong, J. P.↗

Performance of DA/FDMA architecture proposed for MSS

The system architecture proposed for the Mobile Satellite Service (MSS) by the National Aeronautics and Space Administration (NASA)/JPL is presented. The demand assigned Frequency Division Multiple Access (FDMA) scheme is described, and results for the associated network access protocol developed by JPL are presented. Both the total number of users that the system can support and the system spectral efficiency are given for a variety of traffic conditions, including those postulated for the Mobile Satellite System Architectures and Multiple Access Techniques Workshop. The results are given for both first- and second-generation one- and two-satellite systems.

Wang, Charles↗

Programable Lead Screw Actuated Self-Leveling Platform

The Programmable Lead Screw Actuated Self-Leveling Platform (PLSASLP) was developed to provide a self-leveling and load-bearing foundation for payloads that need leveling of up to 15 degrees. Consequently, the PLSASLP can also provide a 30-degree conical field of view for precision pointing of instruments. PLSASLP is based on a simple, yet stable geometric model, where undesired motions are restricted to minimize hardware mass and complexity needed to keep the leveling base stable. Redundancy can also be implemented without changing the system architecture. Both system simplicity and configurability indicate the PLSASLP architecture is an effective, viable leveling and pointing solution for flight applications.

Iok M. Wong↗

Space Telecommunications Radio System (STRS) Architecture Goals/Objectives and Level 1 Requirements

The Space Telecommunications Radio System (STRS) Architecture Requirements Document provides the basis for the development of an open architecture for NASA Software Defined Radios (SDRs) for space use. The main objective of this document is to evaluate the goals and objectives and high level (Level 1) requirements that have bearing on the design of the architecture. The goals and objectives will provide broad, fundamental direction and purpose. The high level requirements (Level 1) intend to guide the broader and longer term aspects aspects of the SDR Architecture and provide guidance for the development of level 2 requirements.

Briones, Janette C.↗

DFT algorithms for bit-serial GaAs array processor architectures

Systems and Processes Engineering Corporation (SPEC) has developed an innovative array processor architecture for computing Fourier transforms and other commonly used signal processing algorithms. This architecture is designed to extract the highest possible array performance from state-of-the-art GaAs technology. SPEC's architectural design includes a high performance RISC processor implemented in GaAs, along with a Floating Point Coprocessor and a unique Array Communications Coprocessor, also implemented in GaAs technology. Together, these data processors represent the latest in technology, both from an architectural and implementation viewpoint. SPEC has examined numerous algorithms and parallel processing architectures to determine the optimum array processor architecture. SPEC has developed an array processor architecture with integral communications ability to provide maximum node connectivity. The Array Communications Coprocessor embeds communications operations directly in the core of the processor architecture. A Floating Point Coprocessor architecture has been defined that utilizes Bit-Serial arithmetic units, operating at very high frequency, to perform floating point operations. These Bit-Serial devices reduce the device integration level and complexity to a level compatible with state-of-the-art GaAs device technology.

Mcmillan, Gary B.↗

Developing Information Power Grid Based Algorithms and Software

This exploratory study initiated our effort to understand performance modeling on parallel systems. The basic goal of performance modeling is to understand and predict the performance of a computer program or set of programs on a computer system. Performance modeling has numerous applications, including evaluation of algorithms, optimization of code implementations, parallel library development, comparison of system architectures, parallel system design, and procurement of new systems. Our work lays the basis for the construction of parallel libraries that allow for the reconstruction of application codes on several distinct architectures so as to assure performance portability. Following our strategy, once the requirements of applications are well understood, one can then construct a library in a layered fashion. The top level of this library will consist of architecture-independent geometric, numerical, and symbolic algorithms that are needed by the sample of applications. These routines should be written in a language that is portable across the targeted architectures.

Dongarra, Jack↗

A Demonstration Advanced Avionics System for general aviation

A program initiated within NASA has emphasized the use of a data bus, microprocessors, electronic displays and data entry devices for general aviation. A Demonstration Advanced Avionics System (DAAS) capable of evaluating critical and promising elements of an integrating system that will perform the functions of (1) automated guidance and navigation; (2) flight planning; (3) weight and balance performance computations; (4) monitoring and warning; and (5) storage of normal and emergency check lists and operational limitations is described. Consideration is given to two major parts of the DAAS instrument panel: the integrated data control center and an electronic horizontal situation indicator, and to the system architecture. The system is to be installed in the Ames Research Center's Cessna 402B in the latter part of 1980; engineering flight testing will begin in the first part of 1981.

Denery, D. G.↗

The semi-Markov unreliability range evaluator program

The SURE program is a design/validation tool for ultrareliable computer system architectures. The system uses simple algebraic formulas to compute accurate upper and lower bounds for the death state probabilities of a large class of semi-Markov models. The mathematical formulas used in the program were derived from a mathematical theorem proven by Allan White under contract to NASA Langley Research Center. This mathematical theorem is discussed along with the user interface to the SURE program.

Butler, R. W.↗

Integrated Application of Active Controls (IAAC) technology to an advanced subsonic transport project. ACT/Control/Guidance System study, volume 1

The active control technology (ACT) control/guidance system task of the integrated application of active controls (IAAC) technology project within the NASA energy efficient transport program was documented. The air traffic environment of navigation and air traffic control systems and procedures were extrapolated. An approach to listing flight functions which will be performed by systems and crew of an ACT configured airplane of the 1990s, and a determination of function criticalities to safety of flight, are the basis of candidate integrated ACT/Control/Guidance System architecture. The system mechanizes five active control functions: pitch augmented stability, angle of attack limiting, lateral/directional augmented stability, gust load alleviation, and maneuver load control. The scope and requirements of a program for simulating the integrated ACT avionics and flight deck system, with pilot in the loop, are defined, system and crew interface elements are simulated, and mechanization is recommended. Relationships between system design and crew roles and procedures are evaluated.

Source record↗

Restricted access processor - An application of computer security technology

This paper describes a security guard device that is currently being developed by Computer Sciences Corporation (CSC). The methods used to provide assurance that the system meets its security requirements include the system architecture, a system security evaluation, and the application of formal and informal verification techniques. The combination of state-of-the-art technology and the incorporation of new verification procedures results in a demonstration of the feasibility of computer security technology for operational applications.

Mcmahon, E. M.↗

Central Processor Acts as High-Speed DMA Controller

Computer-system architecture enables system host central processor (CP) to make high-speed, direct-memory-access (DMA) data transfers without cost and complexity of adding dedicated DMA controller. New system, CCP used as DMA controller, obviating need for dedicated DMA controller; yet maximum transfer rates equivalent to those obtained with dedicated DMA controller. Useful wherever dedicated DMA controller desired because of required data-transfer rates.

Blaha, Matthew S.↗

The integrated analysis capability (IAC Level 2.0)

The critical data management issues involved in the development of the integral analysis capability (IAC), Level 2, to support the design analysis and performance evaluation of large space structures, are examined. In particular, attention is given to the advantages and disadvantages of the formalized data base; merging of the matrix and relational data concepts; data types, query operators, and data handling; sequential versus direct-access files; local versus global data access; programming languages and host machines; and data flow techniques. The discussion also covers system architecture, recent system level enhancements, executive/user interface capabilities, and technology applications.

Frisch, Harold P.↗

Phase calibration of polarimetric radar images

The problem of phase calibration between polarization channels of an imaging radar is studied. The causes of various types of phase errors due to the radar system architecture and system imperfections are examined. A simple model is introduced to explain the spatial variation in phase error as being due to a displacement between the phase centers of the vertical and horizontal antennas. It is also shown that channel leakage can cause a spatial variation in phase error. Phase calibration using both point and distributed ground targets is discussed and a method for calibrating phase using only distributed target is verified, subject to certain constraints. Experimental measurements using the NADC/ERIM P-3 synthetic-aperture radar (SAR) system and NASA/JPL DC-8 SAR, which operates at C-, L-, and P-bands, are presented. Both of these systems are multifrequency, polarimetric, airborne, SAR systems.

Sheen, Dan R.↗

High-speed digital fiber optic links for satellite traffic

Large aperture phased array antennas operating at millimeter wave frequencies are designed for space-based communications and imaging platforms. Array elements are comprised of active T/R modules which are linked to the central processing unit through high-speed fiber-optic networks. The system architecture satisfying system requirements at millimeter wave frequency is T/R level data mixing where data and frequency reference signals are distributed independently before mixing at the T/R modules. This paper demonstrates design procedures of a low loss high-speed fiber-optic link used for transmission of data signals over 600-900 MHz bandwidth inside satellite. The fiber-optic link is characterized for transmission of analog and digital data. A dynamic range of 79 dB/MHz was measured for analog data over the bandwidth. On the other hand, for bursted SMSK satellite traffic at 220 Mbps rates, BER of 2 x 10 to the -7th was measured for E(b)/N(o) of 14.3 dB.

Daryoush, A. S.↗

The Development of a Data Archive and Analysis Tools for WIRE

Contents include the following: mission description and system identification; environment description; system architectural description; system security requirements; organization and resources; and ditscap plan. Appendix A, acronym list. Appendix B, definitions. Appendix C, references.

Buzasi, D.↗

Systems Integration Challenges for a National Space Launch System

System Integration was refined through the complexity and early failures experienced in rocket flight. System Integration encompasses many different viewpoints of the system development. System Integration must ensure consistency in development and operations activities. Human Space Flight tends toward large, complex systems. Understanding the system fs operational and use context is the guiding principle for System Integration: (1) Sizeable costs can be driven into systems by not fully understanding context (2). Adhering to the system context throughout the system fs life cycle is essential to maintaining efficient System Integration. System Integration exists within the System Architecture. Beautiful systems are simple in use and operation -- Block upgrades facilitate manageable steps in functionality evolution. Effective System Integration requires a stable system concept. Communication is essential to system simplicity

May, Todd A.↗

Transportable telemetry workstation for future distributed system environments

A Transportable Telemetry Workstation (TTW) has been developed to meet the need for reduction in size and cost per station while maintaining high performance specifications in distributed system environments. The TTW consists primarily of the adaptation of NASA's Goddard Space Flight Center VLSI components and system architecture to a personal computer and its architecture. The overall system, the architecture, the TTW Controller Card, TTW Synchronizer Card, custom backplane bus, and system software structure are described.

Collins, Aaron↗