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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Improved correlating subsystem of pseudorandom-code ranging system made possible by advent of fast, custom-made, very-large-scale integrated circuits. Performs far fewer arithmetical operations, contains much less specialized analog and digital circuitry, and used with large number of different codes.
Cost Management Model, CMM, software tool for planning, tracking, and reporting costs and information related to costs. Capable of estimating costs, comparing estimated to actual costs, performing "what-if" analyses on estimates of costs, and providing mechanism to maintain data on costs in format oriented to management. Number of supportive cost methods built in: escalation rates, production-learning curves, activity/event schedules, unit production schedules, set of spread distributions, tables of rates and factors defined by user, and full arithmetic capability. Import/export capability possible with 20/20 Spreadsheet available on Data General equipment. Program requires AOS/VS operating system available on Data General MV series computers. Written mainly in FORTRAN 77 but uses SGU (Screen Generation Utility).
Described here are Boeing software tools used for the development of control laws of flexible structures. The Boeing Company has developed a software tool called Modern Control Software Package (MPAC). MPAC provides the environment necessary for linear model development, analysis, and controller design for large models of flexible structures. There are two features of MPAC which are particularly appropriate for use with large models: (1) numerical accuracy and (2) label-driven nature. With the first feature MPAC uses double precision arithmetic for all numerical operations and relies on EISPAC and LINPACK for the numerical foundation. With the second feature, all MPAC model inputs, outputs, and states are referenced by user-defined labels. This feature allows model modification while maintaining the same state, input, and output names. In addition, there is no need for the user to keep track of a model variable's matrix row and colunm locations. There is a wide range of model manipulation, analysis, and design features within the numerically robust and flexible environment provided by MPAC. Models can be built or modified using either state space or transfer function representations. Existing models can be combined via parallel, series, and feedback connections; and loops of a closed-loop model may be broken for analysis.
The existing q-Markov COVER realization theory does not take into account the problems of arithmetic errors due to both the quantization of states and coefficients of the reduced order model. All q-Markov COVERs allow some freedom in the choice of parameters. Here, researchers exploit this freedom in the existing theory to optimize the models with respect to these finite wordlength effects.
The architecture and VLSI design of a new massively parallel processing array chip are described. The BLITZEN processing element array chip, which contains 1.1 million transistors, serves as the basis for a highly integrated, miniaturized, high-performance, massively parallel machine that is currently under development. Each processing element has 1K bits of static RAM and performs bit-serial processing with functional elements for arithmetic, logic, and shifting.
The problem is addressed to find a 1-1 mapping of the vertices of a binary tree onto those of a target binary tree such that the son of a node on the first binary tree is mapped onto a descendent of the image of that node in the second binary tree. There are two natural measures of the cost of this mapping, namely the dilation cost, i.e., the maximum distance in the target binary tree between the images of vertices that are adjacent in the original tree. The other measure, expansion cost, is defined as the number of extra nodes/edges to be added to the target binary tree in order to ensure a 1-1 mapping. An efficient algorithm to find a mapping of one binary tree onto another is described. It is shown that it is possible to minimize one cost of mapping at the expense of the other. This problem arises when designing pipelined arithmetic logic units (ALU) for special purpose computers. The pipeline is composed of ALU chips connected in the form of a binary tree. The operands to the pipeline can be supplied to the leaf nodes of the binary tree which then process and pass the results up to their parents. The final result is available at the root. As each new application may require a distinct nesting of operations, it is useful to be able to find a good mapping of a new binary tree over existing ALU tree. Another problem arises if every distinct required binary tree is known beforehand. Here it is useful to hardwire the pipeline in the form of a minimal supertree that contains all required binary trees.
An experimental analysis is described which studies the susceptibility of a microprocessor based jet engine controller to upsets caused by current and voltage transients. A design automation environment which allows the run time injection of transients and the tracing from their impact device to the pin level is described. The resulting error data are categorized by the charge levels of the injected transients by location and by their potential to cause logic upsets, latched errors, and pin errors. The results show a 3 picoCouloumb threshold, below which the transients have little impact. An Arithmetic and Logic Unit transient is most likely to result in logic upsets and pin errors (i.e., impact the external environment). The transients in the countdown unit are potentially serious since they can result in latched errors, thus causing latent faults. Suggestions to protect the processor against these errors, by incorporating internal error detection and transient suppression techniques, are also made.
The dynamic equations of motion of an n-body pendulum with spherical joints are derived to be a mixed system of differential and algebraic equations (DAE's). The DAE's are kept in implicit form to save arithmetic and preserve the sparsity of the system and are solved by the robust implicit integration method. At each solution point, the predicted solution is corrected to its exact solution within given tolerance using Newton's iterative method. For each iteration, a linear system of the form J delta X = E has to be solved. The computational cost for solving this linear system directly by LU factorization is O(n exp 3), and it can be reduced significantly by exploring the structure of J. It is shown that by recognizing the recursive patterns and exploiting the sparsity of the system the multiplicative and additive computational costs for solving J delta X = E are O(n) and O(n exp 2), respectively. The formulation and solution method for an n-body pendulum is presented. The computational cost is shown to be nearly linearly proportional to the number of bodies.
Parallel processing of real-time dynamic systems simulation on a multiprocessor system named OSCAR is presented. In the simulation of dynamic systems, generally, the same calculation are repeated every time step. However, we cannot apply to Do-all or the Do-across techniques for parallel processing of the simulation since there exist data dependencies from the end of an iteration to the beginning of the next iteration and furthermore data-input and data-output are required every sampling time period. Therefore, parallelism inside the calculation required for a single time step, or a large basic block which consists of arithmetic assignment statements, must be used. In the proposed method, near fine grain tasks, each of which consists of one or more floating point operations, are generated to extract the parallelism from the calculation and assigned to processors by using optimal static scheduling at compile time in order to reduce large run time overhead caused by the use of near fine grain tasks. The practicality of the scheme is demonstrated on OSCAR (Optimally SCheduled Advanced multiprocessoR) which has been developed to extract advantageous features of static scheduling algorithms to the maximum extent.
The primary goal of the study was to explore the utility of event-related brain potentials (ERP) as real-time measures of workload. To this end, subjects performed two different tasks both separately and together. One task required that subjects monitor a bank of constantly changing gauges and detect critical deviations. Difficulty was varied by changing the predictability of the gauges. The second task was mental arithmetic. Difficulty was varied by requiring subjects to perform operations on either two or three columns of numbers. Two conditions that could easily be distinguished on the basis of performance measures were selected for the real-time evaluation of ERPs. A bootstrapping approach was adopted in which one thousand samples of n trials (n = 1, 3, 5 ...65) were classified using several measures of P300 and Slow Wave amplitude. Classification accuracies of 85 percent were achieved with 25 trials. Results are discussed in terms of potential enhancements for real-time recording.
A new infrared array camera system has been successfully applied to high background 5 - 14 micron astronomical imaging photometry observations, using a hybrid 58 x 62 pixel Si:Ga array detector. The off-axis reflective optical design incorporating a parabolic camera mirror, circular variable filter wheel, and cold aperture stop produces diffraction-limited images with negligible spatial distortion and minimum thermal background loading. The camera electronic system architecture is divided into three subsystems: (1) high-speed analog front end, including 2-channel preamp module, array address timing generator, bias power suppies, (2) two 16 bit, 3 microsec per conversion A/D converters interfaced to an arithmetic array processor, and (3) an LSI 11/73 camera control and data analysis computer. The background-limited observational noise performance of the camera at the NASA/IRTF telescope is NEFD (1 sigma) = 0.05 Jy/pixel min exp 1/2.
An efficient algorithm is described for finding whether or not certain fundamental mathematical constants satisfy simple algebraic polynomials. The algorithm, which finds whether an integer relation exists for a vector of real numbers, or else establishes bounds within which no relation can exist. The algorithm is implemented on high-speed computers, using multiprecision arithmetic. Numerical results are summarized, and other possible applications for the algorithm are discussed.
This paper describes a reliable, general algorithm for modal decomposition in real arithmetic and its use in analyzing and synthesizing control logic for linear dynamic systems. The numerical difficulties are described associated with computing the Jordan canonical form when the system has repeated, or nearly repeated, eigenvalues. A new algorithm is described that satisfactorily solves these numerical difficulties. The relation and extension to related numerical analysis research are discussed to clarify the reliability of the techniques. Finally, its implementation as a practical modal decomposition method for efficiently computing the matrix exponential, transfer functions, and frequency response is also described.
This paper discusses the calculation of natural frequencies and mode shapes of three-dimensional solids, using the boundary element method. The metod developed is based on the use of particular integrals of the elastic equilibrium equations, and employs only real arithmetic. It represents an extension to three dimensions of work previously carried out for two-dimensional problems by Ahmad and Banerjee (1986) and Nardini and Brebbia (1982). The method has been incorporated, for multiregion analysis, in the BEST3D (Boundary Element Solution Technology, Three-Dimensional) computer program. Results of the boundary element calculations are compared with analytical, finite element, and experimental results.
The following topics are covered in viewgraph form: (1) hardware verification; (2) Boyer-Moore logic; (3) core RISC; (4) the FM8502 fabrication, implementation specification, and pinout; (5) hardware description language; (6) arithmetic logic generator; (7) near term expected results; (8) present trends; (9) future directions; (10) collaborations and technology transfer; and (11) technology enablers.
The processing of raw data obtained by the solar vector magnetograph at NASA-Marshall requires extensive arithmetic operations on large arrays of real numbers. The objectives of this summer faculty fellowship study are to: (1) learn the programming language of the MicroMSP Array Processor and adapt some existing data reduction routines to exploit its capabilities; and (2) identify other applications and/or existing programs which lend themselves to array processor utilization which can be developed by undergraduate student programmers under the provisions of project JOVE.
The equations of motion for structures with adaptive elements for vibration control are presented for parallel computations to be used as a software package for real-time control of flexible space structures. A brief introduction of the state-of-the-art parallel computational capability is also presented. Time marching strategies are developed for an effective use of massive parallel mapping, partitioning, and the necessary arithmetic operations. An example is offered for the simulation of control-structure interaction on a parallel computer and the impact of the approach presented for applications in other disciplines than aerospace industry is assessed.
Discussed here is work to formally specify and verify a floating point coprocessor based on the MC68881. The HOL verification system developed at Cambridge University was used. The coprocessor consists of two independent units: the bus interface unit used to communicate with the cpu and the arithmetic processing unit used to perform the actual calculation. Reasoning about the interaction and synchronization among processes using higher order logic is demonstrated.