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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

A measurement-based study of concurrency in a multiprocessor

A systematic measurement-based methodology for characterizing the amount of concurrency present in a workload, and the effect of concurrency on system performance indices such as cache miss rate and bus activity are developed. Hardware and software instrumentation of an Alliant FX/8 was used to obtain data from a real workload environment. Results show that 35% of the workload is concurrent, with the concurrent periods typically using all available processors. Measurements of periods of change in concurrency show uneven usage of processors during these times. Other system measures, including cache miss rate and processor bus activity, are analyzed with respect to the concurrency measures. Probability of a cache miss is seen to increase with concurrency. The change in cache miss rate is much more sensitive to the fraction of concurrent code in the worklaod than the number of processors active during concurrency. Regression models are developed to quantify the relationships between cache miss rate, bus activity, and the concurrency measures. The model for cache miss rate predicts an increase in the median miss rate value as much as 300% for a 100% increase in concurrency in the workload.

Mcguire, Patrick John↗
NASA NTRS1987

Digital autonomous terminal access communications

A significant problem for the Bus Monitor Unit is to identify the source of a given transmission. This problem arises from the fact that the label which identifies the source of the transmission as it is put into the bus is intercepted by the Digital Autonomous Terminal Access Communications (DATAC) terminal and removed from the transmission. Thus, a given subsystem will see only data associated with a label and never the identifying label itself. The Bus Monitor must identify the source of the transmission so as to be able to provide some type of error identification/location in the event that some problem with the data transmission occurs. Steps taken to alleviate this problem by modifications to the DATAC terminal are discussed.

Novacki, S.↗
NASA NTRS1986

Resonant AC power system proof-of-concept test program

Proof-of-concept testing was performed on a 20-kHz, resonant power system breadboard from 1981 through 1985. The testing began with the evaluation of a single, 1.0-kW resonant inverter and progressed to the testing of breadboard systems with higher power levels and more capability. The final breadboard configuration tested was a 25.0-kW breadboard with six inverters providing power to three user-interface modules over a 50-meter, 20-kHz bus. The breadboard demonstrated the ability to synchronize multiple resonant inverters to power a common bus. Single-phase and three-phase 20-kHz power distribution was demonstrated. Simple conversion of 20-kHz to dc and variable-frequency ac was demonstrated as was bidirectional power flow between 20-kHz and dc. Steady state measurements of efficiency, power-factor tolerance, and conducted emissions and conducted susceptibility were made. In addition, transient responses were recorded for such conditions as start up, shut down, load changes. The results showed the 20-kHz resonant system to be a desirable technology for a spacecraft power management and distribution system with multiple users and a utility-type bus.

Wappes, Loran J.↗
NASA NTRS1986

Spacecraft solid state power distribution switch

As a spacecraft performs its mission, various loads are connected to the spacecraft power bus in response to commands from an on board computer, a function called power distribution. For the Mariner Mark II set of planetary missions, the power bus is 30 volts dc and when loads are connected or disconnected, both the bus and power return side must be switched. In addition, the power distribution function must be immune to single point failures and, when power is first applied, all switches must be in a known state. Traditionally, these requirements have been met by electromechanical latching relays. This paper describes a solid state switch which not only satisfies the requirements but incorporates several additional features including soft turn on, programmable current trip point with noise immunity, instantaneous current limiting, and direct telemetry of load currents and switch status. A breadboard of the design has been constructed and some initial test results are included.

Praver, G. A.↗
NASA NTRS1988

Microcomputer Board For Space Shuttle Payloads

Report describes Space Flight 80C86 microcomputer board, a configurable general-purpose microcomputer board designed specifically for near-Earth space-flight applications. Architecture of microcomputer board supports dual-bus structure. Local bus provides essential elements for stand-alone computer operations, and system bus provides for communication with subsystems unique to specific application.

Davis, Mitchell L.↗
NASA NTRS1987

A study of Schwarz converters for nuclear powered spacecraft

High power space systems which use low dc voltage, high current sources such as thermoelectric generators, will most likely require high voltage conversion for transmission purposes. This study considers the use of the Schwarz resonant converter for use as the basic building block to accomplish this low-to-high voltage conversion for either a dc or an ac spacecraft bus. The Schwarz converter has the important assets of both inherent fault tolerance and resonant operation; parallel operation in modular form is possible. A regulated dc spacecraft bus requires only a single stage converter while a constant frequency ac bus requires a cascaded Schwarz converter configuration. If the power system requires constant output power from the dc generator, then a second converter is required to route unneeded power to a ballast load.

Stuart, Thomas A.↗
NASA NTRS1988

Planetary operations for the Pioneer Venus Orbiter mission

The Pioneer Venus Orbiter was inserted into Venus orbit on December 4, 1974 and is expected to operate until 1992. This paper discusses the scientific objectives of the Pioneer Venus Orbiter Project components, i.e., the Orbiter spacecraft, the atmosphere entry Probes, and the probe Bus, together with the design and operation characteristics of the Orbiter. Consideration is also given to the science instruments of the Orbiter, to their requirements with respect to pointing, orientation, and timing, and to the ground operations system. The Probes, the Bus, and the Orbiter were selected to study Venus in complementary ways: the Probes by sounding through most of the atmosphere at four locations, the probe Bus by sounding through the upper atmosphere during entry, and the Orbiter by in situ planet-wide observations of the ionosphere and the extreme upper atmosphere, and by examining the surface and interior remotely. In addition, the Orbiter also observes the interactions of Venus with the solar environment.

Jackson, Robert W.↗
NASA NTRS1989

Experimenting With Multiprocessor Simulator Concepts

Multiple microcomputer system used to investigate application of parallel processing to real-time simulation. With dual-base architecture, each microcomputer communicates with corresponding microcomputer on opposite bus through dual-port interface memory. Transfers of data to and from front-end processor occur on interactive information bus. Transfers of data related to simulation calculations occur on real-time-information bus. System, called the real-time multiprocessor simulator (RTMPS), is tool for developing low-cost, portable, user-friendly simulators.

Blech, Richard A.↗
NASA NTRS1989

Development of a software interface for optical disk archival storage for a new life sciences flight experiments computer

The current Life Sciences Laboratory Equipment (LSLE) microcomputer for life sciences experiment data acquisition is now obsolete. Among the weaknesses of the current microcomputer are small memory size, relatively slow analog data sampling rates, and the lack of a bulk data storage device. While life science investigators normally prefer data to be transmitted to Earth as it is taken, this is not always possible. No down-link exists for experiments performed in the Shuttle middeck region. One important aspect of a replacement microcomputer is provision for in-flight storage of experimental data. The Write Once, Read Many (WORM) optical disk was studied because of its high storage density, data integrity, and the availability of a space-qualified unit. In keeping with the goals for a replacement microcomputer based upon commercially available components and standard interfaces, the system studied includes a Small Computer System Interface (SCSI) for interfacing the WORM drive. The system itself is designed around the STD bus, using readily available boards. Configurations examined were: (1) master processor board and slave processor board with the SCSI interface; (2) master processor with SCSI interface; (3) master processor with SCSI and Direct Memory Access (DMA); (4) master processor controlling a separate STD bus SCSI board; and (5) master processor controlling a separate STD bus SCSI board with DMA.

Bartram, Peter N.↗
NASA NTRS1990

Current limiting remote power control module

The power source for the Space Station Freedom will be fully utilized nearly all of the time. As such, any loads on the system will need to operate within expected limits. Should any load draw an inordinate amount of power, the bus voltage for the system may sag and disrupt the operation of other loads. To protect the bus and loads some type of power interface between the bus and each load must be provided. This interface is most crucial when load faults occur. A possible system configuration is presented. The proposed interface is the Current Limiting Remote Power Controller (CL-RPC). Such an interface should provide the following power functions: limit overloading and resulting undervoltage; prevent catastrophic failure and still provide for redundancy management within the load; minimize cable heating; and provide accurate current measurement. A functional block diagram of the power processing stage of a CL-RPC is included. There are four functions that drive the circuit design: rate control of current; current sensing; the variable conductance switch (VCS) technology; and the algorithm used for current limiting. Each function is discussed separately.

Hopkins, Douglas C.↗
NASA NTRS1990

Design considerations for a solar array switching unit

An analysis of the sequential switching shunt regulator unit (SSU) proposed for the space station and space platform is presented. The solar array and shunt regulator system is analyzed for ripple, output impedance, and stability. The performances of proportional gain and proportional integrator (PI) controllers are compared. A design example is provided, and an EASY5 simulation is presented for the regulation of the bus voltage by the SSU. It is shown that the bus ripple may be limited by the equivalent series resistor, in which case it cannot be reduced by increasing the capacitance or switching frequency. The proportional controller is shown to offer a faster response than the PI controller, but has a load-current-dependent steady state error. This error can be removed by the PI controller, but the bus impedance has a low-frequency pole which slows the response.

Patil, A. R.↗
NASA NTRS1991

Investigation of Techniques for Simulating Communications and Tracking Subsystems on Space Station Freedom

The need to reduce the costs of Space Station Freedom has resulted in a major redesign and downsizing of the Station in general, and its Communications and Tracking (C&T) components in particular. Earlier models and simulations of the C&T Space-to-Ground Subsystem (SGS) in particular are no longer valid. There thus exists a general need for updated, high fidelity simulations of C&T subsystems. This project explored simulation techniques and methods that might be used in developing new simulations of C&T subsystems, including the SGS. Three requirements were placed on the simulations to be developed: (1) they run on IBM PC/XT/AT compatible computers; (2) they be written in Ada as much as possible; and (3) since control and monitoring of the C&T subsystems will involve communication via a MIL-STD-1553B serial bus, that the possibility of commanding the simulator and monitoring its sensors via that bus be included in the design of the simulator. The result of the project is a prototype of a simulation of the Assembly/Contingency Transponder of the SGS, written in Ada, which can be controlled from another PC via a MIL-STD-1553B bus.

Deacetis, Louis A.↗
NASA NTRS1992

A computerized aircraft battery servicing facility

The latest upgrade to the Aerospace Energy Systems Laboratory (AESL) is described. The AESL is a distributed digital system consisting of a central system and battery servicing stations connected by a high-speed serial data bus. The entire system is located in two adjoining rooms; the bus length is approximately 100 ft. Each battery station contains a digital processor, data acquisition, floppy diskette data storage, and operator interfaces. The operator initiates a servicing task and thereafter the battery station monitors the progress of the task and terminates it at the appropriate time. The central system provides data archives, manages the data bus, and provides a timeshare interface for multiple users. The system also hosts software production tools for the battery stations and the central system.

Glover, Richard D.↗
NASA NTRS1990

Position reporting system using small satellites

A system able to provide position reporting and monitoring services for mobile applications represents a natural complement to the Global Positioning System (GPS) navigation system. The system architecture is defined on the basis of the communications requirements derived by user needs, allowing maximum flexibility in the use of channel capacity, and a very simple and low cost terminal. The payload is sketched, outlining the block modularity and the use of qualified hardware. The global system capacity is also derived. The spacecraft characteristics are defined on the basis of the payload requirements. A small bus optimized for Ariane IV, Delta II vehicles and based on the modularity concept is presented. The design takes full advantage of each launcher with a common basic bus or bus elements for a mass production.

Pavesi, B.↗
NASA NTRS1991

A low maintenance and highly reliable fly-by-light architecture

This paper proposes a highly reliable distributed architecture for use in a commercial transport. Fly-By-Light characteristics of the architecture are a serial fiber optic backplane and redundant fiber optic data bus. The fiber optic bus is fault tolerant and Byzantine resilient. A distributed architecture (both physically and logically) can be realized by utilizing several processing clusters on the data bus. A processing cluster is composed of one or more processing units. The processing units consist of several modules. The modules of the processing unit are connected via a serial fiber optic backplane. Fault tolerance is implemented at the backplane to increase reliability and availability.

Dan Palumbo↗
NASA NTRS1991

Thermal modeling of nickel-hydrogen battery cells operating under transient orbital conditions

An analytical study of the thermal operating characteristics of nickel-hydrogen battery cells is presented. Combined finite-element and finite-difference techniques are employed to arrive at a computationally efficient composite thermal model representing a series-cell arrangement operating in conjunction with a radiately coupled baseplate and coldplate thermal bus. An aggressive, low-mass design approach indicates that thermal considerations can and should direct the design of the thermal bus arrangement. Special consideration is given to the potential for mixed conductive and convective processes across the hydrogen gap. Results of a compressible flow model are presented and indicate the transfer process is suitably represented by molecular conduction. A high-fidelity thermal model of the cell stack (and related components) indicates the presence of axial and radial temperature gradients. A detailed model of the thermal bus reveals the thermal interaction of individual cells and is imperative for assessing the intercell temperature gradients.

Schrage, Dean S.↗
NASA NTRS1993

System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

Hall, William A.↗
NASA NTRS1991

Performance evaluation of Platform Data ManagementSystem under various degrees of protocol implementation

The Platform Data Management System (DMS) collects Housekeeping (H/K), Payload (P/L) Engineering, and Payload Science data from various subsystems and payloads on the platform for transmission to the ground through the downlink via TDRSS. The DMS also distributes command data received from the ground to various subsystems and payloads. In addition, DMS distributes timing and safemode data. The function of collection and distribution of various types of data is performed by the Command and Data Handling (C&DH) subsystem of DMS. The C&DH subsystem uses for this purpose a number of data buses namely, Housekeeping, Payload Engineering, Payload Science, and Time and Safemode buses. Out of these buses, the H/K, P/L Engineering, and P/L Science buses are planned to be implemented by using MIL-STD 1553 bus. Most of the period covered was spent in developing a queue theoretic model of the 1553 Bus as used in the DMS. The aim is to use this model to test the performance and suitability of the 1553 Bus to the DMS under a number of alternative design scenarios.

Arozullah, Mohammed↗