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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in Si02 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled.

Green, M. L.↗

Ultra Low Power Imaging Systems Using CMOS Image Sensor Technology

The need for miniaturization in advanced science sensor systems has led to the development of a new image sensor technology, the active pixel image sensor (APS). The development of CMOS APS technology allows the integration of timing and control electronics, imaging detector arrays, signal chains and analog-to-digital conversion on a single integrated circuit. The impact on the imaging system is to reduce power by approximately 1000x over existing systems - from tens of watts to tens of milliwatts.

imaging↗

(abstract) Pluto Integrated Camera-Spectrometer (PICS): a Low Mass, Low Power Instrument for Planetary Exploration

The concept we describe is an integrated instrument (a Pluto Integrated Camera-Spectrometer -- PICS) that will perform the functions of all three optical instruments required by the Pluto Fast Flyby Mission: the near-IR spectrometer, the camera, and the UV spectrometer. This integrated approach minimizes mass and power use. It also forced us early in the conceptual design to consider integrated observational sequences and integrated power management, thus ensuring compatible duty cycles (i.e., exposure times, readout rates) to meet the composite requirements for data collection, compression, and storage. Based on flight mission experience we believe that this integrated approach will result in substantial cost savings, both in reworking instrument designs during accommodation, as well as in sequence planning and integration. Finally, this integrated payload automatically yields a cohesive mission data set, optimized for correlative analysis. The presentation will provide details of the PICS instrument design and describe the fabrication and testing of the integrated SiC structure and optics at SSG Inc. Final integration and test plans for the prototype will also be described.

Pluto↗

SEE Test Report for Texas Instruments TLV5618 2.7-V to 5.5-V Low-Power Dual 12-Bit Digital-to-Analog Converter with Power Down

The primary purpose of this testing was to characterize the Texas Instruments TLV5618 12-bit digital-to-analog converter (DAC) for single-event latchup (SEL) susceptibility. These data will be used to assess the SEL risk for the OSIRIS-REx Laser Altimeter (OLA). A secondary goal is to assess the susceptibility of the DAC to single-event transients (SET), single-event upsets (SEU), and other nondestructive SEE.

Raymond Ladbury↗

AMD Radeon e9173 Low Power PCIE GPU Single Event Effects Test Report

The AMD Radeon Embedded e9170 Graphics Processing Unit (GPU), notably the e9173 Peripheral Component Interconnect Express (PCIE) variant, is of interest to Artemis generation programs with requirements for graphics rendering, compute, artificial intelligence (Ai) with a constraints-requiring piece-part procurement and power consumption of less than 50W. In addition to collecting heavy ion data on this device, a secondary purpose of this test campaign was to validate video capture hardware and software workflows used with GPU, microprocessor and system-on-chip device testing. Five (5) test patterns from the NEPP Processor Enclave (NPE) test suite were used with the e9173. The test patterns covered the operating system’s (OS) idle contribution towards the cross section, matrix math using tensorflow-rocm, two artificial intelligence models developed at NASA GSFC, and an industry standard GPU benchmarking application called Mesa GLXGears.

NASA Technical Memorandum (TM) test report for pos↗

A Low Cost Single Chip VDL Compatible Transceiver ASIC

Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

Becker, Robert↗